JPS6341916U - - Google Patents
Info
- Publication number
- JPS6341916U JPS6341916U JP13498086U JP13498086U JPS6341916U JP S6341916 U JPS6341916 U JP S6341916U JP 13498086 U JP13498086 U JP 13498086U JP 13498086 U JP13498086 U JP 13498086U JP S6341916 U JPS6341916 U JP S6341916U
- Authority
- JP
- Japan
- Prior art keywords
- port
- balanced mixer
- signal
- single balanced
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Superheterodyne Receivers (AREA)
Description
第1図は本考案の一実施例に係るシングル・バ
ランスド・ミキサー回路の回路図、第2図はその
他の実施例に係る回路図、第3図は従来例の回路
図である。
1……SBM、4……並列共振トラツプ、5,
6……IF信号通過フイルタ、P1……RF・I
Fポート、P2……LOポート、T1……RF信
号端子、T2……IF信号端子。
FIG. 1 is a circuit diagram of a single balanced mixer circuit according to one embodiment of the present invention, FIG. 2 is a circuit diagram of another embodiment, and FIG. 3 is a circuit diagram of a conventional example. 1...SBM, 4...Parallel resonance trap, 5,
6...IF signal passing filter, P1 ...RF・I
F port, P2 ...LO port, T1 ...RF signal terminal, T2 ...IF signal terminal.
Claims (1)
ーのRF・IFポートとの間にIF信号周波数の
並列共振トラツプを、IF信号端子と前記RF・
IFポートとの間にIF信号通過フイルタを、そ
れぞれ接続したことを特徴とするシングル・バラ
ンスド・ミキサー回路。 A parallel resonant trap of the IF signal frequency is connected between the RF signal terminal and the RF/IF port of the single balanced mixer;
A single balanced mixer circuit characterized in that an IF signal passing filter is connected between each IF port.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13498086U JPS6341916U (en) | 1986-09-03 | 1986-09-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13498086U JPS6341916U (en) | 1986-09-03 | 1986-09-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6341916U true JPS6341916U (en) | 1988-03-19 |
Family
ID=31036727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13498086U Pending JPS6341916U (en) | 1986-09-03 | 1986-09-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6341916U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0313106A (en) * | 1989-06-12 | 1991-01-22 | Mitsubishi Electric Corp | Mixer |
US7319850B2 (en) | 2001-11-01 | 2008-01-15 | Sharp Kabushiki Kaisha | Low noise block downconverter converting received signal to intermediate frequency signal |
-
1986
- 1986-09-03 JP JP13498086U patent/JPS6341916U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0313106A (en) * | 1989-06-12 | 1991-01-22 | Mitsubishi Electric Corp | Mixer |
US7319850B2 (en) | 2001-11-01 | 2008-01-15 | Sharp Kabushiki Kaisha | Low noise block downconverter converting received signal to intermediate frequency signal |