JPS6258657A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To electrically separate the one sidewall and the other sidewall of a groove of a narrow semiconductor substrate by diffusing a first impurity to the sidewall of recessed part of semiconductor substrate and then diffusing a second impurity different from the first impurity to the bottom of recessed part. CONSTITUTION:A recessed part is selectively formed on a semiconductor substrate 1 and a fist impurity 2 is diffused to the sidewall of such recessed part. A second impurity which is different from the first impurity is then diffused to the bottom of recessed part. Thereby, the one sidewall of the groove of the narrow semiconductor substrate 1 is electrically separated from the other sidewall.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular to diffusion of impurities into a trench in an LSI isolation trench or trench capacitance.

Prior Art In December 1984, the United States International Electron Device Meeting CI EDM
In E, lecture number 9.3. 9.4, ``Technology for forming dynamic RAM cell capacitors and element isolation in the same trench'' is reported, but here, as shown in FIG. Area 2.
It is desirable to form a p'' region 3 at the bottom of the groove.However, in reality, the 04'' region 2 may not be formed, or the p+ region 3 may be formed at the bottom of the vortex as shown in FIG.
The n'' region 2 is formed by leaving the deposited axillary 5 at the bottom.

Problems to be Solved by the Invention Conventionally, it is not easy to realize the structure shown in Fig. 3, so the structure is as shown in Fig. 4. It is not possible to electrically separate the

The purpose of this invention is to provide a method for manufacturing a semiconductor device that can easily realize the M4 structure shown in FIG. 3, which can electrically isolate one side surface and the other side surface of a silicon groove.

Means for Solving the Problems The method of manufacturing a semiconductor product of the present invention selectively forms a recess in a half-half substrate, diffuses a first impurity into at least the sidewall of the recess, and diffuses the first impurity into the semiconductor substrate. The second impurity responsible for this is diffused into at least the bottom surface of the recess.

Operation With this configuration, an ideal structure can be easily obtained, and one side of the narrow silicon groove can be electrically isolated from the other side.

Examples Hereinafter, the first example of this invention will be explained. The second embodiment will be explained based on FIGS. 1 and 2. FIGS. 1(a) and 1(b) are process diagrams of the first embodiment. First, as in fa), Sil
An SiO2 film 4 was formed on the plate 1 as an oxide film for a resist mask, and grooves were formed in the Si substrate 1 by etching by ion implantation of phosphorus or arsenic at an angle of about 1×10 14 α- at 50 eV. The n+ region 2 was formed by implantation at a dose of 2. Next, as shown in fb), boron ions B+ are applied at 25 KeV from above in a direction almost perpendicular to the surface of the SI base substrate at 1×10t1 to 1×10
t5cJ! A p1 region 3 was formed at the bottom of the trench by implantation at a dose of -2.

Figures 2 (a) to (C) are process diagrams of other embodiments; (a)
Now, using the same <5iO211A4 as in the conventional example, a groove with a depth of approximately 3.5 μm is formed using RfE <reactive ion etching).
The n+ region 2 was formed using an ion implantation method. Next, in (b), additional etching of about 0.5 .mu.l was performed using the oriented dry etching (RIE) method to etch the n4 head region at the bottom. Then, as shown in (C), poron ions are added to 25 e
Ion implantation was carried out in a direction almost perpendicular to the surface of the 3i substrate 1 using V to dope the bottom of the trench to form a p+ region 3 as a chip channel (-flange). The p'' region 3 can also be formed using impurities.

As described in the detailed description of the invention, the method for manufacturing a semiconductor device of the present invention includes selectively forming a recess in a half-half substrate, diffusing a first impurity into at least a side wall of the recess, and dispersing the first impurity. Since the different second impurity is diffused into at least the bottom surface of the recess, it becomes possible to electrically separate the gap between one side and the other side of the groove in the narrow half-substrate.

[Brief explanation of the drawing]

1 and 2 are explanatory diagrams of the manufacturing process of a specific embodiment of the present invention, FIG. 3 is a cross-sectional view of an ideal semiconductor device, and FIG. 4 is a diagram of a semiconductor device manufactured by a conventional manufacturing method. FIG. 2 is a cross-sectional view of a semiconductor device. 1...Si base substrate 2...n+ region 3...p+ region 4...SiO2 film (oxide film for resist mask) h weir crest 9

Claims (1)

[Claims] 1. Selectively forming a recess in a semiconductor substrate, diffusing a first impurity into at least the sidewall of the recess, and diffusing a second impurity different from the first impurity into the bottom surface of the recess. A method for manufacturing a semiconductor device. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the second impurity is diffused after forming a deeper recess from the bottom of the recess after the first impurity diffusion. . 3. The method of manufacturing a semiconductor device according to claim 1, wherein the second impurity is diffused by an ion implantation method. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the ion implantation is performed using an ion beam substantially perpendicular to the semiconductor substrate.