JPS6257441U - - Google Patents
Info
- Publication number
- JPS6257441U JPS6257441U JP14663585U JP14663585U JPS6257441U JP S6257441 U JPS6257441 U JP S6257441U JP 14663585 U JP14663585 U JP 14663585U JP 14663585 U JP14663585 U JP 14663585U JP S6257441 U JPS6257441 U JP S6257441U
- Authority
- JP
- Japan
- Prior art keywords
- collector
- transistor
- whose
- potential point
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
Description
第１図は本考案のデジタル・アナログ変換回路
を示す回路図、第２図、第３図は本考案の動作説
明用の信号波形図、第４図はアナログに変換する
前のデジタル信号の一例を示す信号波形図、第５
図は一般のパルス発生回路におけるデユーテイー
比の変化ステツプを示す特性図、第６図は従来の
デジタル・アナログ変換回路を示す回路図、第７
図は従来ならびに本考案の入力パルスのデユーテ
イー比に対する出力直流電圧の変化を示す特性図
である。
１……入力端子、５……電圧源、３，７……第
１、第２のトランジスタ、９，１０……積分回路
、２０……抵抗、２１……コンデンサ、１１……
出力端子。
Figure 1 is a circuit diagram showing the digital-to-analog conversion circuit of the present invention, Figures 2 and 3 are signal waveform diagrams for explaining the operation of the present invention, and Figure 4 is an example of a digital signal before conversion to analog. Signal waveform diagram showing 5th
The figure is a characteristic diagram showing the change steps of the duty ratio in a general pulse generation circuit, Figure 6 is a circuit diagram showing a conventional digital-to-analog conversion circuit, and Figure 7
The figure is a characteristic diagram showing the change in the output DC voltage with respect to the duty ratio of the input pulse in the conventional and the present invention. 1... Input terminal, 5... Voltage source, 3, 7... First and second transistors, 9, 10... Integrating circuit, 20... Resistor, 21... Capacitor, 11...
Output terminal.
Claims (1)
スに供給され、コレクタを第１の抵抗を介して所
定電位点に接続し、エミツタを基準電位点に接続
した第１のトランジスタと、 この第１のトランジスタのコレクタにベースを
接続し、コレクタを第２の抵抗を介して所定電位
点に接続し、エミツタを基準電位点に接続した第
２のトランジスタと、 この第２のトランジスタのコレクタに得られる
信号を積分するための積分回路と、 前記第２のトランジスタのコレクタと第１のト
ランジスタのコレクタ間に接続した抵抗とコンデ
ンサによる直列回路とを具備して成るデジタル・
アナログ変換回路。[Claims for Utility Model Registration] A first transistor whose base is supplied with a pulse signal having a predetermined duty ratio, whose collector is connected to a predetermined potential point via a first resistor, and whose emitter is connected to a reference potential point. and a second transistor whose base is connected to the collector of this first transistor, whose collector is connected to a predetermined potential point via a second resistor, and whose emitter is connected to a reference potential point; A digital circuit comprising: an integrating circuit for integrating a signal obtained at the collector of the transistor; and a series circuit including a resistor and a capacitor connected between the collector of the second transistor and the collector of the first transistor.
Analog conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14663585U JPS6257441U (en) | 1985-09-27 | 1985-09-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14663585U JPS6257441U (en) | 1985-09-27 | 1985-09-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6257441U true JPS6257441U (en) | 1987-04-09 |
Family
ID=31059284
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14663585U Pending JPS6257441U (en) | 1985-09-27 | 1985-09-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6257441U (en) |
-
1985
- 1985-09-27 JP JP14663585U patent/JPS6257441U/ja active Pending