JPS6178433U - - Google Patents
Info
- Publication number
- JPS6178433U JPS6178433U JP16248084U JP16248084U JPS6178433U JP S6178433 U JPS6178433 U JP S6178433U JP 16248084 U JP16248084 U JP 16248084U JP 16248084 U JP16248084 U JP 16248084U JP S6178433 U JPS6178433 U JP S6178433U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- transistor
- diode
- series circuit
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007493 shaping process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Description
第１図は本考案の１実施例の回路図、第２図は
同実施例の動作説明のための波形図、第３図は従
来例の回路図、第４図は従来例の動作説明のため
の波形図である。
Ｑ４…トランジスタ、Ｄ３…第１のダイオード
、Ｄ４…第２のダイオード、Ｄ５…第３のダイオ
ード、Ｒ１１…第１の抵抗、Ｒ１２…第２の抵抗
、Ｒ１３…第３の抵抗、Ｒ１４…第４の抵抗、Ｃ
１，Ｒ１…微分回路を形成するコンデンサと抵抗
。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a waveform diagram for explaining the operation of the same embodiment, Fig. 3 is a circuit diagram of a conventional example, and Fig. 4 is an explanation of the operation of the conventional example. FIG. Q4 ...transistor, D3 ...first diode, D4 ...second diode, D5 ...third diode, R11 ...first resistor, R12 ...second resistor, R13 ...third resistance, R 14 ...Fourth resistance, C
1 , R1 ...Capacitor and resistor forming a differential circuit.
Claims (1)
オードを接続し、エミツタとアース間に第２のダ
イオードと第１の抵抗からなる第１の直列回路を
接続し、前記第２のダイオードと第１の抵抗との
接続点に第３のダイオードと第２の抵抗からなる
第２の直列回路の一端を接続し、前記第２の直列
回路の他端は第３の抵抗を介して前記トランジス
タのベースに接続し、前記トランジスタのコレク
タと、電源との間に第４の抵抗を接続し、前記第
３の抵抗と第２の直列回路の接続点に微分回路を
介して入力パルスを印加し、前記トランジスタの
コレクタより出力パルスを取出すことを特腸とす
る波形整形回路。 A first diode is connected between the base of the transistor and ground, a first series circuit consisting of a second diode and a first resistor is connected between the emitter and ground, and the second diode and the first resistor are connected. One end of a second series circuit consisting of a third diode and a second resistor is connected to the connection point with the transistor, and the other end of the second series circuit is connected to the base of the transistor via a third resistor. A fourth resistor is connected between the collector of the transistor and the power supply, and an input pulse is applied to the connection point between the third resistor and the second series circuit via a differentiating circuit, so that the voltage of the transistor increases. A waveform shaping circuit whose special purpose is to extract output pulses from the collector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16248084U JPS6178433U (en) | 1984-10-26 | 1984-10-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16248084U JPS6178433U (en) | 1984-10-26 | 1984-10-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6178433U true JPS6178433U (en) | 1986-05-26 |
Family
ID=30720359
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16248084U Pending JPS6178433U (en) | 1984-10-26 | 1984-10-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6178433U (en) |
-
1984
- 1984-10-26 JP JP16248084U patent/JPS6178433U/ja active Pending