JPS6255344U - - Google Patents

Info

Publication number
JPS6255344U
JPS6255344U JP14881385U JP14881385U JPS6255344U JP S6255344 U JPS6255344 U JP S6255344U JP 14881385 U JP14881385 U JP 14881385U JP 14881385 U JP14881385 U JP 14881385U JP S6255344 U JPS6255344 U JP S6255344U
Authority
JP
Japan
Prior art keywords
die pad
slits
pores
utility
scope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14881385U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14881385U priority Critical patent/JPS6255344U/ja
Publication of JPS6255344U publication Critical patent/JPS6255344U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第１図ａ，ｂはこの考案の一実施例を示す断面
図及び正面図、第２図ａ，ｂは他の実施例を示す
断面図及び正面図、第３図ａ，ｂは従来の半導体
装置を示す断面図及び正面図であり、図において
１は半導体チツプ、２は接合剤、３はダイパツド
である。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体チツプを載せる金属フレームのダイパツ
    ドの部分にスリツト又は細孔を有することを特徴
    とした半導体装置。
JP14881385U 1985-09-26 1985-09-26 Pending JPS6255344U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14881385U JPS6255344U (ja) 1985-09-26 1985-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14881385U JPS6255344U (ja) 1985-09-26 1985-09-26

Publications (1)

Publication Number Publication Date
JPS6255344U true JPS6255344U (ja) 1987-04-06

Family

ID=31063433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14881385U Pending JPS6255344U (ja) 1985-09-26 1985-09-26

Country Status (1)

Country Link
JP (1) JPS6255344U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6465755A (en) * 1987-09-04 1989-03-13 Ise Electronics Corp Fluorescent character display tube

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54162467A (en) * 1978-06-13 1979-12-24 Mitsubishi Electric Corp Semiconductor element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54162467A (en) * 1978-06-13 1979-12-24 Mitsubishi Electric Corp Semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6465755A (en) * 1987-09-04 1989-03-13 Ise Electronics Corp Fluorescent character display tube

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