JPS6255182B2 - - Google Patents

Info

Publication number
JPS6255182B2
JPS6255182B2 JP24388183A JP24388183A JPS6255182B2 JP S6255182 B2 JPS6255182 B2 JP S6255182B2 JP 24388183 A JP24388183 A JP 24388183A JP 24388183 A JP24388183 A JP 24388183A JP S6255182 B2 JPS6255182 B2 JP S6255182B2
Authority
JP
Japan
Prior art keywords
data
channel
memory
data transfer
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP24388183A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60136848A (ja
Inventor
Teruo Noro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP24388183A priority Critical patent/JPS60136848A/ja
Publication of JPS60136848A publication Critical patent/JPS60136848A/ja
Publication of JPS6255182B2 publication Critical patent/JPS6255182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP24388183A 1983-12-26 1983-12-26 デ−タ処理装置 Granted JPS60136848A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24388183A JPS60136848A (ja) 1983-12-26 1983-12-26 デ−タ処理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24388183A JPS60136848A (ja) 1983-12-26 1983-12-26 デ−タ処理装置

Publications (2)

Publication Number Publication Date
JPS60136848A JPS60136848A (ja) 1985-07-20
JPS6255182B2 true JPS6255182B2 (enrdf_load_html_response) 1987-11-18

Family

ID=17110366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24388183A Granted JPS60136848A (ja) 1983-12-26 1983-12-26 デ−タ処理装置

Country Status (1)

Country Link
JP (1) JPS60136848A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0752419B2 (ja) * 1987-08-21 1995-06-05 富士通株式会社 デ−タ転送制御方式

Also Published As

Publication number Publication date
JPS60136848A (ja) 1985-07-20

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