JPS6245705B2 - - Google Patents

Info

Publication number
JPS6245705B2
JPS6245705B2 JP54169179A JP16917979A JPS6245705B2 JP S6245705 B2 JPS6245705 B2 JP S6245705B2 JP 54169179 A JP54169179 A JP 54169179A JP 16917979 A JP16917979 A JP 16917979A JP S6245705 B2 JPS6245705 B2 JP S6245705B2
Authority
JP
Japan
Prior art keywords
type region
voltage
withstand voltage
small current
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54169179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5694664A (en
Inventor
Takeshi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16917979A priority Critical patent/JPS5694664A/ja
Publication of JPS5694664A publication Critical patent/JPS5694664A/ja
Publication of JPS6245705B2 publication Critical patent/JPS6245705B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Thyristors (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP16917979A 1979-12-27 1979-12-27 Semiconductor element Granted JPS5694664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16917979A JPS5694664A (en) 1979-12-27 1979-12-27 Semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16917979A JPS5694664A (en) 1979-12-27 1979-12-27 Semiconductor element

Publications (2)

Publication Number Publication Date
JPS5694664A JPS5694664A (en) 1981-07-31
JPS6245705B2 true JPS6245705B2 (https=) 1987-09-28

Family

ID=15881703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16917979A Granted JPS5694664A (en) 1979-12-27 1979-12-27 Semiconductor element

Country Status (1)

Country Link
JP (1) JPS5694664A (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010765A (ja) * 1983-06-30 1985-01-19 Fujitsu Ltd 半導体装置
JPS6064461A (ja) * 1983-09-20 1985-04-13 Seiko Epson Corp 半導体装置
CN104952911B (zh) * 2015-06-11 2018-09-18 江苏东晨电子科技有限公司 一种环状pn结

Also Published As

Publication number Publication date
JPS5694664A (en) 1981-07-31

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