JPS6243552B2 - - Google Patents

Info

Publication number
JPS6243552B2
JPS6243552B2 JP55000423A JP42380A JPS6243552B2 JP S6243552 B2 JPS6243552 B2 JP S6243552B2 JP 55000423 A JP55000423 A JP 55000423A JP 42380 A JP42380 A JP 42380A JP S6243552 B2 JPS6243552 B2 JP S6243552B2
Authority
JP
Japan
Prior art keywords
layer
platinum
region
gate
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55000423A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5698874A (en
Inventor
Hiroki Muta
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP42380A priority Critical patent/JPS5698874A/ja
Publication of JPS5698874A publication Critical patent/JPS5698874A/ja
Publication of JPS6243552B2 publication Critical patent/JPS6243552B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)
JP42380A 1980-01-07 1980-01-07 Preparation of semiconductor device Granted JPS5698874A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP42380A JPS5698874A (en) 1980-01-07 1980-01-07 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP42380A JPS5698874A (en) 1980-01-07 1980-01-07 Preparation of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5698874A JPS5698874A (en) 1981-08-08
JPS6243552B2 true JPS6243552B2 (enExample) 1987-09-14

Family

ID=11473386

Family Applications (1)

Application Number Title Priority Date Filing Date
JP42380A Granted JPS5698874A (en) 1980-01-07 1980-01-07 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5698874A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61274359A (ja) * 1985-04-01 1986-12-04 フエアチヤイルド　セミコンダクタ　コ−ポレ−シヨン 小型コンタクト無しｒａｍセル
JP2955814B2 (ja) * 1994-01-24 1999-10-04 エルジイ・セミコン・カンパニイ・リミテッド シリサイドプラグ形成方法
JP2687917B2 (ja) * 1995-02-20 1997-12-08 日本電気株式会社 半導体装置の製造方法
US7449728B2 (en) * 2003-11-24 2008-11-11 Tri Quint Semiconductor, Inc. Monolithic integrated enhancement mode and depletion mode field effect transistors and method of making the same

Also Published As

Publication number Publication date
JPS5698874A (en) 1981-08-08

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