JPS6242458A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent short circuit caused between an electroconductive film and a gate electrode even if matching is shifted on the mask-matching process, by forming a contact holes between the first and second gate electrodes, and then forming the first and second insulating films on the respective first and second gate electrodes to connect the contact hole. CONSTITUTION:An insulating film 3 is formed on the surface of a semiconductor substrate 5 of electroconductive type, followed by the formation of a polycrystal silicon film and a silicon oxide film. Then, unnecessary parts in the silicon oxide film and polycrystal silicon film are removed to form silicon oxide films 6, gate electrodes 1 and 2. Then, ion-implantation of impurities is performed to form an impurity layer 4. After a silicon oxide film 7 is formed, the silicon oxide film 7 and insulating film 3 are removed to form a contact hole 8. Side walls 10 are formed on the side surfaces of a gate electrode 1 or a gate electrode 2, followed by the formation of a metal electrode 9. Because a margin between the gate electrode 1 and the contact hole 8, and one between the contact hole 8 and the gate electrode 2 can be reduced, a miniaturizing process can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device having an insulated gate transistor.

[Summary of the invention]

The present invention provides a method for manufacturing a semiconductor device having an insulated gate transistor, in which a contact hole is formed between a first gate electrode and a second gate electrode, and when a conductive film is connected to this contact hole, the first Gate electrode and second gate i! ! By forming the first insulating film on top and the second insulating film on top, even if misalignment occurs between the contact hole and the gate electrode during the mask alignment process, the contact hole will remain intact. O [conventional technology] The method of producing conventional semiconductor devices, which can prevent short circuit between the connected conductive film and the gate electrode, is explained using Fig. 2. In (α), an insulating film 3 is formed on the semiconductor substrate of the first conductivity type, and then a polycrystalline silicon layer is formed using chemical vapor deposition, and unnecessary portions are removed using photolithography. Gate electrodes 1 and 2 made of polycrystalline silicon
form. Next is this gate 1! The second pole is used as a mask.
A second conductivity type impurity layer 4 is formed by ion-implanting conductivity type impurities and then annealing. Next, as shown in FIG. 2(6), a first silicon oxide film 7 is formed, and then a contact hole 8 is formed by photolithography as shown in FIG. 2(c).Then, a metal electrode 9 is formed.

[Problems and objects to be solved by the invention] However, in the above-mentioned conventional technology, if a mask misalignment occurs between the mask forming the gate electrodes 1 and 2 and the mask forming the contact hole 7, the gate electrode 1 or the gate 1! Since the electrode 2 and the metal electrode 9 are short-circuited, it is necessary to leave a sufficient margin between the gate electrode 1 and the contact hole 8 and between the contact hole 8 and the gate electrode 9, making it difficult to miniaturize the structure. The present invention is intended to solve these problems, and its purpose is to connect the gate electrode 1 and the contact hole 8, and the connection between the contact hole 8 and the contact hole 8.
, even if there is not enough space between the gate electrode 1 and the electrode.
Another object of the present invention is to provide a semiconductor device in which the gate electrode 2 and the metal electrode 9 are not short-circuited.

[Means for solving problems]

The semiconductor device of the present invention includes the step of forming a first insulating film on the surface of a semiconductor substrate of a first conductivity type, and forming a first conductive film and a second conductive film on the first insulating film. a step of sequentially etching the second insulating film and the first conductive film using a photoresist as a mask; a step of forming a third insulating film; The method is characterized in that it includes a step of sequentially etching a third insulating film and the first insulating film, and a step of forming a second conductive film.

〔Example〕

FIGS. 1(α) to (c) are diagrams showing embodiments of the present invention.

A detailed explanation will be given below with reference to the figures. In FIG. 1 (α), a first insulating film 3 is formed on the surface of a semiconductor substrate 50 of a first conductive type, a first conductive film such as a polycrystalline silicon film is formed, and then a second An insulating film, such as a silicon oxide film, is formed using a zero-order photolithography method, and unnecessary silicon oxide films and multi-layer silicon films are removed.
A gate electrode made of silicon oxide film 6 and polycrystalline silicon 1 and 2 is formed. Next, a second conductivity type impurity layer 4 is formed by ion-implanting a second conductivity type impurity using the gate N and pole as a mask and then annealing. Next, as shown in FIG. 1(6), after forming a third insulating film such as a silicon oxide film 7, the silicon oxide film 7 and the first insulating film 3 are removed by photolithography to form a contact hole 8. Do ◇ In this case, gate 1! A sidewall 10 made of silicon oxide film 7 is formed on the side surface of pole 1 or gate electrode 2 . Next, a second conductive film such as metal i!
Form pole 9.

〔Effect of the invention〕

As described above, according to the present invention, even if the gate electrode 1 and the contact hole 8 approach each other due to mask misalignment, insulation is maintained on the gate electrode by the silicon oxide film 6, and the side surfaces of the gate electrode are Insulation is maintained by the silicon oxide film 10 remaining as sides and walls, and the gate electrode 1
This eliminates short circuits between the metal electrodes 9. Therefore, gate electrode 1
0, which has the effect of reducing the margin between the contact hole 8 and the contact hole A/8 and the gate electrode 2, and allowing for miniaturization.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(6) are main cross-sectional views showing an embodiment of the method for manufacturing a semiconductor device of the present invention. FIGS. 2(i) to 2(d) are main cross-sectional views showing a conventional method of manufacturing a semiconductor device. In the figure, 1.2...polycrystalline silicon gate 3...
- Insulating film 4... - Second conductivity type impurity layer 5... First conductivity type semiconductor substrate 6, 7...
. . . Silicon oxide film 8 . . . Contact hole 9 . . . Metal electrode 10 . . . Side wall. that's all

Claims (1)

[Claims] 1. A step of forming a first insulating film on the surface of a semiconductor substrate of a first conductivity type, and forming a first conductive film and a second insulating film on the first insulating film. a step of sequentially etching the second insulating film and the first conductive film using a photoresist as a mask; a step of forming a third insulating film; and a step of sequentially etching the second insulating film and the first conductive film using a photoresist as a mask; a step of sequentially etching the third insulating film and the first insulating film;
A method for manufacturing a semiconductor device, comprising the step of forming a second conductive film. 2. The method includes the steps of etching the second insulating film using a photoresist as a mask, removing the photoresist, and etching the first conductive film using the second insulating film as a mask. A method for manufacturing a semiconductor device according to claim 1.