JPH0298939A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To realize a high performance of a semiconductor device by a method wherein, when a groove used to form a gate electrode is formed, a semiconductor substrate is oxidized and an oxide is removed by using a chemical liquid. CONSTITUTION:An insulating film 2 used to electrically insulate and isolate individual semiconductor devices is formed on the mainface side of a semiconductor substrate 1. Then, a silicon nitride film 13 is removed by an etching operation; after that, polycrystalline silicon 161 is etched by making use of an oxide film 7 as a mask until a gate insulating film 3 at the lower part is exposed; a gate electrode 4 is formed. Then, an exposed part of the gate electrode 4 is oxidized; it is covered with insulating films 8a, 8b; after that, an impurity is added to a semiconductor region to be used as a source region and a drain region; the semiconductor region is activated; an n-type source region and an n-type drain region 5, 6 are formed; in addition, an insulating film is formed on the main-face side of the substrate 1. After that, a source electrode 9 and a drain electrode 10 are formed. Accordingly, a groove size L1 of the oxidation- resistant thin film 13 first formed on the semiconductor substrate becomes nearly equal to a width of the finally formed gate electrode. Thereby, a high performance of a semiconductor device is realized when the groove size L1 is made smaller.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, particularly a small semiconductor device that enables high-speed operation, so-called insulated gate field effect transistor (hereinafter abbreviated as MO8FET). It is related to manufacturing technology.

[Conventional technology]

An example of a conventional semiconductor device will be explained with reference to FIG.

FIG. 3 is a cross-sectional view of the structure of this semiconductor device, and 1 is the first
2 is an insulating film for laterally electrically insulating the semiconductor device; 3 is a gate insulating film; 4 is a gate electrode using a semiconductor thin film; 5 is a second A source region 6 is of a second conductivity type, for example n-type, and 18a and 18b are insulating films for electrically insulating gate electrode 4 and source region 5 or drain region 6. . In addition, 9 source electrodes,
10 is a drain electrode, and 11 is an insulating film for electrically insulating the gate electrode 4, source electrode 9, and drain electrode 10 from each other.

A semiconductor device having such a MOS FET structure was devised by connecting the interface between the source junction surface 5a, the drain junction surface 6a, the gate isolation film 3, and the semiconductor substrate 1, as shown in FIG. By aligning them on the same horizontal plane, the extension of the depletion layer from the source junction surface 5a and the drain junction surface 6a to just below the gate insulating film 3 is suppressed, and this appears in the threshold voltage and drain breakdown voltage. This is to reduce the size of semiconductor devices by suppressing the so-called short channel effect, and to promote higher performance of semiconductor devices.

Here, an example of a conventional manufacturing method for realizing such a structure is shown in FIG. This method is first shown in Figure 4 (ii).
As shown in FIG. 1, an insulating film 2 for electrically insulating and separating individual semiconductor devices is provided on the main surface side of a semiconductor substrate 1, and an insulating film 21 is formed in a region where semiconductor devices are to be manufactured. Thereafter, the main surface side of the semiconductor substrate 1 is covered with a resist 22, and only the resist in a region where a gate insulating film will be formed in the future is removed to expose the insulating film 21. Thereafter, the exposed portion of the insulating film 21 is removed by etching to expose the semiconductor substrate 1, and the semiconductor substrate 1 is further etched in a predetermined manner by an anisotropic etching method such as reactive ion etching or other ion beam etching. Dig deep. In this way, a groove 23 having a rectangular cross section is formed.

Next, as shown in FIG. 4(b), the sidewall 23a including the bottom of the groove 23 is oxidized to form a gate insulating film 3, and then a semiconductor film for gate electrode, for example, a multilayer film is formed on the main surface side of the semiconductor substrate 1. After forming a crystalline silicon film and forming a mask such as a resist having predetermined dimensions, the polycrystalline silicon film is processed to form a gate electrode 4. Next, impurities are added to the semiconductor region that will be used as the source and drain regions to form source and drain regions 5.6. Thereafter, wiring electrodes are formed according to the usual manufacturing process, thereby making it possible to form a semiconductor device having an MO8FfT structure as shown in FIG.

[Problem to be solved by the invention]

However, the above-mentioned conventional technology has the following problems. That is, first, as described in the above steps, the region where the gate insulating film 3 is formed is exposed to ions.
P holes have been dug using dry etching methods such as beam etching.

It is known that the dry etching method generally induces a high density of crystal defects in the vicinity of the etched exposed semiconductor surface 2311. These crystal defects are the source
Significantly increases drain-to-drain leakage current. Also, gate insulation! The state of the interface between A3 and the semiconductor substrate 1 deteriorates due to crystal defects, and the mobility of electrons or holes deteriorates due to this K. However, the only way to realize the structure shown in FIG. 3 is by dry etching, and therefore, it is extremely difficult to realize a semiconductor device with excellent operating characteristics using the structure and manufacturing method shown in FIG.

Second, as shown in FIG.
8a and 18b are formed simultaneously when the gate insulating film 3 is actually formed. In order to improve the performance of semiconductor devices, it is essential to reduce the size of the gate electrode and thin the gate insulating film. A 18 a and 18
It is difficult to increase the thickness of b and b, and as the gate electrode dimensions of semiconductor devices become /J% type, the proportion of overlapping large capacitances between the gate and source and between the gate and drain increases. This has the disadvantage that it hinders the high-speed operation of the device.

The present invention has been developed in view of the above points, and its purpose is to minimize crystal defects occurring in the semiconductor region forming the gate insulating film, and to provide a compact and high-speed semiconductor device. An object of the present invention is to provide a method for stably producing .

[Means to solve the problem]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention includes a step of forming an oxidation-resistant thin film on the main surface of a semiconductor substrate made of only a single crystal, and a step of forming the oxidation-resistant thin film on the semiconductor substrate. There is a step of etching and removing the planar region where the gate electrode is to be placed, and a step of etching the semiconductor substrate from which a portion of the oxidation-resistant thin film has been removed to expose the semiconductor substrate to an oxidizing atmosphere to place the gate electrode. a step of forming a selective oxide film of a predetermined thickness in the region from which the conductive thin film has been removed; and a step of forming a selective oxide film of a predetermined thickness in the region where the gate electrode formed in the above step is to be disposed. A step of exposing the semiconductor substrate under the selective oxide film, a step of exposing the semiconductor substrate to an oxidizing atmosphere to oxidize the exposed portion of the semiconductor substrate to form a gate insulating film, and a step of exposing at least the main portion of the semiconductor substrate. A step of depositing a semiconductor thin film to be used as a gate electrode material on the surface side, a step of etching the semiconductor thin film until the oxidation-resistant thin film is exposed on the main surface side of the semiconductor substrate, and a step of placing the semiconductor substrate in an oxidizing atmosphere. a step of oxidizing only the exposed surface vicinity of the semiconductor thin film by exposing it to the semiconductor substrate; a step of removing the oxidation-resistant thin film on the semiconductor substrate; and a step of removing the oxidation-resistant thin film remaining on at least the main surface side of the semiconductor substrate. This method includes a step of selectively etching and removing only the exposed region of the semiconductor thin film for the gate electrode.

[Effect]

Therefore, in the present invention, in order to arrange the interface between the gate insulating film and the semiconductor active region on the same horizontal plane as the source junction interface and the drain junction interface, when forming the groove for forming the gate electrode, By oxidizing the semiconductor substrate and removing the oxide using a chemical solution, crystal defects that degrade the operating characteristics of the semiconductor device are not generated at the semiconductor interface directly under the gate insulating film. In addition, when providing a gate electrode on the gate insulator, the gate electrode can be formed in a self-aligned manner without using a mask for gate electrode formation, and a thick insulating film can be provided between the gate electrode and the source and drain regions. The gap can be formed simultaneously when processing the gate electrode.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to FIGS. 1 and 2.

FIG. 1 is a structural sectional view showing an example of a semiconductor device that can be realized by the method of the present invention. In the figure, 1 is a single crystal semiconductor substrate of a first conductivity type, for example, p-type, 2 is an insulating film for laterally electrically insulating the semiconductor device, 3 is a gate insulating film, and 4 is a semiconductor thin film. This is the gate electrode. Further, 5 is a source region of a second conductivity type, for example, n-type, 6 is a drain region of n-type as well, 7 is an insulating film on gate electrode 4,
8a and 8b are insulating films provided on the side walls of the gate electrode 4, 9 is a source electrode, 10 is a drain electrode, and 11 is a gate electrode 4.
This is an insulating film for electrically insulating the source electrode 9 and the drain electrode 10 from each other.

Next, an example of the manufacturing method of the present invention for realizing such MO8FE'l' structure is shown in FIG. First, as shown in FIG. 2(a) K, an insulating film 2 for electrically insulating and separating individual semiconductor devices is, for example, selectively oxidized on the main surface side of a semiconductor substrate 1 made of single crystal silicon. A semiconductor oxide film 12 is formed in a region where a semiconductor device is to be manufactured. Thereafter, an oxidation-resistant film, for example, a silicon nitride film 13, is formed on the main surface side of the semiconductor substrate 1, and the top thereof is further covered with a resist 14. Next, only the resist in a predetermined region l1g1 (L in the figure) where a gate electrode will be formed in the future is removed to expose the silicon nitride film 13. Thereafter, the exposed portion of the silicon nitride film 13 is removed by, for example, chemical etching to expose the semiconductor oxide film 12.

Next, as shown in FIG. 2), after removing the resist 14 on the semiconductor substrate 1, the semiconductor substrate 1 is exposed to an oxidizing atmosphere to selectively coat only the portion where the silicon nitride film 13 has been removed. Oxidize for hours.

In this way, selective oxide film 15 is formed. At this time, as a feature of the selective oxidation method, an oxide film grows laterally under the silicon nitride film 13 by a distance L2.

Next, as shown in FIG. 2C, the selective oxide film 15 is removed by etching with a chemical solution containing hydrofluoric acid, for example, and the exposed surface of the semiconductor substrate 1 is oxidized to form the gate insulating film 3. Then, a semiconductor film for a gate electrode, such as a polycrystalline silicon film 16, is deposited on the main surface side of the semiconductor substrate so as to fill the region where the selective oxide film 15 was present.

Next, as shown in FIG. 2(d), the polycrystalline silicon film 16 on the main surface side of the semiconductor substrate 1 is etched by, for example, an anisotropic dry etching method so that selective oxidation #IS remains only in the region where it existed. etching. Thereafter, the semiconductor substrate 1 is exposed to an oxidizing atmosphere to form an insulating film, that is, an oxide layer 117, only on the exposed portion of the polycrystalline silicon film 161 left in the above step.

Next, as shown in FIG. 2(e), after the silicon nitride film 13 is removed by etching with a chemical solution containing heated phosphoric acid, the oxide film 7 is removed by, for example, an anisotropic dry etching method. Gate electrode 4 is formed by etching polycrystalline silicon 161 using a mask until lower gate insulating film 3 is exposed.

Next, as shown in FIG. 2 α), the exposed portion of the gate electrode 4 is oxidized and covered with insulating films 8m and 8b, and impurities are then ion-implanted into the semiconductor region that will become the source and drain regions. It is added and activated to form n-type source and drain/regions 5.6, and furthermore, an insulating film 1 is formed on the main surface side of the semiconductor substrate 1.

Thereafter, a source electrode 9 and a drain electrode 10 are formed according to a normal semiconductor device manufacturing method.
A semiconductor device having a MOS F g'r structure as shown in the figure can be manufactured.

According to the manufacturing method of the above embodiment, the trench dimension L1 of the oxidation-resistant thin film first formed on the semiconductor substrate is approximately equal to the width of the gate electrode finally formed. Therefore, the smaller the trench dimension L1 is, the higher the performance of the semiconductor device becomes. This Ll can be set up to the limit of current phosphorography technology), and if future development of phosphorography technology is taken into account, there is a limit to the miniaturization of the gate electrode size of a semiconductor device by the manufacturing method of the present invention.

Note that the present invention is not limited to the above-mentioned embodiments; for example, an oxidation-resistant thin film is formed on the main surface of a semiconductor substrate without any other thin film, or polycrystalline silicon is used as the gate electrode material. Various modifications may be made within the scope of the claims, such as using a semiconductor thin film made of other amorphous silicon or the like.

〔Effect of the invention〕

As explained above, according to the present invention, in the method of manufacturing a semiconductor device having a structure in which the interface between the gate insulating film and the semiconductor active region is located on approximately the same horizontal plane as the source junction interface and the drain junction interface, The following effects can be obtained by using oxidation of the semiconductor substrate and removal of the oxide using a chemical solution to form the groove for forming the gate electrode.

(1) Crystal defects are not generated in the region where the gate insulating film is formed. Therefore, leakage current between the source and drain does not increase. Furthermore, since the interface between the gate insulating film and the semiconductor substrate is in good condition, the mobility of electrons or holes does not deteriorate.

Q) Since the position and dimensions of the gate electrode can be uniquely determined using only a mask for forming grooves in the oxidation-resistant thin film, there is basically a limit to the miniaturization of gate electrodes in semiconductor devices. This is extremely advantageous for improving performance.

(3) It is easy to thicken the insulating film that separates the gate electrode from the source and drain regions;
This is advantageous for high-speed operation of the semiconductor device because the ratio of overlapping large capacitances between sources and between gates and drains can be reduced.

[Brief explanation of the drawing]

1 and 2 are structural cross-sectional views of a semiconductor device and its process cross-sectional views for explaining one embodiment of the manufacturing method of the present invention, and FIGS. 3 and 84 are structure of a semiconductor device showing an example of the conventional method. FIG. 2 is a cross-sectional view and a partial process cross-sectional view thereof. 1... Single crystal semiconductor substrate, 2... Insulating film, 3...
...Gate insulating film, 4...Gate electrode, 5...
- Source region, 6...Drain region, 7, 8a
, 8b... Insulating film, 9... Source electrode, 1
0...Drain electrode, -Insulating film, 12...Semiconductor oxide film, -Silicon nitride film (oxidation-resistant thin film), resist, 15...-Selective oxide film, ψ polycrystalline silicon film.

Claims (1)

[Claims] a step of forming an oxidation-resistant thin film on the main surface of a semiconductor substrate made of only a single crystal; a step of etching and removing a planar region of the oxidation-resistant thin film on the semiconductor substrate where a gate electrode is arranged; A step of exposing the semiconductor substrate from which a portion of the oxidation-resistant thin film has been removed to an oxidizing atmosphere and forming a selective oxide film of a predetermined thickness in the region from which the oxidation-resistant thin film has been removed in order to arrange a gate electrode. a step of removing only the selective oxide film in the area where the gate electrode formed in the above step is to be placed to expose the semiconductor substrate under the selective oxide film; and oxidizing the semiconductor substrate. a step of oxidizing the exposed portion of the semiconductor substrate to form a gate insulating film by exposing it to a chemical atmosphere, a step of depositing a semiconductor thin film to be used as a gate electrode material on at least the main surface side of the semiconductor substrate, and a step of depositing a semiconductor thin film to be used as a gate electrode material; etching the semiconductor thin film until the oxidation-resistant thin film is exposed on the main surface side;
oxidizing only the exposed surface vicinity of the semiconductor thin film by exposing the semiconductor substrate to an oxidizing atmosphere; removing the oxidation-resistant thin film on the semiconductor substrate; and at least the main surface of the semiconductor substrate. A method of manufacturing a semiconductor device, comprising the step of selectively etching and removing only the exposed region of the semiconductor thin film for gate electrode remaining on the side.