JPS6237429U - - Google Patents

Info

Publication number
JPS6237429U
JPS6237429U JP12890985U JP12890985U JPS6237429U JP S6237429 U JPS6237429 U JP S6237429U JP 12890985 U JP12890985 U JP 12890985U JP 12890985 U JP12890985 U JP 12890985U JP S6237429 U JPS6237429 U JP S6237429U
Authority
JP
Japan
Prior art keywords
input
output
stage
signal
input stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12890985U
Other languages
English (en)
Other versions
JPH066598Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985128909U priority Critical patent/JPH066598Y2/ja
Publication of JPS6237429U publication Critical patent/JPS6237429U/ja
Application granted granted Critical
Publication of JPH066598Y2 publication Critical patent/JPH066598Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Vessels, Lead-In Wires, Accessory Apparatuses For Cathode-Ray Tubes (AREA)
  • Amplifiers (AREA)

Description

【図面の簡単な説明】
第１図は、この考案の一実施例を示す回路図、
第２図及び第３図は従来の回路図。 １：入力端子、２，５，６，８，１４，１５：
抵抗器、３，１０，１１：トランジスタ、４，９
：キヤパシタ、７：定電圧源、１２：出力端子、
１３：偏向板のキヤパシタ、１６：出力端子１２
の出力電圧Ｅ０と逆極性の信号源０を示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. 入力信号が供給される入力端を有する入力段と
    出力端が容量性負荷に接続され、上記入力段の出
    力信号に応じて上記容量性負荷を駆動する出力段
    と、該出力段の出力端及び上記入力段の入力端子
    間に接続された負帰還回路とを具え、上記出力段
    は上記入力段の出力信号により駆動されたＮＰＮ
    形トランジスタと、コレクタが上記ＮＰＮ形トラ
    ンジスタのコレクタに接続されたＮＰＮ形トラン
    ジスタと、該ＰＮＰ形トランジスタのエミツタに
    第１抵抗器を介して第１所定電圧が供給されると
    共に、しかも出力段の出力信号と逆極性の信号が
    印加されることを特徴とする負帰還増幅回路。
JP1985128909U 1985-08-26 1985-08-26 負帰還増幅回路 Expired - Lifetime JPH066598Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985128909U JPH066598Y2 (ja) 1985-08-26 1985-08-26 負帰還増幅回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985128909U JPH066598Y2 (ja) 1985-08-26 1985-08-26 負帰還増幅回路

Publications (2)

Publication Number Publication Date
JPS6237429U true JPS6237429U (ja) 1987-03-05
JPH066598Y2 JPH066598Y2 (ja) 1994-02-16

Family

ID=31025005

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985128909U Expired - Lifetime JPH066598Y2 (ja) 1985-08-26 1985-08-26 負帰還増幅回路

Country Status (1)

Country Link
JP (1) JPH066598Y2 (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048536U (ja) * 1973-08-30 1975-05-13
JPS55137709A (en) * 1979-04-16 1980-10-27 Trio Kenwood Corp Push-pull amplifying circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048536U (ja) * 1973-08-30 1975-05-13
JPS55137709A (en) * 1979-04-16 1980-10-27 Trio Kenwood Corp Push-pull amplifying circuit

Also Published As

Publication number Publication date
JPH066598Y2 (ja) 1994-02-16

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