JPS6235642A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPS6235642A
JPS6235642A JP60175552A JP17555285A JPS6235642A JP S6235642 A JPS6235642 A JP S6235642A JP 60175552 A JP60175552 A JP 60175552A JP 17555285 A JP17555285 A JP 17555285A JP S6235642 A JPS6235642 A JP S6235642A
Authority
JP
Japan
Prior art keywords
groove
etching
mesa
semiconductor
semiconductor board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60175552A
Other languages
Japanese (ja)
Other versions
JPH0424860B2 (en
Inventor
Kenji Suzuki
健司 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP60175552A priority Critical patent/JPS6235642A/en
Publication of JPS6235642A publication Critical patent/JPS6235642A/en
Publication of JPH0424860B2 publication Critical patent/JPH0424860B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Dicing (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To produce within a short period of time a semiconductor element equipped with a desired area and mesa geometry by a method wherein a mesa groove is provided in one side or both sides of a semiconductor wafer before it is segmented into elements along the mesa groove. CONSTITUTION:A semiconductor wafer 1 coated with resist film 2 is placed in a mixed acid. The acid attacks the semiconductor wafer 1, whereby a mesa groove 6 is formed due to the etching effect. In the same process, a through connection is established between a groove 7 shaped after a linear pattern 5 and a groove 8 originating in a dicing groove 3 for the separation of a semiconductor section 11 outside the linear pattern 5, also due to the etching effect. After the separation, etching is stopped. Dicing or bending along the mesa groove 6 results in the segmentation of the semiconductor wafer 1 for the production of a semiconductor element. This method ensures uniform depth for a mesa groove by short-period application of etching for the realization of a semiconductor element equipped with a desired area and mesa geometry.

Description

【発明の詳細な説明】[Detailed description of the invention] 【発明の属する技術分野】[Technical field to which the invention pertains]

本発明は、半導体板の片面あるいは両面よりメサ溝を形
成したのち、ダイシング等によりメサ溝部で分割して素
子片を形成する半導体素子の製造方法に関する。
The present invention relates to a method for manufacturing a semiconductor device, in which a mesa groove is formed on one or both sides of a semiconductor board, and then the semiconductor board is divided at the mesa groove portion by dicing or the like to form device pieces.

【従来技術とその問題点】[Prior art and its problems]

半導体板にメサ溝を形成する方法としては、弗酸、硝酸
、酢酸などの混酸をエツチング液として用い、その中に
表面を樹脂膜等によって保護し、メサ溝形成部のみを露
出させた半導体板を浸漬し、揺動することによってエツ
チングする方法が多用されている。ところが、この場合
エツチング条件、すなわち半導体板の枚数、メサ溝のパ
ターン、エツチング液の配合あるいは温度、エツチング
液量。 揺動方法等が明らかに異なる時はもちろん、それらの微
小な差異あるいはばらつきによってもエツチング速度が
変化し、同一時間エツチングを行っても形成されるメサ
溝深さが異なってしまうことが多い、メサ溝深さが異な
ると各素子片のメサ溝形状あるいは面積に差が生じ、所
望の特性が得られなくなる。従って、メサ溝が深くなり
過ぎることを防止するため、エツチングを途中で中断し
、エツチングで生じた溝深さを測定してから再エツチン
グするというサイクルを何度か繰り返して目標のメサ溝
深さを得るという方法を取らざるを得なかった。このた
め、常に均一なメサ溝深さを得るためには、メサ溝形成
に要する時間が非常に多くなるという欠点があった。
A method for forming mesa grooves on a semiconductor board is to use a mixed acid such as hydrofluoric acid, nitric acid, and acetic acid as an etching solution, and then protect the surface of the semiconductor board with a resin film or the like, exposing only the mesa groove formation area. A method of etching by dipping and shaking is often used. However, in this case, the etching conditions, ie, the number of semiconductor boards, the pattern of the mesa grooves, the composition or temperature of the etching solution, and the amount of the etching solution. The etching speed changes not only when the rocking methods are clearly different, but also due to minute differences or variations in them, and the depth of the mesa groove formed often differs even if etching is performed for the same time. If the groove depths differ, there will be differences in the mesa groove shape or area of each element piece, making it impossible to obtain desired characteristics. Therefore, in order to prevent the mesa groove from becoming too deep, the etching process is stopped midway, the groove depth created by etching is measured, and the etching process is repeated several times to reach the target mesa groove depth. I had no choice but to take the method of obtaining . Therefore, in order to always obtain a uniform mesa groove depth, there is a drawback that it takes a very long time to form the mesa groove.

【発明の目的】[Purpose of the invention]

本発明は、上述の欠点を除いてエツチング深さの測定、
再エツチングの繰り返しをすることなく、短時間のエツ
チング操作により常に均一なメサ溝深さを形成し、所望
の面積およびメサ形状を有する素子片を得ることができ
る半導体素子の製造方法を提供することを目的とする。
The present invention eliminates the above-mentioned drawbacks and provides a method for measuring etching depth.
To provide a method for manufacturing a semiconductor device, capable of always forming a uniform mesa groove depth through short-time etching operations without repeating re-etching, and obtaining a device piece having a desired area and mesa shape. With the goal.

【発明の要点】[Key points of the invention]

本発明によれば、半導体板の縁部に、半導体板の裏面か
ら所定の深さを有し、半導体板の周辺から周辺まで達す
る線状溝を機械加工により形成し、表面からエツチング
によるメサ溝形成を行なう際に、同時に前記線状溝に対
向する線状表面部分からもエツチングして、エツチング
により線状部分が貫通し、半導体板の縁部が分離した時
点でエツチングを停止することによって上記の目的が達
成される。
According to the present invention, a linear groove having a predetermined depth from the back surface of the semiconductor board and reaching from the periphery of the semiconductor board to the periphery is formed at the edge of the semiconductor board by machining, and a mesa groove is formed by etching from the surface. When performing the formation, etching is also performed from the linear surface portion facing the linear groove, and the etching is stopped when the linear portion penetrates through the etching and the edge of the semiconductor board is separated. objectives are achieved.

【発明の実施例】[Embodiments of the invention]

第1図181.Q)lおよび第2図は本発明の一実施例
を示す、第1図(alに示すように半導体板1の下面を
レジスト2で覆い、ダイシングによりlさtの溝3を形
成する。次に上面に従来のメサ溝形成と同様な線状露出
パターン4を有するレジスト2を塗布する。この場合、
ダイシング溝3に対向する上面側にも直線露出パターン
5を形成する。この直線パターン5およびその下側の1
l13は第2図に示すように半導体板の縁部に設けられ
る。このようにレジストで被覆した半導体板1を混酸内
に浸漬すると、第1図中)に示すようにエツチングにょ
リメサ溝6が形成されるが、同時に直線パターン5から
形成された1ij7とダイシング溝3からのエツチング
の進行により形成された溝8とがつながり、直線パター
ン5より外側の半導体板部分11が分離する。この分離
を作業者が認めてエツチングを停止する。このあとダイ
シングまたは折り曲げによってメサ溝6の部分で半導体
板1を分離して素子片を得る。直線パターン5およびダ
イシング溝3は半導体板の余白部に設けられているから
、素子片の取れ数には影響を与えない、エツチング時に
は、上述のようにダイシング溝3からもエツチングが進
行するので、半導体板の縁部11の分離するまでに形成
されるメサ溝6の深さとダイシング1l13の深さtの
関係を予め調べ、第3図のような線図を得ておけば、ダ
イシング溝深さtの設定により常に所望の深さのメサ溝
6を形成することができる。 第4図(al、(blは別の実施例を示し、この場合は
両メサ形状の素子が製造される。第4図falに示すよ
うにダイシング溝3を予め形成しておき、レジスト2の
n出パターン51がダイシング溝3の露出部分にも設け
られている。第4図世)に示すように、上面からのエツ
チング溝7とダイシング溝3から進行したエツチング溝
8の接続により半導体板の縁部11が分離し、それによ
りエツチングの終期を決定して均一な深さのメサ溝6を
両面から形成することができる。
Figure 1 181. Q) 1 and 2 show one embodiment of the present invention. As shown in FIG. 1 (al), the lower surface of the semiconductor board 1 is covered with a resist 2, and a groove 3 of length 1 x t is formed by dicing.Next A resist 2 having a linear exposed pattern 4 similar to conventional mesa groove formation is applied on the upper surface.
A linear exposed pattern 5 is also formed on the upper surface side facing the dicing groove 3. This straight line pattern 5 and its lower part 1
113 is provided at the edge of the semiconductor board as shown in FIG. When the semiconductor board 1 coated with the resist is immersed in a mixed acid, an etched mesa groove 6 is formed as shown in FIG. The grooves 8 formed by the progress of etching are connected, and the semiconductor plate portions 11 outside the linear pattern 5 are separated. The operator recognizes this separation and stops etching. Thereafter, the semiconductor board 1 is separated at the mesa groove 6 by dicing or bending to obtain element pieces. Since the linear patterns 5 and the dicing grooves 3 are provided in the margins of the semiconductor board, they do not affect the number of element pieces that can be removed.During etching, etching also proceeds from the dicing grooves 3 as described above. If the relationship between the depth of the mesa groove 6 formed before the edge 11 of the semiconductor board is separated and the depth t of the dicing 1l13 is investigated in advance and a diagram as shown in FIG. 3 is obtained, the dicing groove depth can be determined. By setting t, it is possible to always form the mesa groove 6 with a desired depth. FIG. 4 (al, (bl) shows another example, in which both mesa-shaped elements are manufactured. As shown in FIG. 4 fal, dicing grooves 3 are formed in advance, and the resist 2 is An exposed pattern 51 is also provided in the exposed portion of the dicing groove 3. As shown in Fig. 4), the etching groove 7 from the top surface and the etching groove 8 extending from the dicing groove 3 are connected to each other to form a pattern on the semiconductor substrate. The edges 11 are separated, thereby determining the end of the etching and making it possible to form mesa grooves 6 of uniform depth from both sides.

【発明の効果】【Effect of the invention】

本発明によれば、半導体板へのエツチングにょるメサ溝
形成時に予め裏面より半導体板の周辺から周辺に達する
線状溝を形成しておき、表面側からのエツチング溝がそ
の線状溝から進行したエツチング溝とつながることによ
ってエツチング終期を決定することにより、エツチング
の中断、エツチング深さの測定の繰り返しの必要がなく
なり、メサ溝形成時間を大幅に短縮できる。そしてエツ
チング条件が異なっても常に所定の深さのメサ溝が形成
でき、特性均一の半導体素子の製造に対して極めて有効
である。
According to the present invention, when forming a mesa groove on a semiconductor board by etching, a linear groove reaching from the periphery of the semiconductor board to the periphery is formed in advance from the back side, and the etching groove from the front side advances from the linear groove. By determining the final stage of etching by connecting with the etched groove, there is no need to interrupt etching or repeatedly measure the etching depth, and the mesa groove formation time can be significantly shortened. Even if the etching conditions are different, a mesa groove of a predetermined depth can always be formed, which is extremely effective for manufacturing semiconductor elements with uniform characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるメサ溝形成の工程を
示す断面図、第2図は第1図181に対応する平面図、
第3図は形成されるメサ溝深さとダイシング溝深さの関
係線図、第4図は異なる実施例におけるメサ溝形成の工
程を示す断面図である。 1:半導体板、2;レジスト、3:ダイシング溝、4.
5:露出パターン、11:半導体板分離部。 第1図 第2図 り゛イシン7゛溝運さくt) 第3図
FIG. 1 is a sectional view showing the process of forming a mesa groove in an embodiment of the present invention, FIG. 2 is a plan view corresponding to FIG. 1 181,
FIG. 3 is a relationship diagram between the depth of the mesa groove to be formed and the depth of the dicing groove, and FIG. 4 is a sectional view showing the process of forming the mesa groove in a different embodiment. 1: semiconductor board, 2: resist, 3: dicing groove, 4.
5: exposed pattern, 11: semiconductor board separation part. Figure 1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1)半導体板の表面よりエッチングによりメサ溝を形成
したのちメサ溝部で半導体板を分割して素子片を得る方
法において、半導体板の縁部に、半導体板の裏面から所
定の深さを有し、半導体板の周辺から周辺まで達する線
状溝を機械加工により形成し、メサ溝形成のためのエッ
チング時に同時に前記線状溝に対向する線状表面部分か
らもエッチングして、エッチングにより線状部分が貫通
し、半導体板の縁部が分離した時点でエッチングを停止
することを特徴とする半導体素子の製造方法。
1) In a method in which a mesa groove is formed by etching from the surface of a semiconductor board and then the semiconductor board is divided at the mesa groove to obtain element pieces, the edge of the semiconductor board has a predetermined depth from the back surface of the semiconductor board. , a linear groove reaching from the periphery to the periphery of the semiconductor board is formed by machining, and during etching to form a mesa groove, etching is simultaneously performed from the linear surface portion opposite to the linear groove, and the linear portion is formed by etching. A method for manufacturing a semiconductor device, characterized in that etching is stopped when the etching is penetrated and the edge of the semiconductor board is separated.
JP60175552A 1985-08-09 1985-08-09 Manufacture of semiconductor element Granted JPS6235642A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60175552A JPS6235642A (en) 1985-08-09 1985-08-09 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60175552A JPS6235642A (en) 1985-08-09 1985-08-09 Manufacture of semiconductor element

Publications (2)

Publication Number Publication Date
JPS6235642A true JPS6235642A (en) 1987-02-16
JPH0424860B2 JPH0424860B2 (en) 1992-04-28

Family

ID=15998074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60175552A Granted JPS6235642A (en) 1985-08-09 1985-08-09 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPS6235642A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5593815A (en) * 1989-07-31 1997-01-14 Goldstar Co., Ltd. Cleaving process in manufacturing a semiconductor laser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5593815A (en) * 1989-07-31 1997-01-14 Goldstar Co., Ltd. Cleaving process in manufacturing a semiconductor laser

Also Published As

Publication number Publication date
JPH0424860B2 (en) 1992-04-28

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