JPS6235534A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To compose a trench capacitor by forming an oxide film or a nitride film on the inner surface of a groove, and forming a polycrystalline silicon layer in the groove to form a separating region between the elements by a low temperature process, thereby utilizing the separating region. CONSTITUTION:An oxide film or a nitride film 14 is formed by a plasma anodic oxidation method or a nitriding method on a semiconductor substrate 11 which contains the inner surface of a groove 13. A polycrystalline silicon layer 15 is grown by an LPCVD method on the entire surface which contains the groove 13 to completely bury the groove 13 and to flatten the surface. According to this, there is no possibility of causing a deformation in the formation of a separating region, possibility of forming by a low temperature process, and no bird beak in case of forming an element. The narrowing of an element region is eliminated, a separation between the elements in the same separating width can be obtained, and the surface can be flattened.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for forming an inter-element isolation region in a semiconductor device and a method for forming a wrench capacitor (using the isolation region). It is.

[Conventional technology]

As a conventional method for forming an isolation region in this type of semiconductor device, a method described in Japanese Patent Application Laid-Open No. 153349/1982 is shown in the order of steps in FIGS. 3(a) to 3(N).

In each of these figures, the conventional method first forms a silicon dioxide film 22 on a silicon semiconductor substrate 21 by a thermal oxidation method, forms a silicon nitride film 23 thereon, and forms a photoresist film 25 having an element region shape. (see figure (
a)). Using the photoresist film 25 as a sputter etching-resistant mask, one-reactive sputter etching is performed to remove the underlying silicon nitride film 23. Silicon dioxide film 22. After selectively etching and removing the silicon semiconductor substrate 21 to form a trench A, the photoresist film 25 serving as a mask is removed (FIG. 2(b)).

Next, a silicon dioxide film 27 is formed on the inner surface of the trench, and an impurity layer 26 of the same conductivity type as the substrate is ion-implanted into the bottom of the trench using the silicon nitride film 23 covering the element region as an ion implantation-resistant mask. ((C) in the same figure), and a silicon dioxide film 2? is formed on the entire surface by CVD method. A is formed (FIG. 2(d)), but due to the formation of this silicon dioxide film 27a, the opening shape at the top of the trench A becomes an inverted V-shape, which allows the polycrystalline silicon to wrap around easily in the first step. Become,
The surface can be flattened.

Next, polycrystalline silicon layer 2? After the polycrystalline silicon layer 27b is grown on the entire surface to completely fill the groove A and flatten the surface (FIG. 2(e)), the polycrystalline silicon layer 27b is selectively etched to below the interface of the silicon dioxide film 27a. ((f) in the same figure). Then, the polycrystalline silicon layer 27b left in the trench A is oxidized by a thermal oxidation method to form a silicon dioxide film 2.
7c and flatten its surface ((g) in the same figure).
) is the silicon dioxide film 2 formed inside this groove at this time.
7c reaches a predetermined depth below the substrate surface, and the amount, or depth, varies depending on each device manufactured, but in the case of a normal n-channel silicon gate MOS transistor, about aoooX is sufficient.

Subsequently, a silicon dioxide film 27a is formed on the surface.

27c is selectively etched away to the substrate surface using the etching-resistant mask of the silicon nitride film 23, and then
Silicon nitride l1923. The silicon dioxide film 22 is removed to form a desired isolation region between elements (FIG. 4(h)).

In the device isolation region obtained in this way, there is no risk of so-called bird's beaks being formed when the region is formed, and the narrowness of the device region is eliminated, and the surface is flattened. Furthermore, by making the depth of the groove even deeper, it is possible to perform isolation between elements with the same isolation width even in a deep diffusion layer that spreads in the depth direction. High integration can be achieved.

[Problem that the invention seeks to solve]

However, in the conventional semiconductor device manufacturing method described above, the trench for forming the isolation region is thermally oxidized, which is a so-called high-temperature process, and the shape of the impurity profile etc. There is a problem in that it is easy to change and therefore is not suitable for miniaturization of element formation.

This invention was made in order to improve these conventional problems, and its purpose is to make it possible to form isolation regions between elements by a low-temperature process, and to make it possible to utilize the same isolation regions. An object of the present invention is to provide a method for manufacturing a semiconductor device in which a trench capacitor is configured using the following methods.

[Means for solving problems]

A method for manufacturing a semiconductor device according to the present invention includes forming an oxide film or a nitride film on the inner surface of a groove on a semiconductor substrate using plasma anodic oxidation or nitriding, and forming a polycrystalline silicon layer within the groove. An isolation region between elements is formed, and an electrode is formed on the polycrystalline silicon layer formed in the isolation region to form a trench capacitor.

[For production]

Therefore, in the present invention, by using plasma anodic oxidation or nitriding to form an oxide film or nitride film on the inner surface of the groove, it is possible to form an undeformed isolation region between elements in a low-temperature process. The formed polycrystalline silicon layer can also be effectively used as a trench capacitor.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1 and 2.

FIGS. 1(a) through r) and FIGS. 2(a) through e) are cross-sectional views showing, in order of steps, a method for manufacturing a semiconductor device to which the first and second embodiments of the present invention are applied. . In the drawings of the first and second embodiments, the same reference numerals as in the drawings of the conventional example indicate the same or corresponding parts.

The method of the first embodiment shown in FIGS. 1(a) to 1f) first forms a photoresist film 12 having the shape of an element region on a silicon semiconductor substrate 11 (see FIG. 1(a)). As a sputter etching mask, the semiconductor substrate 11 is selectively etched and removed by reactive sputter etching to form a groove 13, and then the photoresist film 12 as a mask is removed (FIG. 2(b)).
.

Next, on the surface of the semiconductor substrate 11 including the inner surface of the groove portion 3,
Oxide film (
A polycrystalline silicon layer 15 is grown on the entire surface including the groove 13 by LPCVD to completely fill the groove 13 and flatten the surface. ((d) in the same figure).

Subsequently, using a gas having a high selectivity between the oxide film (or 11% nitride) 14 and the polycrystalline silicon layer 15, the polycrystalline silicon layer 15 is selectively etched to the surface of the semiconductor substrate 11. After that, the oxide film (or nitride film) 14 on the surface of the semiconductor substrate 11 is selectively etched away by, for example, RIE anisotropic etching, leaving the polycrystalline silicon layer 15a (FIG. 2(e)). Figure (f)).

In other words, by performing one or more of the steps of the first embodiment, it is possible to form a desired isolation region between elements, which has the same features as the conventional example, and is suitable for high integration of elements. Plasma anodic oxidation (or nitriding) is used to form the oxide film (or nitride film) on the inner surface of the trench for region formation, so there is no risk of deformation in the isolation region formation, and formation can be done in a low-temperature process. It becomes possible.

In addition, the second embodiment method shown in FIGS. 2(a) to e) is as follows:
Similar to the method of the first embodiment, the silicon semiconductor substrate ll
A photoresist film 12 having the shape of an element region is formed on top of the photoresist film 12 (FIG. 2(a)), and using this photoresist film 12 as a spatter-resistant etching mask, a groove 13 is formed by reactive spur and sputter etching, and the photoresist film 12 is ((b) in the same figure), and then an oxide film (or nitride film) 14 is formed on the surface of the semiconductor substrate 11 including the inner surface of the groove portion 13 by a plasma anodizing method (or nitriding method). Figure (C)).

Next, a polycrystalline silicon layer 15 is grown on the entire surface including the groove 13 by the LPCiVD method, the groove 13 is completely buried and the surface is flattened (FIG. 1D), and the polycrystalline silicon layer 15 corresponding to the groove 13 is grown. A photoresist film 18 having an electrode shape is formed on the layer 15, and using this photoresist film 16 as an etching mask, the polycrystalline silicon layer 15 is selectively etched away by, for example, RIE anisotropic etching. A trench capacitor is constructed using polycrystalline silicon layer 15b as an electrode.

That is, through one or more steps of the second embodiment, plasma is used to form an oxide film (or nitride film) on the inner surface of the trench for forming the element and for forming the isolation region, which also has the same characteristics as the conventional example. Since we used the anodic oxidation (or nitriding) method,
Since it can be formed in a low-temperature process, there is no risk of shape change, and furthermore, the polycrystalline silicon formed in the isolation region can be effectively used as a trench capacitor.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, a groove is formed on the surface of a semiconductor substrate, an oxide film or a nitride film is formed on the inner surface of the groove using plasma anodization or nitriding, and Since the isolation region between elements is formed by forming a polycrystalline silicon layer, there is no risk of deformation in forming the isolation region, it can be formed in a low-temperature process, and it is easy to use when forming the elements. , so-called bird's beaks are not formed, and the narrowness of the element area is eliminated, and the elements can be isolated with the same isolation width, and the surface is flattened, making it easy to form elements at the same time. As a result, the device can be highly integrated, and by forming an electrode on the polycrystalline silicon layer formed in the isolation region, this isolation region can be effectively used as a trench capacitor. It is something that you have.

[Brief explanation of drawings]

1(a) to f) and FIG. 2(a) to e) are cross-sectional views showing, in order of steps, a method for manufacturing a semiconductor device to which the first and second embodiments of the present invention are applied, respectively. , and FIGS. 3(a) to 3(h) are cross-sectional views showing a conventional method for manufacturing a semiconductor device in the order of steps. 11... Silicon semiconductor substrate, 12.18...
Photoresist film, 13... Groove, 14... Oxidation 11! J (or nitride film), 15.15a, 15b
...Polycrystalline silicon layer. Agent Masuo Oiwa Figure 1 (d) 15, % Beast 1e Shi 11 Kun λ Figure 2 (a) (e) (C) (d) R 15b = Todoro Tasado silicon layer 16: Ding - Tresist P ship Figure 3 (α) (e) (d) (h) 2. Name of the invention Method for manufacturing semiconductor devices 3. Person making the amendment Representative Moriya Shiki 4. Agent address Chiyoda, Tokyo The "3" on page 7, line 15 of the specification of Kuumaru no Potter Chome No. 2-3 is corrected to "13". 1, -
゛...-2,7 or more

Claims (2)

[Claims] (1) After selectively etching a semiconductor substrate to form a groove, forming an oxide or nitride film on the inner surface of the groove by plasma anodization or nitriding; and forming an oxide or nitride film on the inner surface. filling the formed groove with a polycrystalline silicon film and flattening the surface;
and selectively etching away the polycrystalline silicon film to below the interface of the oxide film or nitride film, leaving the polycrystalline silicon film in the trench, thereby forming an isolation region between elements. manufacturing method. (2) After selectively etching the semiconductor substrate to form a groove, forming an oxide or nitride film on the inner surface of the groove by plasma anodization or nitriding; and forming an oxide or nitride film on the inner surface. filling the formed groove with a polycrystalline silicon film and flattening the surface;
selectively etching away the polycrystalline silicon film to below the interface of the oxide film or nitride film, leaving the polycrystalline silicon film in the trench portion and on the surface in an amount equivalent to the shape of the electrode, A method for manufacturing a semiconductor device, comprising a capacitor.