JPS6232812B2 - - Google Patents
Info
- Publication number
- JPS6232812B2 JPS6232812B2 JP54120190A JP12019079A JPS6232812B2 JP S6232812 B2 JPS6232812 B2 JP S6232812B2 JP 54120190 A JP54120190 A JP 54120190A JP 12019079 A JP12019079 A JP 12019079A JP S6232812 B2 JPS6232812 B2 JP S6232812B2
- Authority
- JP
- Japan
- Prior art keywords
- microprocessor
- clock
- latch
- signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US95367478A | 1978-10-23 | 1978-10-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5556255A JPS5556255A (en) | 1980-04-24 |
JPS6232812B2 true JPS6232812B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1987-07-16 |
Family
ID=25494376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12019079A Granted JPS5556255A (en) | 1978-10-23 | 1979-09-20 | Data processing system |
Country Status (4)
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5663656A (en) * | 1979-10-25 | 1981-05-30 | Nec Corp | Information processing unit |
DE3138971A1 (de) * | 1981-09-30 | 1983-04-21 | Siemens AG, 1000 Berlin und 8000 München | Mikroprogrammiertr prozessor und verfahren zu seinembetrieb |
EP0082903B1 (fr) * | 1981-12-29 | 1987-05-13 | International Business Machines Corporation | Unité de commande pouvant être connectée à deux mémoires de vitesses différentes |
JPH03260832A (ja) * | 1990-03-12 | 1991-11-20 | Fujitsu Ltd | マイクロプログラム制御装置 |
EP0477599A3 (en) * | 1990-09-26 | 1993-11-10 | Siemens Ag | Control store for a processor comprising several processing elements |
JPH04293124A (ja) * | 1991-03-20 | 1992-10-16 | Hitachi Ltd | データ処理プロセッサ |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2226901A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1973-04-19 | 1974-11-15 | Honeywell Bull Soc Ind |
-
1979
- 1979-09-20 JP JP12019079A patent/JPS5556255A/ja active Granted
- 1979-09-24 EP EP79103609A patent/EP0010193B1/de not_active Expired
- 1979-09-24 DE DE7979103609T patent/DE2965741D1/de not_active Expired
- 1979-09-28 IT IT26083/79A patent/IT1162588B/it active
Also Published As
Publication number | Publication date |
---|---|
IT1162588B (it) | 1987-04-01 |
EP0010193A1 (de) | 1980-04-30 |
EP0010193B1 (de) | 1983-06-22 |
IT7926083A0 (it) | 1979-09-28 |
JPS5556255A (en) | 1980-04-24 |
DE2965741D1 (en) | 1983-07-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4366540A (en) | Cycle control for a microprocessor with multi-speed control stores | |
US4870562A (en) | Microcomputer capable of accessing internal memory at a desired variable access time | |
US7058945B2 (en) | Information processing method and recording medium therefor capable of enhancing the executing speed of a parallel processing computing device | |
US5870602A (en) | Multi-processor system with system wide reset and partial system reset capabilities | |
US4386401A (en) | High speed processing restarting apparatus | |
US4172281A (en) | Microprogrammable control processor for a minicomputer or the like | |
JPH07210129A (ja) | ビデオramにおける自己タイミング式リアルタイム・データ転送 | |
US5537582A (en) | Bus interface circuitry for synchronizing central processors running at multiple clock frequencies to other computer system circuitry | |
US3961312A (en) | Cycle interleaving during burst mode operation | |
US4953078A (en) | Apparatus and method for multi-threaded program execution in a microcoded data processing system | |
JPS6232812B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
JP4482275B2 (ja) | オペレーティングシステムサポートのために一定の時間基準を用いるマルチモード電力管理システムのハードウェアアーキテクチャ | |
KR900012156A (ko) | 공유 제어 기억부를 가진 멀티프로세서 제어기 및 그 동기화 방법 | |
JPH0844594A (ja) | データ処理装置 | |
JPS5911921B2 (ja) | 数値制御装置 | |
US7441138B2 (en) | Systems and methods capable of controlling multiple data access using built-in-timing generators | |
US5163135A (en) | Computer system and method for setting recovery time upon execution of an I/O command | |
US4567571A (en) | Memory control for refreshing in a step mode | |
JPH0143392B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
JP3169878B2 (ja) | メモリ制御回路 | |
JPH05107314A (ja) | Ic試験装置 | |
JP3405513B2 (ja) | プログラマブルコントローラの二重化制御装置 | |
KR100200769B1 (ko) | 중앙 처리 장치의 출력제어회로 | |
JP2544015B2 (ja) | マイクロプログラム処理装置 | |
JP2684663B2 (ja) | マイクロプログラム制御回路 |