JPS6231149A - Semiconductor intergrated circuit device - Google Patents
Semiconductor intergrated circuit deviceInfo
- Publication number
- JPS6231149A JPS6231149A JP17070285A JP17070285A JPS6231149A JP S6231149 A JPS6231149 A JP S6231149A JP 17070285 A JP17070285 A JP 17070285A JP 17070285 A JP17070285 A JP 17070285A JP S6231149 A JPS6231149 A JP S6231149A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- circuit device
- silicon resistor
- contact hole
- wiring layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体集積回路装置に関し、特に半導体集積
回路装置(以下ICと略記する)上に形成された多結晶
シリコン抵抗の熱放散性に優れたICに関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor integrated circuit device, and particularly to the heat dissipation properties of a polycrystalline silicon resistor formed on a semiconductor integrated circuit device (hereinafter abbreviated as IC). Regarding excellent IC.
従来、消費電力の大きいICにおいて熱放散が充分行な
われない場合、熱放散をよくするためIC上の素子の配
置を工夫する方法がとられ、具体的対策としては、発熱
源である抵抗をIC上に分散させていた。Conventionally, when heat dissipation is not sufficient in an IC that consumes a large amount of power, methods have been taken to improve heat dissipation by arranging elements on the IC. It was dispersed on top.
従来のIC上に形成された抵抗のうち、特に多結晶シリ
コン抵抗の場合は、それぞれの多結晶シリコン抵抗をI
C上に分散するよう配置しても、多結晶シリコンが熱伝
導性に劣る絶縁膜にとり囲まれているため、効率よい熱
放散が行なわれないという欠点があった。Among the resistors formed on conventional ICs, especially in the case of polycrystalline silicon resistors, each polycrystalline silicon resistor is
Even if the polycrystalline silicon is disposed so as to be dispersed on C, efficient heat dissipation cannot be achieved because the polycrystalline silicon is surrounded by an insulating film having poor thermal conductivity.
本発明は上記した従来の欠点を除去し、半導体集積回路
装置上に形成した多結晶シリコン抵抗の熱放散を良好に
した半導体集積回路装置を提供することを目的とする。SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor integrated circuit device which eliminates the above-mentioned conventional drawbacks and improves heat dissipation of a polycrystalline silicon resistor formed on the semiconductor integrated circuit device.
本発明の半導体集積回路装置は、半導体集積回路装置上
に形成された多結晶シリコン抵抗と、該多結晶シリコン
上に形成された絶縁膜と、前記多結晶シリコン抵抗の両
端電極間の多結晶シリコン抵抗上の絶縁膜に設けられた
コンタクト孔と、該コンタクト孔を介して多結晶シリコ
ン抵抗に接続され電気的に他の領域と独立した配線層と
を有することにより構成される。The semiconductor integrated circuit device of the present invention includes a polycrystalline silicon resistor formed on the semiconductor integrated circuit device, an insulating film formed on the polycrystalline silicon, and a polycrystalline silicon resistor between both end electrodes of the polycrystalline silicon resistor. It is constructed by having a contact hole provided in an insulating film on the resistor, and a wiring layer connected to the polycrystalline silicon resistor through the contact hole and electrically independent from other regions.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の第1の実施例のIC上に形成された多
結晶シリコン抵抗の平面図であり、第2図は第1図のA
−A’線断面図である。FIG. 1 is a plan view of a polycrystalline silicon resistor formed on an IC according to a first embodiment of the present invention, and FIG.
-A' line sectional view.
第1図及び第2図に示すように、Si基板1上に配置さ
れた多結晶シリコン抵抗2の両端に電極3があり、電極
間の多結晶シリコン上にコンタクト孔4を有し、配線層
5が前記コンタクト孔3通して多結晶シリコンに接続さ
れ、他には電気的に接続されてな(IC表面に露出して
いる。A−A’線断面図では、多結晶シリコン抵抗は、
配線層と絶縁膜6に接している。As shown in FIGS. 1 and 2, there are electrodes 3 at both ends of a polycrystalline silicon resistor 2 arranged on a Si substrate 1, a contact hole 4 is formed on the polycrystalline silicon between the electrodes, and a wiring layer is formed. 5 is connected to the polycrystalline silicon through the contact hole 3, and the others are not electrically connected (exposed on the IC surface. In the sectional view taken along the line A-A', the polycrystalline silicon resistor is
It is in contact with the wiring layer and the insulating film 6.
第3図は、本発明の第2の実施例であり、第1の実施例
のIC表面に露出する配線層の大きさを、前記多結晶シ
リコン抵抗の大きさ以下にしたものである。FIG. 3 shows a second embodiment of the present invention, in which the size of the wiring layer exposed on the IC surface of the first embodiment is made smaller than the size of the polycrystalline silicon resistor.
第4図は、本発明の第3の実施例であり、第1の実施例
のコンタクトとIC表面に露出する配線層の組を多結晶
シリコン抵抗の両端電極間に2個有するものである。FIG. 4 shows a third embodiment of the present invention, in which two pairs of the contacts of the first embodiment and a wiring layer exposed on the IC surface are provided between both end electrodes of a polycrystalline silicon resistor.
し発明の効果〕
以上説明したように本発明は、IC上に形成された多結
晶シリコン抵抗の両端電極間の多結晶シリコン上にコン
タクトをおき、前記コンタクトにより一方を多結晶シリ
コンに接続され、他方は電気的に接続されずIC表面に
露出する配線層を配置することにより、多結晶シリコン
抵抗で発生する熱をIC外に放散する効果がある。[Effects of the Invention] As explained above, the present invention provides a method in which a contact is placed on the polycrystalline silicon between both end electrodes of a polycrystalline silicon resistor formed on an IC, one end is connected to the polycrystalline silicon by the contact, On the other hand, by arranging a wiring layer that is not electrically connected and exposed on the IC surface, it is effective to dissipate the heat generated by the polycrystalline silicon resistor to the outside of the IC.
第1図は本発明の第1の実施例の平面図、第2図は第1
図のA−A”線断面図、第3図、第4図はそれぞれ本発
明の第2及び第3の実施例の平面図である。
1・・・Si基板、2・・・多結晶シリコン抵抗、3・
・・多結晶シリコン抵抗の電極、4・・・コンタクI・
孔、5・・・I C表面に露出した配線層、6・・・絶
縁膜。
痔/圓
惰2回FIG. 1 is a plan view of the first embodiment of the present invention, and FIG. 2 is a plan view of the first embodiment of the present invention.
The sectional view taken along the line A-A'' in the figure, FIGS. 3 and 4 are plan views of the second and third embodiments of the present invention, respectively. 1...Si substrate, 2...Polycrystalline silicon resistance, 3.
・Polycrystalline silicon resistor electrode, 4...Contact I・
Hole, 5... Wiring layer exposed on the IC surface, 6... Insulating film. Hemorrhoids/Enja 2 times
Claims (1)
と、該多結晶シリコン抵抗上に形成された絶縁膜と、前
記多結晶シリコン抵抗の両端電極間の多結晶シリコン抵
抗上の絶縁膜に設けられたコンタクト孔と、該コンタク
ト孔を介して多結晶シリコン抵抗に接続され電気的に他
の領域と独立した配線層とを有することを特徴とする半
導体集積回路装置。A polycrystalline silicon resistor formed on a semiconductor integrated circuit device, an insulating film formed on the polycrystalline silicon resistor, and an insulating film on the polycrystalline silicon resistor between both end electrodes of the polycrystalline silicon resistor. 1. A semiconductor integrated circuit device comprising: a contact hole; and a wiring layer connected to a polycrystalline silicon resistor through the contact hole and electrically independent from other regions.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17070285A JPS6231149A (en) | 1985-08-02 | 1985-08-02 | Semiconductor intergrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17070285A JPS6231149A (en) | 1985-08-02 | 1985-08-02 | Semiconductor intergrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6231149A true JPS6231149A (en) | 1987-02-10 |
Family
ID=15909810
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17070285A Pending JPS6231149A (en) | 1985-08-02 | 1985-08-02 | Semiconductor intergrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6231149A (en) |
-
1985
- 1985-08-02 JP JP17070285A patent/JPS6231149A/en active Pending
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