JPS6240757A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the heat sink of a polycrystalline silicon resistor having no bias dependency of a parasitic capacity by forming a wiring metal through an insulating film on the resistor, and coupling the metal via a through-hole with a wiring metal of the upper layer of multilayer wirings to sufficiently increase the area of the upper layer wirings. CONSTITUTION:An insulating film 107 such as an oxide film is grown on a polycrystalline silicon resistor 106 formed on an insulating film 103 to form the first layer electrode wirings 104. In this case, the first layer wiring metal 108 is formed directly above the resistor 106 in the state electrically insulated from the wirings 104. Then, after the first and second interlayer insulating film 107 is grown, a through hole 109 is formed on the first layer wiring metal 108 on the resistor. Then, the second layer wiring metal 110 is formed in the shape for coating the resistor on the hole 109 on the resistor so that the area is widened as much as possible in response to the distance to a device adjacent to the resistor.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and relates to a bamboo polycrystalline silicon resistor.

° [Prior art] Resistors used in semiconductor integrated circuit devices are broadly classified into those that are fabricated by introducing impurities into single-crystal silicon, and those that are fabricated by patterning a thin film other than single-crystal silicon. There is something to do. Figure 2(a)
(b) is created using conventional technology.

A cross-sectional view of the resistor is shown. In the same figure (a), a single crystal substrate 201
Diffusion layer 2 of the opposite conductivity type to the single crystal substrate built inside
02 is a resistor, which is connected to the electrode 204 through a contact opened in the insulating film 203.

Figure 0) shows a case where polycrystalline silicon is used as a thin film other than single crystal silicon, and an insulating film 20 on a single crystal substrate 201 is used.
The polycrystalline silicon 206 is patterned on 3, and the electrode metal 204 is formed through contacts opened in the insulating film 207.
connected to.

[Problem that the invention seeks to solve]

Figure 2 shows the resistance of the conventional semiconductor integrated circuit mentioned above.
In the case where the diffusion layer 202 formed in the semiconductor substrate or epitaxial layer 201 of (&) is used as a resistor,
The p-n junction between the resistor and the substrate or epitaxial layer creates a distributed parasitic capacitance on the resistor, which is one of the factors that hinders high-speed operation of the integrated circuit. Further, these parasitic capacitances depend on the bias of the p-n junction, and since the capacitance value changes depending on the bias conditions in the circuit, this point must be taken into consideration at the time of design.

On the other hand, in a resistor using polycrystalline silicon 206 as a resistor (in Figure 2), the resistor and the semiconductor substrate are insulated by an insulating film 203 such as an oxide film or a nitride film, and if the insulating film is thick enough, Parasitic capacitance with the semiconductor substrate can be reduced. Further, this parasitic capacitance does not depend on the bias state and is constant, so it is easy to design. However, insulating films such as oxide films and nitride films usually have lower thermal conductivity than single-crystal silicon, and in resistors like this example where the resistor is surrounded by an insulator, heat dissipation is poor and the temperature of the resistor increases. becomes a problem. Furthermore, in order to suppress the temperature rise, it is necessary to increase the area of the resistor.

[Means for solving problems]

The present invention forms a wiring metal on a polycrystalline silicon resistor through an insulating film, and combines this with the wiring material in the upper layer of a multilayer wiring system, thereby minimizing the degree of freedom in designing the lower wiring. It is possible to improve the heat dissipation performance of a polycrystalline silicon resistor with small parasitic capacitance and no bias dependence of parasitic capacitance.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1(a) is a plan view of one embodiment of the present invention.

1) shows a sectional view taken along line yy' shown in FIG. 1(a), and FIG. 1(e) shows a sectional view taken along line XX' shown in FIG. 1(a).

An insulating film 107 such as an oxide film is grown on the polycrystalline silicon resistor 106 formed on the insulating film 103 by photo-etching or the like, and a first layer electrode wiring 104 is formed by photo-etching. At this time, a first layer wiring metal 108 is formed directly above the polycrystalline silicon resistor 106 so as to be electrically insulated from the first layer electrode wiring 104 .

Next, a first film such as a silicon oxide film or a nitride film is formed. After growing a second interlayer insulating film 107 using a conventional technique, a through hole 109 is formed on the first layer wiring metal 108 on the resistor by photoetching. This photoetching process is a normal through-hole process for connecting the normal lower layer wiring and the upper layer wiring in the wiring area other than the resistor of the present invention. Through hole 109 on the resistor formed here
It is desirable to make it as large as possible.

Next, a second layer wiring metal is deposited and a conventional second layer wiring is formed using a conventional photoetching technique. At this time, the through hole 109 on the resistor is mainly
10 is formed in a shape to cover the resistor. Further, the area is made as wide as possible depending on the distance between the resistor and the adjacent device. Depending on the case, a plurality of the above-mentioned second layer wiring metals on the resistor may be connected, or may be shared with the power supply line and the ground line as long as no problem arises in terms of circuit characteristics.

By forming an upper wiring metal layer with a wider area on the resistor in this way, it is possible to prevent heat generation from concentrating on the polycrystalline silicon resistor without significantly impairing the degree of freedom of the lower layer wiring, and to prevent heat generation from concentrating on the resistor. A polycrystalline silicon resistor with excellent heat dissipation properties can be realized without increasing the area.

〔Effect of the invention〕

As explained above, in the present invention, a wiring metal is formed on a polycrystalline silicon resistor through an insulating film, and is connected to a wiring metal in an upper layer of a multilayer wiring system through a through hole. By making the area sufficiently large, it is possible to improve the heat dissipation performance of the polycrystalline silicon resistor, which has small parasitic capacitance and is free from bias dependence, without significantly impairing the degree of freedom in designing the lower wiring system.

[Brief explanation of the drawing]

FIG. 1(a) is a plan view of the polycrystalline silicon resistor of the present invention;
1) is a cross-sectional view along the y-y' line in FIG. 1(a), and FIG. 1(C) is a cross-sectional view along the xxl line in FIG. 1(a). FIG. 2(a) is a cross-sectional view of a conventional resistor built in single-crystal silicon. FIG. 2(a) is a cross-sectional view of a conventional polycrystalline silicon resistor. 101...: single crystal semiconductor substrate, 103...
...Insulating film, 104...First layer electrode wiring, 10
6... Polycrystalline silicon resistor, 107...
...Interlayer insulating film, 108...First layer wiring metal on resistor, 109...Through hole, 110...
...Second layer wiring metal on resistor, 201...
Single crystal semiconductor substrate, 202...Diffusion layer, 203
...Insulating film, 204... Electrode metal, 2
05... Passivation film, 206...
...Polycrystalline silicon resistor, 207...Insulating film.

Claims (1)

[Claims] A lower layer wiring metal is provided on the polycrystalline silicon resistor via an insulating film, the lower layer wiring metal is coupled to an upper layer wiring metal via a through hole, and the upper layer wiring metal extends over the integrated circuit device. semiconductor devices.