JPS6230654B2 - - Google Patents

Info

Publication number
JPS6230654B2
JPS6230654B2 JP2775482A JP2775482A JPS6230654B2 JP S6230654 B2 JPS6230654 B2 JP S6230654B2 JP 2775482 A JP2775482 A JP 2775482A JP 2775482 A JP2775482 A JP 2775482A JP S6230654 B2 JPS6230654 B2 JP S6230654B2
Authority
JP
Japan
Prior art keywords
index
register
address
circuit
contents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2775482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58144951A (ja
Inventor
Hirohisa Karibe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2775482A priority Critical patent/JPS58144951A/ja
Publication of JPS58144951A publication Critical patent/JPS58144951A/ja
Publication of JPS6230654B2 publication Critical patent/JPS6230654B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/355—Indexed addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Complex Calculations (AREA)
JP2775482A 1982-02-23 1982-02-23 汎用デイジタル信号処理装置のアドレス修飾回路 Granted JPS58144951A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2775482A JPS58144951A (ja) 1982-02-23 1982-02-23 汎用デイジタル信号処理装置のアドレス修飾回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2775482A JPS58144951A (ja) 1982-02-23 1982-02-23 汎用デイジタル信号処理装置のアドレス修飾回路

Publications (2)

Publication Number Publication Date
JPS58144951A JPS58144951A (ja) 1983-08-29
JPS6230654B2 true JPS6230654B2 (enExample) 1987-07-03

Family

ID=12229801

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2775482A Granted JPS58144951A (ja) 1982-02-23 1982-02-23 汎用デイジタル信号処理装置のアドレス修飾回路

Country Status (1)

Country Link
JP (1) JPS58144951A (enExample)

Also Published As

Publication number Publication date
JPS58144951A (ja) 1983-08-29

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