JPS62296459A - Soi semiconductor device - Google Patents
Soi semiconductor deviceInfo
- Publication number
- JPS62296459A JPS62296459A JP14058486A JP14058486A JPS62296459A JP S62296459 A JPS62296459 A JP S62296459A JP 14058486 A JP14058486 A JP 14058486A JP 14058486 A JP14058486 A JP 14058486A JP S62296459 A JPS62296459 A JP S62296459A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- phosphorus
- soi
- film
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 17
- 239000011574 phosphorus Substances 0.000 claims abstract description 17
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000010453 quartz Substances 0.000 claims abstract description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052594 sapphire Inorganic materials 0.000 claims description 6
- 239000010980 sapphire Substances 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 2
- 238000005224 laser annealing Methods 0.000 abstract description 2
- 229910052760 oxygen Inorganic materials 0.000 abstract description 2
- 239000001301 oxygen Substances 0.000 abstract description 2
- -1 phosphorus ions Chemical class 0.000 abstract description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 238000000137 annealing Methods 0.000 abstract 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract 1
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
発明の詳細な説明
〔産業上の利用分野〕
本発明ＢＯ工（Ｅ３ｉ１ｉｃｏｎ ｏｎ工ｎ５ｕｌｃＬ
ｔｏｒ ）半導体装置及びＳＯ８（８ｉ１ｉｃｏｎ ｏ
ｎ ５ａｐｐｈｉｒｅ）半導体装置の絶縁基板材料開成
に関する。[Detailed description of the invention] Detailed description of the invention [Industrial application field] The present invention BO engineering (E3i1icon on engineering
tor) semiconductor devices and SO8 (8i1icon o
n 5apphire) This invention relates to the development of insulating substrate materials for semiconductor devices.
従来ＳＯＩ半導体装１Ｌ高純度の石英基板あるいはサフ
ァイヤ基板上にＳＺ膜を形成し、該８ｉ膜にＭＯ８型Ｆ
’ＥＴを形成するのが通例であった。Conventionally, an SZ film is formed on a 1L high-purity quartz substrate or a sapphire substrate for SOI semiconductor devices, and MO8 type F is formed on the 8i film.
It was customary to form 'ET.
しかし、上記従来技術によると絶縁基板と８ｉとの界面
における界面準位が大となシ、その為にＭＯ８型ＦＲＴ
ＩＩＣＢａｃｋＣんａｎｎｇ ｌ が形成され、ＭＯ
８型ＦＦ１Ｔの低レベルリーク−流が大となる問題点が
あった。However, according to the above conventional technology, the interface state at the interface between the insulating substrate and the 8i is large, and therefore the MO8 type FRT
IICBackCannngl is formed and MO
There was a problem that the low level leakage flow of the 8-inch FF1T became large.
本発明は、かかる従来技術の問題点をなくし、ＳＯＩ
ＭＯＳ Ｆ’ＥＴ（７）ｌｉｔ、ｚベルリークｍ流を
小となす絶縁基板材料の構成を提供することを目的とす
る。The present invention eliminates the problems of the prior art and enables SOI
MOS F'ET (7) lit, z An object of the present invention is to provide a configuration of an insulating substrate material that minimizes bell leakage.
ｃ問題点を解決するための手段〕
上記問題点を解決するために本発明は、ＳＯＩ半導体装
置における絶縁基板内または表面に燐を含有させる手段
をとる。Measures for Solving Problems c] In order to solve the above problems, the present invention takes a method of containing phosphorus in or on the surface of an insulating substrate in an SOI semiconductor device.
以下、実施列によシ本発明を詳述する。 Hereinafter, the present invention will be explained in detail by way of examples.
いま１石英基板に１ｐｐｔｎ程度の燐を含有させた絶縁
基板あるいは石英基板表面から１０’”７ｃｍ”程度の
燐イオンを打込んで９００℃程匿で酸素アニールを施し
た絶縁基板表面に多結晶ｓ＜＠をＣＶＤ法で形成後、レ
ーザー・アニール処理によ）該多結晶８ｉ膜を単結晶化
し、該単結晶８ｉ＠にＭＯ８型ＰＫＴｆｃ製作した結果
、従来の燐を含有しない絶縁基板を用いた同様の５Ｏｆ
ｆ ＭＯＳ ＦＥＴの場合にＦｉ低レベル−リーク
電流が４ＦＡ以上有ったのに対し、本案による５Ｏｆｆ
ＭＯＳ ＦＩＣτでＨ１１ｐＡ以下の饋となった
。An insulating substrate containing about 1 pptn of phosphorus in a quartz substrate, or polycrystalline s on the surface of an insulating substrate that is implanted with phosphorus ions about 10'7 cm from the surface of the quartz substrate and annealed with oxygen at about 900 degrees Celsius. <After forming by CVD method, the polycrystalline 8i film was made into a single crystal by laser annealing treatment), and as a result of fabricating MO8 type PKTfc on the single crystal 8i@, it was possible to use a conventional insulating substrate that does not contain phosphorus. Similar 5Of
In the case of f MOS FET, the Fi low level leakage current was 4FA or more, but the present invention has a 5Off
MOS FICτ was below H11pA.
尚、８０８等の他の絶縁基板によるＳＯＩ ＭＯＳ Ｆ
ＺＴＩＣ於ても絶縁基板に燐が存在することにより低レ
ベル・リーク電流を減少させることができた。In addition, SOI MOS F using other insulating substrates such as 808
The presence of phosphorus in the insulating substrate also reduced low-level leakage current in ZTIC.
このように本発明は。Thus, the present invention.
・燐を含有せる石英基板上にｓ４半導体膜が形成されて
成る事
・石英基板表面には燐が含有されて成シ、該燐を含有せ
る石英基板表面ＫＳｉＳｉ半導体形成されて成る事。・An S4 semiconductor film is formed on a quartz substrate containing phosphorus. ・The surface of the quartz substrate contains phosphorus, and a KSiSi semiconductor is formed on the surface of the quartz substrate containing phosphorus.
・燐を含有せるサファイヤ基板上にＳＺ半導体膜が形成
されて成る事、
Ｏサファイヤ基板表面には燐が含有されて成シ、該燐を
含有せるサファイヤ基板表面にｓ６半導体模が形成され
て成る事、
七′ｆｆ微とするものである。・An SZ semiconductor film is formed on a sapphire substrate containing phosphorus, a sapphire substrate containing phosphorus is formed on the surface of the O sapphire substrate, and an S6 semiconductor pattern is formed on the surface of the sapphire substrate containing phosphorus. In fact, it is 7'ff fine.
本発明の如く、絶縁基板の少くとも表面に燐を含有させ
ることにょシ８０工 ＭＯＳ ＦＥＴの低レベル・リ
ーク直流を減少させることができる効果がある。As in the present invention, containing phosphorus on at least the surface of an insulating substrate has the effect of reducing low-level leakage direct current in MOS FETs.
以 上that's all
Claims (3)
前記絶縁基板上に形成されたＳｉ半導体膜を有すること
を特徴とするＳＯＩ半導体装置。(1) An insulating substrate containing phosphorus in the substrate or on the substrate surface,
An SOI semiconductor device comprising a Si semiconductor film formed on the insulating substrate.
特許請求の範囲第１項に記載のＳＯＩ半導体装置。(2) The SOI semiconductor device according to claim 1, wherein the insulating substrate is a quartz substrate.
とする特許請求の範囲第１項に記載のＳＯＩ半導体装置
。(3) The SOI semiconductor device according to claim 1, wherein the insulating substrate is a sapphire substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14058486A JPS62296459A (en) | 1986-06-17 | 1986-06-17 | Soi semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14058486A JPS62296459A (en) | 1986-06-17 | 1986-06-17 | Soi semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62296459A true JPS62296459A (en) | 1987-12-23 |
Family
ID=15272088
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14058486A Pending JPS62296459A (en) | 1986-06-17 | 1986-06-17 | Soi semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62296459A (en) |
-
1986
- 1986-06-17 JP JP14058486A patent/JPS62296459A/en active Pending
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