JPH0475379A - Semiconductor substrate - Google Patents

Semiconductor substrate

Info

Publication number
JPH0475379A
JPH0475379A JP18871090A JP18871090A JPH0475379A JP H0475379 A JPH0475379 A JP H0475379A JP 18871090 A JP18871090 A JP 18871090A JP 18871090 A JP18871090 A JP 18871090A JP H0475379 A JPH0475379 A JP H0475379A
Authority
JP
Japan
Prior art keywords
film
substrate
phosphorus
interface
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18871090A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP18871090A priority Critical patent/JPH0475379A/en
Publication of JPH0475379A publication Critical patent/JPH0475379A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To stabilize the Na ions in an insulating film by incorporating high- concentration phosphorus into the side of the insulating film at the interface between the ground semiconductor substrate of an SOI substrate and the insulating film or at least into the side of the semiconductor substrate. CONSTITUTION:At first, oxygen ions are implanted from the surface of an Si substrate l, and an SiO2 film 3 is formed. An Si film 4 is made to remain on the surface of the SiO2 film 3 in an SIMOX wafer. In this wafer, phosphorus ions are continuously implanted into the interface between the Si substrate 1 and the SiO2 film 3. Thus, the layer of phosphorus glass 2 is formed. In order to implant the phosphorus ion into the interface between the Si substrate 1 and the SiO2 film 3, an N<+> layer wherein the high concentration phosphorus is implanted into the side of the Si substrate of the interface can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はSOI基板の材料構成に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to the material composition of an SOI substrate.

〔従来の技術〕[Conventional technology]

従来(7)SOI基板として、S IMOX (S i
 l1con  IMpJanted  0Xide)
や貼り合わせ法による基板すなわち、シリコン基板上に
5in2膜を形成し、該5IO2膜上に単結晶シリコン
膜を形成したものがあった。
Conventional (7) SOI substrates include SIMOX (S i
l1con IMpJanted 0Xide)
In some cases, a 5in2 film is formed on a substrate using a bonding method, that is, a silicon substrate, and a single crystal silicon film is formed on the 5IO2 film.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、上記従来技術によると、シリコン基板上の5i
n2膜にナトリウムが侵入すると、正イオンとなり、単
結晶シリコン膜と下地SiO2膜との界面に於て、パッ
ク・チャネルが形成され、単結晶シリコン膜に形成され
たトランジスタのリーク電流の原因となると云う課題が
あった。
However, according to the above-mentioned conventional technology, 5i on a silicon substrate
When sodium enters the N2 film, it becomes positive ions, forming a pack channel at the interface between the single crystal silicon film and the underlying SiO2 film, which causes leakage current in transistors formed in the single crystal silicon film. There was an issue to be solved.

本発明は、かかる従来技術の課題を解決し、SOI基板
に於て、5in2膜中のナトリウム・イオンを安定化す
る構造を提供する事を目的とする。
The present invention aims to solve the problems of the prior art and to provide a structure that stabilizes sodium ions in a 5in2 film in an SOI substrate.

〔課題を解決するための手段〕[Means to solve the problem]

上記課題を解決する為に、本発明は、半導体基板に係り
、半導体基板上に形成した絶縁膜上に薄い半導体膜を形
成した、いわゆるSOI基板に於て、下地半導体基板と
絶縁膜の境界面の絶縁膜側かあるいは少なくとも半導体
基板側に高濃度の燐を含有させる手段を取る。
In order to solve the above problems, the present invention relates to a semiconductor substrate, and in a so-called SOI substrate in which a thin semiconductor film is formed on an insulating film formed on a semiconductor substrate, the interface between the base semiconductor substrate and the insulating film is A method is taken to contain a high concentration of phosphorus on the insulating film side or at least on the semiconductor substrate side.

〔実 施 例〕〔Example〕

以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示すSO■基板の断面図で
ある。すなわち、Si基板1の表面から、まづ酸素イオ
ン打込みにより5in2膜3を形成すると共に、該Si
O2膜3の表面にSi膜4を残存させたSIMOXウェ
ーハに於て、引き続いて、Si基板1と5in2膜3の
界面にりんイオンを打込み、りんガラス2の層を形成し
たものである。尚、りんイオン打込みをSi基板1と5
i02膜3の界面に行なう為に、界面のSi基板側にり
んが高い濃度で打込まれたN1層を形成しても良い。
FIG. 1 is a sectional view of an SO2 substrate showing an embodiment of the present invention. That is, first, a 5in2 film 3 is formed from the surface of the Si substrate 1 by oxygen ion implantation, and the Si
In the SIMOX wafer in which the Si film 4 remained on the surface of the O2 film 3, phosphorous ions were subsequently implanted into the interface between the Si substrate 1 and the 5in2 film 3 to form a layer of phosphorous glass 2. In addition, phosphorus ion implantation was performed on Si substrates 1 and 5.
In order to perform this at the interface of the i02 film 3, an N1 layer implanted with a high concentration of phosphorus may be formed on the Si substrate side of the interface.

第2図は、本発明の他の実施例を示すSol基板の断面
図である。すなわち、Si基板11の表面にN+ポリS
i膜12が形成されて成り、該N゛ポリSi膜12上に
SiO2膜13を介してSi膜島4が形成されて成る。
FIG. 2 is a sectional view of a Sol substrate showing another embodiment of the present invention. That is, N+ polyS is formed on the surface of the Si substrate 11.
An i film 12 is formed, and a Si film island 4 is formed on the N poly-Si film 12 with an SiO2 film 13 interposed therebetween.

尚、本実施例と前記実施例とに於て、Si基板1及び1
1を高濃度にりんを含有させたN”Si基板であっても
良く、又、本実施例のN−ポリS1膜12の表面のみを
N″層にする手たてを施しても良く、又、5102膜1
3の下部にりんガラス層を形成しても良い。
Incidentally, in this embodiment and the above embodiment, Si substrates 1 and 1
1 may be an N"Si substrate containing a high concentration of phosphorus, or only the surface of the N-poly S1 film 12 of this embodiment may be made into an N" layer, Also, 5102 membrane 1
A phosphor glass layer may be formed at the bottom of 3.

更に、Si基板1や11及びN”ポリSi膜12迄含め
て、石英等の絶縁基板で形成されていても良い。
Furthermore, the Si substrates 1 and 11 and the N'' poly-Si film 12 may be formed of an insulating substrate such as quartz.

更にSi膜4及びSl島14は多結晶体や準結晶体ある
いはアモルファス体であっても良い。
Further, the Si film 4 and the Sl island 14 may be polycrystalline, quasi-crystalline, or amorphous.

〔発明の効果〕〔Effect of the invention〕

本発明によりSol基板の絶縁膜中のNaイオンを安定
化させることができ、ひいてはSOI基板を用いて製作
したトランジスタのリーク電流を減少することができる
効果がある。
According to the present invention, Na ions in the insulating film of the Sol substrate can be stabilized, and the leakage current of transistors manufactured using the SOI substrate can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は、本発明の実施例を示す、Sol基
板の断面図である。 1.11・・・Si基板 2 ・ 12 ・ 3. 4 ・ 14 ・ ・りんガラス ・N1ポリSi膜 ・5in2膜 ・Si膜 ・Si島 以 上 出願人 セイコーエプソン株式会社
1 and 2 are cross-sectional views of a Sol substrate showing an embodiment of the present invention. 1.11...Si substrate 2 ・ 12 ・ 3. 4 ・ 14 ・ ・Phosphorus glass・N1 poly-Si film・5in2 film・Si film・Si island and above Applicant Seiko Epson Corporation

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上に形成された絶縁膜上に薄い半導体膜を
形成した、いわゆるSOI(Semiconducto
r on Insulator)基板に於て、下地半導
体基板と絶縁膜の境界面の絶縁膜側かあるいは少なくと
も半導体基板側には高濃度に燐が含有されて成る事を特
徴とする半導体基板。
SOI (Semiconductor) is a thin semiconductor film formed on an insulation film formed on a semiconductor substrate.
ron Insulator) A semiconductor substrate characterized in that phosphorus is contained in a high concentration on the insulating film side of the interface between the base semiconductor substrate and the insulating film, or at least on the semiconductor substrate side.
JP18871090A 1990-07-17 1990-07-17 Semiconductor substrate Pending JPH0475379A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18871090A JPH0475379A (en) 1990-07-17 1990-07-17 Semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18871090A JPH0475379A (en) 1990-07-17 1990-07-17 Semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH0475379A true JPH0475379A (en) 1992-03-10

Family

ID=16228443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18871090A Pending JPH0475379A (en) 1990-07-17 1990-07-17 Semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH0475379A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689136A (en) * 1993-08-04 1997-11-18 Hitachi, Ltd. Semiconductor device and fabrication method
WO2009066566A1 (en) * 2007-11-19 2009-05-28 Air Water Inc. PROCESS FOR PRODUCING SINGLE CRYSTAL SiC SUBSTRATE AND SINGLE CRYSTAL SiC SUBSTRATE PRODUCED BY THE PROCESS

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689136A (en) * 1993-08-04 1997-11-18 Hitachi, Ltd. Semiconductor device and fabrication method
US6051877A (en) * 1993-08-04 2000-04-18 Hitachi, Ltd. Semiconductor device and fabrication method
US6291877B1 (en) 1993-08-04 2001-09-18 Hitachi, Ltd. Flexible IC chip between flexible substrates
US6486541B2 (en) 1993-08-04 2002-11-26 Hitachi, Ltd. Semiconductor device and fabrication method
WO2009066566A1 (en) * 2007-11-19 2009-05-28 Air Water Inc. PROCESS FOR PRODUCING SINGLE CRYSTAL SiC SUBSTRATE AND SINGLE CRYSTAL SiC SUBSTRATE PRODUCED BY THE PROCESS
US8603901B2 (en) 2007-11-19 2013-12-10 Air Water Inc. Method for producing single crystal SiC substrate and single crystal SiC substrate produced by the same

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