JPS62290163A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS62290163A
JPS62290163A JP13188086A JP13188086A JPS62290163A JP S62290163 A JPS62290163 A JP S62290163A JP 13188086 A JP13188086 A JP 13188086A JP 13188086 A JP13188086 A JP 13188086A JP S62290163 A JPS62290163 A JP S62290163A
Authority
JP
Japan
Prior art keywords
plate
bottom plate
semiconductor device
metal
container
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13188086A
Other languages
Japanese (ja)
Inventor
Shizuya Numata
沼田 静也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP13188086A priority Critical patent/JPS62290163A/en
Publication of JPS62290163A publication Critical patent/JPS62290163A/en
Pending legal-status Critical Current

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  • Thyristors (AREA)

Abstract

PURPOSE:To prevent a metallic bottom plate of a container from being deformed or distorted when it is contacted under a pressure from springs, to prevent a thyristor from increasing its forward voltage drop or increasing its saturated voltage due to local concentration of large current and to obtain a highquality semiconductor device with a high yield, by embedding a metal plate having high hardness and good heat conductivity in the metallic bottom plate. CONSTITUTION:In a semiconductor device comprising semiconductor element structures 33a and 33b carried on a metallic bottom plate 51 of a container with an insulator 32 interposed therebetween and forced by spring structures 44a and 44b to be contacted with current conducting members 43a and 43b consisting of electrodes 34a, 34b, 35a and 35b having current contact terminals 34at, 34bt, 35at and 35bt, a metal plate 50 having a hardness not lower than that of molybdenum is embedded within the metallic bottom plate 51. The metal plate 50 may be of a hard metal having good heat conductivity such as molybdenum or tungsten. According to this arrangement, the container can be prevented from being distorted or deformed by pressure from the springs or the like. Other pressurized members are also prevented from being deformed. As a result, uniform pressure contact can be obtained constantly.

Description

【発明の詳細な説明】 3、発明の詳細な説明 [発明の目的] (産業上の利用分野) 本発明は、トランジスタやサイリスタ等の大電力用素子
から成る半導体装置に関するもので、特に圧接型モジュ
ールの容器(パッケージ)底部の構造に係るものである
[Detailed Description of the Invention] 3. Detailed Description of the Invention [Object of the Invention] (Field of Industrial Application) The present invention relates to a semiconductor device consisting of high power elements such as transistors and thyristors, and particularly relates to a pressure contact type semiconductor device. This relates to the structure of the bottom of the module container (package).

(従来の技術) パワートランジスタ、帰還ダイオード、抵抗及びダイオ
ードをそれぞれ備えた2つの半導体素子構体を、1つの
パッケージに収容した従来例(特開昭57−15452
号)を第3図に基づいて説明する。
(Prior Art) A conventional example (Japanese Unexamined Patent Publication No. 57-15452
(No.) will be explained based on FIG.

同図において1はパワートランジスタ11及びダイオー
ド12からなる第1の半導体素子構体、−?−は同じく
パワートランジスタ13及びダイオード14から成る第
2の半導体素子構体である。
In the figure, 1 is a first semiconductor element structure consisting of a power transistor 11 and a diode 12, -? - is a second semiconductor element structure also consisting of a power transistor 13 and a diode 14.

これら第1、第2の半導体素子構体はそれぞれ絶縁基板
15.16を介して共通の金属底板17に接着され、共
通のパッケージ18の上方に第1の半導体索子構体1の
コレクタ電極端子19、第1の半導体素子構体上のエミ
ッタ電極端子20と接続した第2の半導体素子構体、?
−のコレクタ電極端子21及び第2の半導体素子構体−
?−のエミック電極端子22が導出されている。 この
ような構成のトランジスタモジュールにおいては、電気
装置への組立てが容易であり、組立て時のスペースも小
さくなり、軽a化が達成できる。
These first and second semiconductor element structures are bonded to a common metal bottom plate 17 via insulating substrates 15 and 16, respectively, and the collector electrode terminal 19 of the first semiconductor cable structure 1 is placed above the common package 18. A second semiconductor element structure connected to the emitter electrode terminal 20 on the first semiconductor element structure, ?
-Collector electrode terminal 21 and second semiconductor element structure-
? - emic electrode terminal 22 is led out. A transistor module having such a configuration is easy to assemble into an electrical device, requires less space during assembly, and can achieve a lighter weight.

しかしながら、このトランジスタモジュールにおいては
次のような欠点があった。 即ちエミッタ電極或いはコ
レクタ電極からの接続をボンディングや半田付けにより
取り出している為、大電流の場合例えば100A以上の
トランジスタにあっては、ボンディングや半田付()で
は熱歪、熱疲労等の点から大型化することが困難である
。 又ボンディング等の所で過電流による破壊があると
、外囲器の外へシリコーン等の溶融物が噴出ザる一種の
爆発等の起きる危険性がある。
However, this transistor module had the following drawbacks. That is, since the connection from the emitter electrode or collector electrode is taken out by bonding or soldering, in the case of large current transistors, for example, 100 A or more, bonding or soldering () is not recommended from the viewpoint of thermal distortion, thermal fatigue, etc. It is difficult to increase the size. Furthermore, if there is a breakdown due to overcurrent at a bonding point or the like, there is a risk of a type of explosion in which molten silicone or the like is spewed out of the envelope.

次にこの問題点を解決する為に開発された圧接型半導体
モジュール(特開昭60−74462号)について第4
図を参照して説明する。 なお第2図は、本発明の半導
体装置の平面図であるが、後述する底板31を除くその
他の部分は、第4図に示す半導体モジュールの平面図と
ほぼ同一であり便宜上これを参照する。 又この半導体
モジュールは、2つの圧接型半導体素子を直列接続した
ものであるから、以下の説明において2つの素子の対応
する部分には同一数字の符号を用い、末尾の文字a、b
で素子の区別をする。 第4図において、容器47の金
に底板31上に絶縁板32が載置されている。  2つ
のトランジスタ複合体ベレット33a 、33bは、そ
れぞれコレクタM N 34 a、34bとエミッタ盤
36a 136b 、エミッタ電極35a 、35bと
に挾まれ、絶縁板32上に載置される。  2つのばね
構体44a 、44bはそれぞれ絶縁体37a 、37
b 、皿ばね38a、38b及び固定用金属板39a 
、39b等から成る。
Next, we will discuss the pressure-contact type semiconductor module (Japanese Patent Application Laid-Open No. 60-74462) developed to solve this problem.
This will be explained with reference to the figures. Although FIG. 2 is a plan view of the semiconductor device of the present invention, other parts except for a bottom plate 31, which will be described later, are almost the same as the plan view of the semiconductor module shown in FIG. 4, and will be referred to for convenience. Furthermore, since this semiconductor module is made by connecting two press-contact type semiconductor elements in series, in the following explanation, corresponding parts of the two elements will be denoted by the same numerals, and the suffixes a and b will be used.
Distinguish between elements. In FIG. 4, an insulating plate 32 is placed on a bottom plate 31 of a container 47. The two transistor composite pellets 33a, 33b are placed on the insulating plate 32, sandwiched between collectors M N 34a, 34b, emitter disks 36a 136b, and emitter electrodes 35a, 35b, respectively. The two spring structures 44a and 44b are insulators 37a and 37, respectively.
b, disc springs 38a, 38b and fixing metal plate 39a
, 39b, etc.

第2図に示すように、それぞれ2本ずつあるボルト40
a及び40b  (図示なし)を底板のねじ部にねじ込
むと、ばね構体44a 、44bにより、トランジスタ
複合体ベレット33a 、331)とコレクタ電極34
a 、34b等とは互いに圧接される。
As shown in Figure 2, there are two bolts 40 each.
a and 40b (not shown) are screwed into the threaded portion of the bottom plate, the spring structures 44a and 44b connect the transistor complex bellets 33a and 331) and the collector electrode 34.
a, 34b, etc. are pressed against each other.

この半導体モジュールでは各トランジスタ複合体と電極
間を加圧接続させるようにしたので、ボンディングある
いは半田接続構造の場合のように大電流が局部的に集中
するようなことがなく、圧接箇所全体にわたって電流が
流れるようになり、第1の従来例の場合の問題点はほぼ
取外された。
In this semiconductor module, each transistor complex and the electrode are connected by pressure, so there is no local concentration of large current as in the case of bonding or solder connection structures, and the current flows throughout the entire pressure welding area. flow, and the problems of the first conventional example have been almost eliminated.

(発明が解決しようとする問題点) 面記第2の最新の従来例では、トランジスタ複合体33
とこれを挾むコレクタ電極34等とは、ばね構体により
加圧接続されるが、これら部材間の接続は均一に圧接さ
れることが重要である。
(Problems to be Solved by the Invention) In the second latest conventional example, the transistor composite 33
The collector electrode 34 and the like that sandwich it are connected under pressure by a spring structure, but it is important that the connection between these members be uniformly pressed.

均一に圧接する為には、平行度、平面度のでたプレス機
械とブレス冶具を使用し、接触面の全面にわたって等し
い圧力を同時に加えながら加圧することが理想的な方法
である。 しかしながら従来の半導体装置では、第2図
に示すようにトランジスタ複合体33a等を2本のボル
ト40aを交互に締めながら加圧するので、前記理想的
方法とは異なり圧接状態の均一性については不十分であ
る。
In order to achieve uniform pressure contact, the ideal method is to use a press machine and press jig that have parallelism and flatness, and apply equal pressure over the entire contact surface at the same time. However, in the conventional semiconductor device, as shown in FIG. 2, the transistor complex 33a and the like are pressurized while alternately tightening the two bolts 40a, so unlike the ideal method, the uniformity of the pressure-welded state is insufficient. It is.

特に加圧作業の不手際等により、容器底板31等が14
/υだり歪んだりすることがある。 このような場合に
は圧接面の接触抵抗が場所によって異なり、強く圧接さ
れた部分に電流が多く流れ、圧接部分の電圧時下が増大
する。 このことはトランジスタの電流増幅率hFEの
減少及びコレクタ・エミッタ間のオン状態における飽和
雪圧の増大をもたらし又サイリスタの場合には順電圧W
3下の増大をきたし、ついには局部電流集中により素子
を破壊してしまうことがある。
In particular, due to clumsy pressurization work, etc., the container bottom plate 31 etc.
/υ or distortion may occur. In such a case, the contact resistance of the press-contact surfaces varies depending on the location, and a large amount of current flows in the strongly press-contacted portion, increasing the voltage drop of the press-contact portion. This causes a decrease in the current amplification factor hFE of the transistor and an increase in the saturation snow pressure between the collector and emitter in the on state, and in the case of a thyristor, the forward voltage W
3 or less, and may eventually destroy the device due to local current concentration.

本発明の目的は、従来の半導体装置の良い点は維持し、
容器等の変形を除去し、常に均一な圧接状態が得られる
高品質で高歩留りの圧接型の半導体装置(モジュール)
を提供することである。
The purpose of the present invention is to maintain the good points of conventional semiconductor devices,
High-quality, high-yield press-contact type semiconductor devices (modules) that eliminate deformation of containers, etc. and always provide uniform press-contact conditions.
The goal is to provide the following.

[発明の構成J く問題点を解決するための手段) 本発明は、容器の金ぶ製底根上に絶縁物を介して載置さ
れた圧接型の半導体素子構体が、電流接続端子を右する
重陽等の電流導通部材と、ばね構体にり加圧接触されて
いる半導体装置において、前記金属底板の内部に、モリ
ブデン板の硬さより小さくない硬さの金属板、例えばモ
リブデン、タングステン等の硬い熱伝導率の良い金属板
を埋め込んだことを特徴とする半導体装置である。
[Structure of the Invention J Means for Solving the Problems] The present invention provides a structure in which a press-contact type semiconductor element structure placed on the metal base of a container with an insulator interposed therebetween is connected to a current connection terminal. In a semiconductor device that is brought into pressure contact with a current conducting member such as Chrysanthemum by a spring structure, a metal plate having a hardness not smaller than that of a molybdenum plate, such as a hard heat-resistant material such as molybdenum or tungsten, is placed inside the metal bottom plate. This is a semiconductor device characterized by having a metal plate with good conductivity embedded therein.

(作用) 従来の容器の金属製底板中に熱伝導率が良く且つ硬い金
属の例えばモリブデン板又はタングステン板を埋め込む
ことにより、ばね圧力等による容器の歪み変形をおさえ
ることができ、又これにより加圧されるその他の部材の
変形も防止され常に均一な圧接状態が得られる。
(Function) By embedding a hard metal with good thermal conductivity, such as a molybdenum plate or a tungsten plate, in the metal bottom plate of a conventional container, it is possible to suppress distortion and deformation of the container due to spring pressure, etc. Deformation of other members being pressed is also prevented, and a uniform pressure contact state can always be obtained.

(実施例) 本発明の半導体装置の実施例について図面を参照して以
下詳細に説明する。 第1図はこの半導体装置の破砕断
面図、第2図はその平面図である。
(Example) Examples of the semiconductor device of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a fragmented sectional view of this semiconductor device, and FIG. 2 is a plan view thereof.

容器52の底部は、熱的に良導体である金属板例えばア
ルミダイキャスト製の底板51に、モリブデン板50が
埋め込まれた金属底板である。 絶縁板32はセラミッ
ク板である。  2つの半導体素子構体33a 、33
bは、それぞれ主トランジスタと帰還ダイオード等を1
つの半導体基板に形成したもので、以下それぞれトラン
ジスタ複合体33a及び33bと呼ぶ。 コレクタ電極
34a、34b及びエミッタ電極35a 、35bは銅
系材の平板で、その周辺部の一部分からこれと同体で加
圧面に垂直上方向に折り曲げられた10長の帯状の電流
接続端子が1つ又は2つ形成されている。
The bottom of the container 52 is a metal bottom plate in which a molybdenum plate 50 is embedded in a metal plate 51 that is a thermally good conductor, such as a bottom plate 51 made of die-cast aluminum. The insulating plate 32 is a ceramic plate. Two semiconductor element structures 33a, 33
b is the main transistor, feedback diode, etc.
They are formed on two semiconductor substrates, and are hereinafter referred to as transistor composites 33a and 33b, respectively. The collector electrodes 34a, 34b and the emitter electrodes 35a, 35b are flat plates made of a copper-based material, and from a part of their periphery there is one 10-long band-shaped current connection terminal bent upward perpendicular to the pressurizing surface. Or two are formed.

即ち、コレクタ電極34aは外部電流接続端子34at
を、コレクタ電極34bは外部及び内部の2つの電流接
続端子34 bt及び34 btlを持っている。 又
エミッタ電極35aは内部電流接続端子35at1をエ
ミッタ電極35bは外部電流接続端子35btを有して
いる。 エミッタ136a136bには、それぞれベー
スリード、絶縁ガイド及びスプリングが取り付けられて
おり、スプリングばねによりトランジスタ複合体のベー
ス電極とベースリードとが接触できるようになっている
That is, the collector electrode 34a is connected to the external current connection terminal 34at.
, the collector electrode 34b has two external and internal current connection terminals 34 bt and 34 btl. Further, the emitter electrode 35a has an internal current connection terminal 35at1, and the emitter electrode 35b has an external current connection terminal 35bt. A base lead, an insulating guide, and a spring are attached to each emitter 136a136b, and the spring allows contact between the base electrode of the transistor complex and the base lead.

コレクタ電極34a 、34b 、 エミッタ盤36a
Collector electrodes 34a, 34b, emitter board 36a
.

36b及びエミッタ電極35a、35bはそれぞれ電流
導通部材43a及び43bを構成する。
36b and emitter electrodes 35a and 35b constitute current conducting members 43a and 43b, respectively.

絶縁体37a、37b、皿ばね38a 、38b及び固
定用金属板39a 、39bをそれぞれ組み合とを電気
的に絶縁するもので、しかも圧力に耐え得るものとする
。 固定用金属板39は、トランジスタ複合体33とこ
れを挾む電極等の電流導通部材43とをその両端の2本
のボルト40により加圧固定するものである。 又コレ
クタ電極34a 、34bには、駆動トランジスタ及び
スピードアップダイオード等の駆動回路要素45a及び
45b (図示なし)が、ばね構体によって加圧接触さ
れる主トランジスタとは別に、半田付は及びボンディン
グにより取り付けられている。
The insulators 37a, 37b, disc springs 38a, 38b, and fixing metal plates 39a, 39b are electrically insulated from each other, and are capable of withstanding pressure. The fixing metal plate 39 is used to press and fix the transistor composite 33 and a current conducting member 43 such as electrodes sandwiching the same with two bolts 40 at both ends thereof. Further, drive circuit elements 45a and 45b (not shown) such as a drive transistor and a speed-up diode are attached to the collector electrodes 34a and 34b by soldering and bonding, separately from the main transistor which is pressed into contact with the spring structure. It is being

この半導体モジュールを組み立てる場合、前記諸部材を
所定の順序と位置にi置する。 この時内部電流接続端
子35at1と34 btlとは互いに対向する位置で
、上下にスライド可能な状態で配設される。 次に2つ
のトランジスタ複合体33aと33bはボルト40a及
び40bを金属底板31のねじ部にねじ込むことにより
別個にそれぞれの電流導通部材43a及び43bと加圧
接触される。 その状態でボルト42を締めて内部電流
接続端子を一体化する。
When assembling this semiconductor module, the various members are placed in a predetermined order and position. At this time, the internal current connection terminals 35at1 and 34btl are disposed at positions facing each other in a vertically slidable manner. The two transistor complexes 33a and 33b are then separately brought into pressure contact with the respective current conducting members 43a and 43b by screwing bolts 40a and 40b into the threads of the metal base plate 31. In this state, tighten the bolt 42 to integrate the internal current connection terminal.

このように回路構成ができたユニットをゲル材で保護し
エポキシ樹脂から成る蓋体46を金属容器52にかぶせ
、金属容器52とエポキシ蓋体46の隙間を、熱膨張係
数がアルミニウムに近いエポキシ系接着剤で埋める。 
又外部電流接続端子34 at、34bt、35bt及
ヒヘ一スリート等ソの他の接続端子とエポキシ蓋体との
間は熱膨張係数が銅に近いエポキシ系接着剤で埋め封止
する。
The unit with the circuit configuration thus formed is protected with a gel material, a lid body 46 made of epoxy resin is placed over the metal container 52, and the gap between the metal container 52 and the epoxy lid body 46 is filled with an epoxy resin whose thermal expansion coefficient is close to that of aluminum. Fill with glue.
Also, the spaces between the external current connection terminals 34at, 34bt, 35bt and other connection terminals such as the hihe-sleet and the epoxy lid are filled and sealed with an epoxy adhesive having a coefficient of thermal expansion close to that of copper.

次にエポキシ蓋体46の一部に設けられた管から窒素を
封入する。
Next, nitrogen is filled in from a tube provided in a part of the epoxy lid 46.

金属底板に埋め込まれる金属板は、ばね圧力によって撓
んだり、歪んだりすることのない硬さが必要であると共
に、殆どの場合放熱板を兼ねるので、できるだけ熱伝導
率の高いことが必要である。
The metal plate embedded in the metal bottom plate needs to be hard enough to not bend or distort due to spring pressure, and since it also serves as a heat sink in most cases, it needs to have as high a thermal conductivity as possible. .

モリブデン板の硬さは、標準でビッカース硬さ160)
−+V(金属データブック、日本金属学会編、147頁
)であるが、僅かな含有不純物あるいは加■直後とその
熱処理接等により若干のバラツキがある。 硬さ、熱伝
導率のほか加工性、入手の難易等の工業的条件を考慮し
て、金属板はモリブデン板又はタングステン板であるこ
とが望ましい。
The standard hardness of molybdenum plates is Vickers hardness 160)
-+V (Metal Data Book, edited by the Japan Institute of Metals, p. 147), but there are slight variations due to slight impurities contained, immediately after application, heat treatment, etc. In consideration of industrial conditions such as hardness, thermal conductivity, workability, and availability, the metal plate is preferably a molybdenum plate or a tungsten plate.

萌配本実浦例では厚さ2〜5IIImのモリブデン板を
底板に埋め込み、余尺変形、歪みを防止することができ
た。
In the Moe-Honmiura example, a molybdenum plate with a thickness of 2 to 5 III m was embedded in the bottom plate, making it possible to prevent excessive deformation and distortion.

なお前記実施例では2つのトランジスタ複合体から成る
モジュールについて説明したが、本発明は、1つ或いは
3つ以上のトランジスタ複合体から成るモジュールでも
、又トランジスタ素子に代えてサイリスタ素子であって
も同様に適用可能である。 電流導通部材及びばね構体
のそれぞれの構成要素についても本実施例に限定されな
い。
In the above embodiments, a module consisting of two transistor composites was explained, but the present invention is applicable to a module consisting of one or more transistor composites, or even if a thyristor element is used instead of a transistor element. Applicable to The respective components of the current conducting member and the spring structure are not limited to the present embodiment.

[発明の効果1 本発明の半導体装置では、容器の金属底板に、硬く且つ
熱伝導率の良い金属板例えばモリブデン板等を埋め込む
ことにより、ばね圧接による金属底板の変形や歪みがな
くなり、半導体素子及び電極間が常に均一に圧接される
。 主電流は、電極の圧接面の全域にわたって均一密度
で流れる。
[Effect 1 of the invention] In the semiconductor device of the present invention, by embedding a hard metal plate with good thermal conductivity, such as a molybdenum plate, in the metal bottom plate of the container, deformation and distortion of the metal bottom plate due to spring pressure welding is eliminated, and the semiconductor element And the electrodes are always evenly pressed against each other. The main current flows with uniform density over the entire pressure contact surface of the electrode.

従来の半導体装置で時々みられた局部的な大電流集中に
よるサイリスタの順電圧降下の増加、或いは1〜ランジ
スタのコレクタ・エミッタ間、エミッタ・ベース間の飽
和電圧増大は防止され、安定した高品質で高歩留りの半
導体装置が19られるようになった。
This prevents an increase in the forward voltage drop of the thyristor due to localized large current concentration, which was sometimes seen in conventional semiconductor devices, or an increase in the saturation voltage between the collector and emitter and emitter and base of the transistor, resulting in stable high quality. 19 high-yield semiconductor devices have become available.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る半導体装置の一部破砕断面図、第
2図は第1図の半導体装置の平面図、第3図は従来例の
半導体装置の断面図、第4図は最新の従来例の半導体装
置の断面図である。 32・・・電気的絶縁板、 33a 、33b・・・半
導体素子構体(]・ランジスク複合体)、 34at。 34 bt、 35 at、 35 bt=−・電流接
続端子、43a、43b・・・電流導通部材、 44a
。 44b・・・ばね構体、 50・・・埋め込む金fKN
(モリブデン板)、 51・・・金属底板、 52・・
・容器。 第1図 第2図 宮 31’21
FIG. 1 is a partially fragmented sectional view of a semiconductor device according to the present invention, FIG. 2 is a plan view of the semiconductor device of FIG. 1, FIG. 3 is a sectional view of a conventional semiconductor device, and FIG. 4 is a latest one. FIG. 2 is a cross-sectional view of a conventional semiconductor device. 32... Electrical insulating plate, 33a, 33b... Semiconductor element structure (]/Landisk complex), 34at. 34 bt, 35 at, 35 bt=--current connection terminal, 43a, 43b... current conduction member, 44a
. 44b...Spring structure, 50...Embedded gold fKN
(molybdenum plate), 51...metal bottom plate, 52...
·container. Figure 1 Figure 2 Palace 31'21

Claims (1)

【特許請求の範囲】 1 容器の底部が金属板から成り、この金属底板上に電
気的絶縁板を介して載置された圧接型の半導体素子構体
が、電流接続端子を有する電流導通部材と、ばね構体に
より加圧接触されている半導体装置において、前記金属
底板が、その内部にモリブデン板の硬さより小さくない
硬さの金属板を埋め込んで成ることを特徴とする半導体
装置。 2 埋め込む金属板が、モリブデン板又はタングステン
板である特許請求の範囲第1項記載の半導体装置。 3 前記圧接型の半導体素子構体、前記導通部材及びば
ね構体の組合せが複数組設けられた特許請求の範囲第1
項又は第2項記載の半導体装置。
[Scope of Claims] 1. The bottom of the container is made of a metal plate, and a press-contact type semiconductor element structure is placed on the metal bottom plate with an electrically insulating plate interposed therebetween, and a current conducting member having a current connection terminal; A semiconductor device which is brought into pressure contact by a spring structure, characterized in that the metal bottom plate has a metal plate embedded therein having a hardness not smaller than the hardness of the molybdenum plate. 2. The semiconductor device according to claim 1, wherein the metal plate to be embedded is a molybdenum plate or a tungsten plate. 3. Claim 1, wherein a plurality of combinations of the press contact type semiconductor element structure, the conductive member, and the spring structure are provided.
The semiconductor device according to item 1 or 2.
JP13188086A 1986-06-09 1986-06-09 Semiconductor device Pending JPS62290163A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13188086A JPS62290163A (en) 1986-06-09 1986-06-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13188086A JPS62290163A (en) 1986-06-09 1986-06-09 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS62290163A true JPS62290163A (en) 1987-12-17

Family

ID=15068301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13188086A Pending JPS62290163A (en) 1986-06-09 1986-06-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS62290163A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265767B1 (en) * 1919-04-03 2001-07-24 Mitsubishi Gas Chemical Company, Inc. Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
WO2009096233A1 (en) * 2008-01-30 2009-08-06 Nihon Inter Electronics Corporation Crimp-type high power thyristor module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265767B1 (en) * 1919-04-03 2001-07-24 Mitsubishi Gas Chemical Company, Inc. Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package
WO2009096233A1 (en) * 2008-01-30 2009-08-06 Nihon Inter Electronics Corporation Crimp-type high power thyristor module
JP2009182152A (en) * 2008-01-30 2009-08-13 Nippon Inter Electronics Corp Pressure contact thyristor module for high electric power

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