JPS62274631A - ワイヤボンデイング装置 - Google Patents

ワイヤボンデイング装置

Info

Publication number
JPS62274631A
JPS62274631A JP61118109A JP11810986A JPS62274631A JP S62274631 A JPS62274631 A JP S62274631A JP 61118109 A JP61118109 A JP 61118109A JP 11810986 A JP11810986 A JP 11810986A JP S62274631 A JPS62274631 A JP S62274631A
Authority
JP
Japan
Prior art keywords
conductor
semiconductor chip
chip
wire
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61118109A
Other languages
English (en)
Inventor
Hiroshi Kondo
洋 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP61118109A priority Critical patent/JPS62274631A/ja
Publication of JPS62274631A publication Critical patent/JPS62274631A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05553Shape in top view being rectangular
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852Applying energy for connecting
    • H01L2224/85201Compression bonding
    • H01L2224/85205Ultrasonic bonding
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/1016Shape being a cuboid
    • H01L2924/10162Shape being a cuboid with a square active surface

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】
3、発明の詳細な説明
【発明の属する技術分野】
本発明は、半導体チップ上の電極と端子導体とを導線に
よって接続するワイヤボンディング装置に関する。
【従来技術とその問題点】
1枚の金属板を打抜きあるいは選択エツチング加工して
作成されたリードフレームのマウント部に半導体チップ
を固定し、外部リード部とチップ上の電極とをワイヤボ
ンディングで接続したのち、切断によって外部リード部
とマウント部を分離して外部リード部を端子とする半導
体装置を製造することは広々行われている。このような
工程では、量産のためにリードフレームは搬送レールを
X内とするような方法でボンデインダステーションに連
続して送られてくる。しかしこうして製造された半導体
装置において、半導体チップと端子とを接続するワイヤ
の形成するループがチップの縁部などに接触して接続不
良が生じたり、あるいは接触部に他の電極が存在すると
きは短絡を起こしたりすることがある。このようなワイ
ヤルーズの接触を防止するために、チップの表面と外部
リード部の間に段差を付ける構造により対策する方法が
あるが、組立方法が制約され、また段差を付けるための
部品を必要とする場合があるなどのためコスト的に不利
であった。
【発明の目的】
本発明は、上述の問題を解決して半導体チップと端子導
体の間のワイヤループのチップとの接触を完全に防止で
き、しかも大がかりの設備を必要としないワイヤボンデ
ィング装置を提供することを目的とする。
【発明の要点】
本発明は、ワイヤボンディング装置のボンディング位置
あるいはそれと異なる位置に、上下動可能で上がったと
きに半導体チップと端子導体との中間で導線を押し上げ
る突起を表面に有する支持体を備えるもので、半導体チ
ップ面と端子導体との間に強制的にループを作ることに
より上述の目的を達成することができる。
【発明、の実施例】
以下図を引用して本発明の一実施例について説明する。 第1図は断面図、第2図は平面図でリードフレームlの
マウント部11には予め半導体チップ2がろう付けされ
ている。このリードフレームlが図示しないレールを案
内とするワーク送りによって図のボンデインダステーシ
ッンの位置までくると、ワーク支持体3がカムによって
矢印41の方向に上がり、第1図に示すようにリードフ
レーム1の下面に接触する0次いで図示しない超音波ボ
ンディング装置を用いて半導体チップ2の電極21とリ
ードフレームの外部リード部12とをM導線5によって
接続する。この際、ワーク支持体3の上面の突起31が
M導&I5を持ち上げてループを作り、導線がチップの
縫部あるいは他の電極に接触するのを防止する。このあ
とワーク支持体3は矢印42の方向に下がり、リードフ
レーム1は図の左右方向に移動させるとき、突起31が
導線5を傷つけることのないようにする。リードフレー
ム1の各マウント部に固定された半導体チップに順次以
上の操作を操り返してワイヤボンディングを行ったのち
、リードフレームlの連結部13を切り離し、マウント
部11を樹脂封止することにより外部リード部12を端
子とする半導体装置ができ上がる。なお、ワーク支持体
3を上下動可能にしないで突起のみを上下動可能にして
もよい。 別の実施例としては、固定した支持体上においてリード
フレームに対するワイヤボンディングを行い、次いでリ
ードフレームを移動させて隣接配置された上下に可動の
支持体上にボンディングされた部分を位置させ、可動支
持体を上げてその表面に設けられた突起により既に接続
された導線を押し上げてループを形成する方法がある。
【発明の効果】
本発明によれば、例えばリードフレームにマウント部固
定された半導体チップの電極と端子導体として役立つ外
部リード部との接続する導線をボンディング時またはそ
のあとで上下動可能の突起により導線を押し上げてルー
プを形成し、接続された半導体チップと端子導体を送る
ときには突起を下げることにより導線を傷つけないよう
にすることにより、導線の接触に基づく半導体装置の不
良がなくなり、得られる効果は大きい。
【図面の簡単な説明】
第1図は本発明の一実施例におけるボンディングステー
シッンの断面図、第2図は同じく平面図である。

Claims (1)

    【特許請求の範囲】
  1. 1)半導体チップ上の電極と端子導体とを導線によって
    接続するものであって、ボンディング位置あるいはそれ
    と異なる位置に上下動可能で上がったときに半導体チッ
    プと端子導体との中間で導線を押し上げる突起を表面に
    有する支持体を備えることを特徴とするワイヤボンディ
    ング装置。
JP61118109A 1986-05-22 1986-05-22 ワイヤボンデイング装置 Pending JPS62274631A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61118109A JPS62274631A (ja) 1986-05-22 1986-05-22 ワイヤボンデイング装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61118109A JPS62274631A (ja) 1986-05-22 1986-05-22 ワイヤボンデイング装置

Publications (1)

Publication Number Publication Date
JPS62274631A true JPS62274631A (ja) 1987-11-28

Family

ID=14728241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61118109A Pending JPS62274631A (ja) 1986-05-22 1986-05-22 ワイヤボンデイング装置

Country Status (1)

Country Link
JP (1) JPS62274631A (ja)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50128465A (ja) * 1974-03-27 1975-10-09
JPS5197370A (ja) * 1975-02-21 1976-08-26
JPS5327762B2 (ja) * 1973-06-08 1978-08-10

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5327762B2 (ja) * 1973-06-08 1978-08-10
JPS50128465A (ja) * 1974-03-27 1975-10-09
JPS5197370A (ja) * 1975-02-21 1976-08-26

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