JPS622702B2 - - Google Patents

Info

Publication number
JPS622702B2
JPS622702B2 JP56122655A JP12265581A JPS622702B2 JP S622702 B2 JPS622702 B2 JP S622702B2 JP 56122655 A JP56122655 A JP 56122655A JP 12265581 A JP12265581 A JP 12265581A JP S622702 B2 JPS622702 B2 JP S622702B2
Authority
JP
Japan
Prior art keywords
terminal
integrated circuit
holding member
hybrid integrated
hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56122655A
Other languages
Japanese (ja)
Other versions
JPS5823464A (en
Inventor
Tsutomu Kamata
Takeyoshi Masuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56122655A priority Critical patent/JPS5823464A/en
Publication of JPS5823464A publication Critical patent/JPS5823464A/en
Publication of JPS622702B2 publication Critical patent/JPS622702B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

【発明の詳細な説明】 本発明は改良された混成集積回路装置等の半導
体装置の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved method of manufacturing semiconductor devices such as hybrid integrated circuit devices.

第1図aは従来の製造方法により作られた混成
集積回路装置の平面図、第1図bは第1図aの混
成集積回路装置の要部断面図である。
FIG. 1a is a plan view of a hybrid integrated circuit device manufactured by a conventional manufacturing method, and FIG. 1b is a sectional view of a main part of the hybrid integrated circuit device of FIG. 1a.

図において1はアルミニユーム,銅等から成り
断面が凹形のヒートシンクであり、混成集積回路
基板(以下ハイブリツドIC基板という)2がそ
の凹形の空間の低面に固着される。3はハイブリ
ツドIC基板2に接続される第1導電端子であ
る。4は接着剤である。5は第1導電端子3に接
続されると共に外部に導出される第2導電端子6
を保持する端子保持部材である。この端子部材5
はヒートシンク1の端部に接着剤4で固着され
る。6は第2導電端子であり端子保持部材5と一
体成形される。7は樹脂であり、ハイブリツド
IC基板2を保護するために、ヒートシンク1の
凹形の空間に充填される。
In the figure, numeral 1 is a heat sink made of aluminum, copper, etc. and having a concave cross section, and a hybrid integrated circuit board (hereinafter referred to as a hybrid IC board) 2 is fixed to the lower surface of the concave space. 3 is a first conductive terminal connected to the hybrid IC board 2. 4 is an adhesive. 5 is a second conductive terminal 6 connected to the first conductive terminal 3 and led out to the outside.
This is a terminal holding member that holds the terminal. This terminal member 5
is fixed to the end of the heat sink 1 with an adhesive 4. Reference numeral 6 denotes a second conductive terminal, which is integrally molded with the terminal holding member 5. 7 is resin, hybrid
In order to protect the IC board 2, the concave space of the heat sink 1 is filled.

このような混成集積回路装置はハイブリツド
IC基板2に通常、複数個の図示しない半導体素
子、コンデンサー、抵抗、等の回路部品が実装さ
れており、混成集積回路装置の動作時には熱が発
生する。この熱を外部に放熱するためハイブリツ
ドIC基板2はヒートシンク1に固着されてい
る。またハイブリツドIC基板2上の前記回路部
品を湿気,ガス,じんかい等から遮断して長期間
安定して使用し、前記回路部品が機械的振動に耐
えるよう保持するために樹脂7を充填し、硬化さ
せている。
Such hybrid integrated circuit devices are called hybrid
A plurality of circuit components (not shown) such as semiconductor elements, capacitors, and resistors are usually mounted on the IC board 2, and heat is generated when the hybrid integrated circuit device operates. The hybrid IC board 2 is fixed to the heat sink 1 in order to radiate this heat to the outside. In addition, the circuit components on the hybrid IC board 2 are insulated from moisture, gas, dust, etc. and used stably for a long period of time, and in order to hold the circuit components so as to withstand mechanical vibration, a resin 7 is filled and hardened. I'm letting you do it.

端子保持部材5は第2導電端子6を有しており
ヒートシンク1の端部に強力な接着力をもつ接着
剤4により固着され、また、前述の樹脂7によつ
て固定されている。
The terminal holding member 5 has a second conductive terminal 6 and is fixed to the end of the heat sink 1 with an adhesive 4 having a strong adhesive force, and is also fixed with the resin 7 described above.

この端子保持部材5は射出成形により、第2導
電端子6の一部を埋め込むように一体化成形した
ものである。
This terminal holding member 5 is integrally molded by injection molding so as to embed a part of the second conductive terminal 6.

このような従来の混成集積回路装置は以下に説
明するようにして作られる。
Such conventional hybrid integrated circuit devices are made as described below.

まず、図示しない射出成形金型を加熱し、複数
個の第2導電端子6をコ字状またはクシ状に連結
したフレーム状端子連を前記金型に装着し、この
状態で前記金型内に樹脂を射出成形により注入し
て第2導電端子6を有する端子保持部材5を作
る。
First, an injection molding mold (not shown) is heated, a frame-shaped terminal chain in which a plurality of second conductive terminals 6 are connected in a U-shape or a comb-shape is attached to the mold, and in this state, the frame-shaped terminal chain is inserted into the mold. The terminal holding member 5 having the second conductive terminal 6 is made by injecting resin by injection molding.

つぎにヒートシンク1の低面にハイブリツド
IC基板1をろう付等により取り付ける。
Next, attach the hybrid to the lower side of heat sink 1.
Attach the IC board 1 by brazing or the like.

つぎにハイブリツドIC基板1の表面に第1導
電端子3をろう付等により取り付ける。
Next, the first conductive terminal 3 is attached to the surface of the hybrid IC board 1 by brazing or the like.

つぎにヒートシンク1の端部に第2導電端子6
を有する端子保持部材5を接着し、第1導電端子
3と第2導電端子6とをろう付等により接続す
る。
Next, a second conductive terminal 6 is attached to the end of the heat sink 1.
The terminal holding member 5 having the above is bonded, and the first conductive terminal 3 and the second conductive terminal 6 are connected by brazing or the like.

さらに、ヒートシンク1の凹形の空間に樹脂7
を充填し硬化させて混成集積回路装置を完成す
る。
Furthermore, the resin 7 is placed in the concave space of the heat sink 1.
The hybrid integrated circuit device is completed by filling and curing.

上記第2導電端子6を有する端子保持部材5の
従来の製造方法は金型およびフレーム状端子連の
ピツチに高い精度が必要となり金型およびフレー
ム状端子連が高価となる。また、金型へのフレー
ム状端子連の挿入は手作業であり、作業性が悪く
非常に危険である。
The conventional manufacturing method of the terminal holding member 5 having the second conductive terminal 6 requires high precision in the pitch of the mold and the frame-shaped terminal chain, making the mold and the frame-shaped terminal chain expensive. In addition, the frame-shaped terminal chain is inserted into the mold manually, which is inefficient and very dangerous.

本発明は上記従来の混成集積回路装置の製造方
法の欠点を除去するためになされたものであり、
放熱体の端部に取り付けられ放熱体の低面に対向
する位置に張り出す外部導出導体取付部材を外部
導出導体と圧入と樹脂の述填により結合し、安全
性が高く、高能率な半導体装置の製造方法を提供
するものである。
The present invention has been made in order to eliminate the drawbacks of the above-mentioned conventional method for manufacturing a hybrid integrated circuit device.
The external lead-out conductor mounting member attached to the end of the heat radiator and protruding from a position facing the lower surface of the heat radiator is connected to the outer lead-out conductor by press-fitting and filling with resin, resulting in a highly safe and highly efficient semiconductor device. The present invention provides a method for manufacturing.

第2図aは本発明の一実施例の製造方法により
作られた混成集積回路装置の平面図、第2図bは
第2図aの混成集積回路装置の要部断面図であ
る。
FIG. 2a is a plan view of a hybrid integrated circuit device manufactured by a manufacturing method according to an embodiment of the present invention, and FIG. 2b is a sectional view of a main part of the hybrid integrated circuit device of FIG. 2a.

以下、本発明の一実施例について第2図a,b
により詳細に説明する。
Hereinafter, one embodiment of the present invention will be explained in Fig. 2 a and b.
This will be explained in more detail below.

なお、以上に述べる工程以外は前記従来の混成
集積回路装置の製造方法と同一であり、説明は省
略する。
Note that the steps other than those described above are the same as those of the conventional method for manufacturing a hybrid integrated circuit device, and the explanation thereof will be omitted.

まず、端子保持部材8の端部の直径が根本部の
直径より大きい凸部8aに孔付導電端子を各々は
め込んだ後約300℃に昇温した加熱体または超音
波振動子により第2図bの如く前記凸部8aに孔
付導電端子9を熱融着し、端子保持部材8と孔付
導電端子9とを結合する。このような方法によれ
ば上記各部品をパーツフイーダにより自動供給す
ることができ、かつ、自動的に組み合わした後熱
融着することができるので安全かつ能率よく混成
集積回路装置を作ることができる。
First, a conductive terminal with a hole is fitted into each convex portion 8a whose end diameter is larger than that of the base portion of the terminal holding member 8, and then a heating element or an ultrasonic vibrator heated to about 300° C. is heated as shown in FIG. 2b. A conductive terminal 9 with a hole is heat-sealed to the convex portion 8a as shown in FIG. According to this method, the above-mentioned parts can be automatically supplied by a parts feeder, and can be automatically assembled and then heat-sealed, so that a hybrid integrated circuit device can be produced safely and efficiently.

このようにして組立てられた端子保持部材8は
さらに端子保持部材8と孔付導電端子9との固着
を強めるためヒートシンク1に接着剤4にて端子
保持部材8を取り付け第1導電端子3と孔付導電
端子9とを接続後、端子保持部材8の上部に樹脂
10を充填した後硬化させて、混成集積回路装置
を作る。
The terminal holding member 8 assembled in this manner is further fixed with the terminal holding member 8 attached to the heat sink 1 with adhesive 4 in order to strengthen the adhesion between the terminal holding member 8 and the conductive terminal 9 with the hole. After connecting the attached conductive terminals 9, the upper part of the terminal holding member 8 is filled with resin 10 and then hardened to produce a hybrid integrated circuit device.

第3図は本発明の他の実施例の製造方法を説明
するための混成集積回路装置の要部断面図であ
る。この方法は樹脂10の充填を端子保持部材8
のみに行うようにしたものである。この実施例に
よれば端子保持部材8と孔付導電端子9との樹脂
10による結合はヒーシンク1に端子保持部材8
を接着する前に行うこともできるし、さらに他の
方法としてはヒートシンク1に端子保持部材8を
接着後ヒートシンク1内の樹脂7を余分に注入し
て同時に端子保持部材8と孔付導電端子9を結合
することもできる。
FIG. 3 is a sectional view of a main part of a hybrid integrated circuit device for explaining a manufacturing method according to another embodiment of the present invention. In this method, the terminal holding member 8 is filled with the resin 10.
It was designed to be carried out only on rare occasions. According to this embodiment, the connection between the terminal holding member 8 and the conductive terminal 9 with holes through the resin 10 is achieved by connecting the terminal holding member 8 to the heatsink 1.
Alternatively, as another method, after bonding the terminal holding member 8 to the heat sink 1, extra resin 7 in the heat sink 1 is injected and the terminal holding member 8 and the conductive terminal with hole 9 are bonded at the same time. can also be combined.

以上説明のように、本発明は放熱体の端部に取
り付けられ放熱体の低面に対向する位置に張り出
す外部導出導体取付部材を外部導出導体と圧入と
樹脂の充填により結合するので安全かつ高能率に
半導体装置を製造することができるという優れた
効果を有する。
As explained above, in the present invention, the external conductor mounting member attached to the end of the heat sink and protruding from the lower surface of the heat sink is connected to the external conductor by press-fitting and filling with resin, so it is safe and secure. It has an excellent effect of being able to manufacture semiconductor devices with high efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,bは従来の混成集積回路装置の製造
方法を説明するための平面図および要部断面図、
第2図a,bは本発明の一実施例の混成集積回路
装置の製造方法を説明するための平面図および要
部断面図、第3図は他の実施例を説明するための
混成集積回路装置の断面図である。 図中1はヒートシンク、2はハイブリツドIC
基板、3は第1導電端子、8は端子保持部材、9
は孔付導電端子である。図中の同一符号は同一ま
たは相当部分を示す。
FIGS. 1a and 1b are a plan view and a sectional view of essential parts for explaining a conventional method of manufacturing a hybrid integrated circuit device,
FIGS. 2a and 2b are a plan view and a sectional view of essential parts for explaining a method of manufacturing a hybrid integrated circuit device according to an embodiment of the present invention, and FIG. 3 is a hybrid integrated circuit for explaining another embodiment of the present invention. FIG. 2 is a cross-sectional view of the device. In the diagram, 1 is a heat sink, 2 is a hybrid IC
a substrate, 3 a first conductive terminal, 8 a terminal holding member, 9
is a conductive terminal with a hole. The same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体素子を断面が凹形の放熱体の低面に取
り付ける工程と、前記半導体素子に外部導出導体
を接続する工程と、前記放熱体の端部に取り付け
られ前記低面に対向する位置に張り出す外部導出
導体取付部材を前記外部導出導体と圧入により結
合する工程と、前記工程により形成された結合部
に樹脂を充填する工程とを含む半導体装置の製造
方法。
1. A step of attaching a semiconductor element to the lower surface of a heat radiator having a concave cross section, a step of connecting an external conductor to the semiconductor element, and a step of attaching a semiconductor element to the end of the heat radiator and extending it to a position opposite to the lower surface. A method for manufacturing a semiconductor device, comprising the steps of: coupling an externally led conductor mounting member to the externally led conductor by press fitting; and filling a joint formed by the step with resin.
JP56122655A 1981-08-04 1981-08-04 Manufacture of semiconductor device Granted JPS5823464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56122655A JPS5823464A (en) 1981-08-04 1981-08-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56122655A JPS5823464A (en) 1981-08-04 1981-08-04 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5823464A JPS5823464A (en) 1983-02-12
JPS622702B2 true JPS622702B2 (en) 1987-01-21

Family

ID=14841344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56122655A Granted JPS5823464A (en) 1981-08-04 1981-08-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5823464A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60258458A (en) * 1984-06-06 1985-12-20 Mitsubishi Heavy Ind Ltd Hot dipping apparatus
JPS61266560A (en) * 1985-05-22 1986-11-26 Nippon Steel Corp Hot dipping method to low coating weight
JPS62103353A (en) * 1985-10-31 1987-05-13 Nippon Steel Corp Hot dipping method for giving thin layer

Also Published As

Publication number Publication date
JPS5823464A (en) 1983-02-12

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