JPS62247630A - Method and device for elimination of inter-code interference by decision feedback - Google Patents

Abstract

PURPOSE:To eliminate the interference caused within a symbol waveform by using a one-tap adaptive filter. CONSTITUTION:It is possible to extract only the residual inter-code interference component with a certain positive probability excluding zero by obtaining the sum of or difference between the present sample value and that preceding by MT seconds (M: an integer, T:a data period) in terms of a differential signal ( received signal containing the residual inter-code interference component). Therefore said sum or difference is used as an error signal to up date the coefficient only when said interference component is correctly extracted. Thus the adaptive working of an adaptive filter 25 is secured. While the artificial inter-code interference signal, i.e., the output of an adaptive filter 20 is supplied to an adder 22 and added with the output of the filter 25 to be fed to a subtractor 2. Then the inter-code interference produced at the zero-cross point of the same symbol waveform end is eliminated by the waveform in a symbol.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an intersymbol interference removal method and apparatus using decision feedback for removing intersymbol interference that occurs during waveform transmission.

[Conventional technology]

A decision feedback equalizer is known as a known technique for removing intersymbol interference that occurs during waveform transmission. (IEEE TRANSACTIONS ON COMMUNICATIONS)
OMMUNICATIONS>Volume 32 No. 3, 1984
, pp. 258-266. ) FIG. 8 shows a conventional example of a decision feedback equalizer.

The circuit shown in FIG. 8 is connected to the transmitting side via a transmission line. Here, for simplicity, explanation will be given assuming baseband transmission. In FIG. 8, a received signal subjected to intersymbol interference is supplied from a transmission path to an input terminal 1, and is input to a subtracter 2.

The subtracter 2 produces a difference signal obtained by subtracting the pseudo intersymbol interference signal generated by the adaptive filter 5 from the received signal supplied to the input terminal 1 (=received signal containing the residual intersymbol interference component, [residual intersymbol interference component ]=[intersymbol interference component coe [pseudo intersymbol interference signal]) is obtained and supplied to the determiner 3 and the subtractor 6. The determiner 3 determines the received signal data from the output of the subtracter 2, and sends the determination result to an output terminal 4, an automatic gain controller (hereinafter abbreviated as AGC) 7, and an adaptive controller.
Supplied to filter 5. The pseudo intersymbol interference signal adaptively generated by the adaptive filter 5 is supplied as one input of the subtracter 2. The output signal of the determiner 3 supplied to the AGC 7 is multiplied by 1 and input to the subtracter 6. Here, γ is a positive number. The signal supplied from the AGC 7 to the subtracter 6 is subtracted from the difference signal supplied to the subtracter 6,
It is fed back to the AGC 7 as a control signal. In AGC7,
Using the signal fed back from the subtracter 6, γ is corrected so that the output of the subtracter 6 is equal to the residual intersymbol interference component.

That is, the closed loop circuit consisting of the subtracter 6 and the AGC 7 operates to extract only the residual intersymbol interference component in the difference signal that is the output of the subtracter 2. This is realized by adaptively determining the gain of the output signal of the AGC 7 by correlating the output signal of the subtracter 6 and the output signal of the determiner 3 in the AGC 7. The residual intersymbol interference component that is the output of the subtracter 6 is also supplied to the adaptive filter 5,
Used for coefficient update. A closed loop circuit consisting of a subtracter 2, a determiner 3, and an adaptive filter 5 is connected to an input terminal 1.
The receiver operates to remove intersymbol interference experienced by the received signal supplied to the receiver.

[Problem that the invention seeks to solve]

In order for the adaptive filter 5 to perform an adaptive operation, it is necessary to correctly supply the residual intersymbol interference component to the adaptive filter. However, since the difference signal that is the output signal of the subtracter 2 also contains signals other than the residual intersymbol interference component, assuming that the output signal of the subtracter 2 is directly supplied to the adaptive filter 5, the adaptive filter 5 The adaptive ability of the filter 5 will be lost. Therefore, conventionally, as shown in FIG.
A method has been used in which the adaptive operation of the adaptive filter 5 is guaranteed by extracting the residual intersymbol interference component. However, in such a control method, the AGC7 is required, and in order to obtain a sufficient degree of intersymbol interference suppression, the received signal that is not affected by the intersymbol interference and is supplied from the AGC7 to the subtracter 6. This method requires complicated control to maintain a desired level, and has the drawback of increasing the hardware scale. Further, although the conventional decision feedback equalizer can remove inter-symbol interference caused by a sequence of past transmitted symbol waveforms, it has been impossible to remove interference within symbol waveforms.

The purpose of the present invention is to provide simple and small hardware scale.
An object of the present invention is to provide a method and apparatus for removing intersymbol interference using decision feedback. Another object of the present invention is to provide a method and method of intersymbol interference cancellation using decision feedback, which is capable of removing not only intersymbol interference caused by a sequence of past transmitted symbol waveforms, but also interference within a symbol waveform. The goal is to provide equipment.

[Means for solving problems]

According to the present invention, after a pseudo intersymbol interference signal is subtracted from a received signal subjected to intersymbol interference to obtain a difference signal, the difference signal and a delayed signal obtained by delaying the difference signal are added or subtracted to remain. An intersymbol interference component is obtained, and a first adaptive filter converts either the polarity of the residual intersymbol interference component or the polarity of the difference signal into a demodulated data sequence obtained by demodulating the sampling phase and the difference signal. receiving the error signal selected based on the selected demodulated data sequence and the demodulated data sequence, and when the polarity of the residual intersymbol interference component is selected, updates the coefficients only when a specific pattern of the demodulated data sequence is detected;
Before the symbol waveform of the difference signal is completely received by the second adaptive filter, the coefficients are updated in response to the polarity of the difference signal and the temporary demodulated data sequence obtained by demodulating the symbol waveform of the difference signal. An intersymbol interference removal method using decision feedback is obtained, which is characterized in that the pseudo intersymbol interference signal is generated by adding the outputs of the second adaptive filters.

Further, according to the present invention, a subtracter for obtaining a difference between a received signal and a pseudo intersymbol interference signal, a first determiner that receives the output of the subtracter and generates demodulated data, and the first determiner a first adaptive filter receiving the demodulated data and a first error signal supplied from the subtracter; a plurality of cascaded sample and hold circuits for sampling and holding the output of the subtracter; an arithmetic unit for obtaining the sum or difference between the output of the subtracter and the output of the cascaded sample-and-hold circuit; a first polarity detection circuit for detecting the polarity of the output signal of the arithmetic unit; a first selector that selects either the output of the polarity detection circuit of 1 or 0; a pattern check circuit that receives the demodulated data and generates a signal that switches the first selector; and an output signal of the subtracter. a second polarity detection circuit for detecting the polarity of the second polarity detection circuit;
a first switch that distributes the output of the polarity detection circuit based on the phase of the received signal; and a first switch that distributes the output of the first selector and one contact output of the first switch based on the demodulated data. a second selector that selects one contact output of the first switch, and a second selector that selects one of the output of the first selector and the output of the second selector based on the phase of the received signal. a second determiner that receives the output of the subtracter and generates temporary demodulated data before completely receiving the symbol waveform of the output of the subtracter; and an output of the second determiner and a second error. 2nd receiving signal
and an adder for adding the outputs of the first and second adaptive filters to generate the pseudo intersymbol interference signal, and adding the output of the second switch to the first adaptive filter. Based on decision feedback, characterized in that the error signal is fed back to the first adaptive filter, and one contact output of the first switch is fed back to the second adaptive filter as the second error signal. An intersymbol interference canceling device is obtained.

[Effect]

Unlike the conventional method of multiplying the output of the determiner by a constant to generate a received signal that does not contain residual intersymbol interference components and subtracting it from the difference signal, the present invention focuses on the characteristics of the eye pattern of the received signal and The configuration is such that inter-symbol interference components can be extracted accurately with a certain probability determined by the transmission path code. That is, according to the characteristics of the received signal eye pattern of a transmission path code including a binary code system, if intersymbol interference can be ignored, the current sample value and MT seconds (M is a positive integer, T is the data period)
The minimum probability that the previous sample values are approximately the same value or that the respective absolute values are approximately the same value with opposite polarity takes a certain positive value that is not zero. Therefore, by calculating the sum or difference between the current sample value and the sample value MT seconds ago for the difference signal (=received signal containing residual intersymbol interference components), residual intersymbol interference can be detected with a certain positive probability that is not zero. Only the components can be extracted. Therefore, by using the sum or difference as an error signal and updating the coefficients only when the residual intersymbol interference component is correctly extracted, the adaptive operation of the adaptive filter is guaranteed. Furthermore, the present invention is configured to be able to remove interference within the symbol waveform, which was impossible with conventional methods, by providing a one-tap adaptive filter for removing interference within the symbol waveform.
Higher tolerance to clock jitter than before,
Performance can be improved.

〔Example〕

Next, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, a received signal subjected to intersymbol interference is supplied from a transmission path to an input terminal 1, and is supplied to a subtracter 2. First, transmission line codes will be explained. FIG. 2 shows the symbol waveform and state transition of an MSK (minimum shift keying) code as an example of a transmission line code. As shown in FIG. 2, four types of symbol waveforms are prepared in the MSK code. That is, two types of waveforms, a "10" mode and a "-" mode, each having an inverted polarity, are prepared for data of 0'' and 1''. These four types of state transitions are indicated by arrows in FIG. 2, and the current mode is determined by the mode one symbol before. This MSK code has the property that the polarity always inverts at the boundary of the symbol waveform. The transmission path code shown in FIG. 2 is transmitted through the transmission path and is input to the input terminal 1 of FIG. 1 after receiving intersymbol interference.

The difference signal obtained by subtracting the pseudo intersymbol interference signal which is the output of the adder 22 in the subtracter 2 (=received signal containing the residual intersymbol interference component) is sent to the determiner 3 and the sample/hold circuit 81 + 82 +..., 8p (p
=MR), an adder 9, a polarity determination circuit 15, and one determiner. Judgment device 3
determines the data and mode corresponding to the received symbol waveform every T seconds, and its output is connected to output terminal 4 and the pattern
The signal is supplied to the check circuit 12, selector 14, and adaptive filter 25. adaptive filter 25,
Adder 22, subtracter 2, sample and hold circuit 81.
82,..., block consisting of cascade connection of 8p, adder 9, polarity detection circuit 10, selector 11, switch 1
The closed loop circuit consisting of 3 is an adaptive filter 25
The pattern check circuit 12 controls the closed loop circuit to selectively update coefficients. The selector 11 selects either the output of the polarity detection circuit 10 or zero based on the signal from the pattern check circuit 12 and supplies the selected output to the switch 13 . Switch 13 selects selector 1 based on the sampling phase.
1 output, or output of selector 14, or switch 16
output is selected and supplied to the adaptive filter 25. Next, the relationship between the output of the adder 9 and the residual intersymbol interference component in the difference signal that is the output of the subtracter 2 will be explained in detail.

FIG. 3 shows an example of a received signal eye pattern when the transmission line code shown in FIG. 2 is adopted. As shown in the figure, the received signal eye pattern has high frequency components removed and becomes rounded. Originally, the received signal eye pattern contains intersymbol interference components, but the eye pattern shown at first to simplify the explanation is the case when waveform equalization is ideally performed, and the intersymbol interference component is included in the received signal eye pattern. shall not contain any ingredients.

According to the characteristics of the received signal eye pattern shown in FIG. Waveform and M symbols (M is a positive integer)
This is when the data of the previous received signal waveforms match and the modes are different, and the received signals are canceled with a probability of 1/4. Now, considering a non-ideal case, the received signal includes residual intersymbol interference components. Since the current residual intersymbol interference component and the residual intersymbol interference component before M symbols are uncorrelated, the residual intersymbol interference component before M symbols can be regarded as random noise. The amplitude distribution of the residual intersymbol interference component before M symbols is symmetrical in sign and negative, and its amplitude d takes a value of ldl < ε. Therefore, it can be seen that the probability that only the residual intersymbol interference component is extracted as the output signal of the adder 9 takes a certain positive value that is not zero. Additionally, the magnitude of the residual intersymbol interference component is generally sufficiently small relative to the received signal. Therefore, the waveform shown in FIG. 3 can be regarded as the received signal waveform even if it is not ideal. Therefore, if the output of the adder 9 is used to control the adaptive filter 25 and the received signal that interferes with the adaptive operation of the adaptive filter 25 is canceled out, the adaptive operation of the adaptive filter 25 is guaranteed. become.

Note that if the conditions that the current received signal waveform and the data of the received signal before M symbols match and the modes are different are not satisfied, the received signals will not cancel out. It is necessary to check the signal data and mode and stop the coefficient update. Control of this coefficient update is realized by the pattern check circuit 12 and the selector 11.

The pattern check circuit 12 compares the current received signal waveform and M
Detects that the received signal data T seconds ago are equal and have different modes; otherwise, adaptive filter 2
This is for stopping the updating of the coefficient No. 5, and can be realized by the circuit shown in FIG. A data signal 51 and a mode signal 52 constituting the output signal of the determiner 3 are input to this circuit. The mode signal 52 corresponds to the modes "+" and "-',
The values are “1” and “o”. Note that in FIG. 1, the path connecting the judge 3 and the pattern check circuit 12 and the path connecting the judge 3 and the adaptive filter 25 are shown as one line, but when the MSK code is adopted, the data signal 5
1 and a mode signal 52. M
A delay element 53 providing a delay of T seconds and a negative exclusive OR circuit (XN0R) 55 check whether the current signal and the data signal of the signal MT seconds ago match. This is realized by calculating the negative exclusive OR of the data signal 51 and a signal obtained by delaying the signal by MT seconds by the delay element 53 using the XN0R 55. The output of the XN0R55 becomes one input of an AND circuit (AND) 59. Similarly, an exclusive OR circuit (XOR>
58, and use the output as the other input of the AND5. The human ND 59 ANDs the matching output of the data signal and the mismatching output of the mode signal and uses it as a control signal 60. The control signal 60 is supplied to the selector 11 of FIG. In addition, M
Delay elements 53, 56 providing a delay of T seconds are realized by connecting M flip-flops in series.

The selector 11 receives a control signal 60 from the pattern check circuit 12, selects the output of the adder 9 or zero according to the control signal 60, and supplies the selected output to the switch 13 and the selector 14. The selector 11 sends the output signal of the adder 9 to the switch 13
As described above, the pattern check circuit 12 supplies data to the selector 14 to check that the data of the current received signal and the received signal MT seconds ago match and that the modes are different.
is detected. When only the residual intersymbol interference component is accurately extracted by the selector 11 and the pattern check circuit 12, the residual intersymbol interference component is obtained as the output of the selector 11, and in other cases, zero is obtained as the output of the selector 11.

On the other hand, the difference signal which is the output of the subtracter 2 is sent to the polarity determination circuit 15.
After the polarity of the difference signal is detected, it becomes an input to the switch 16. The switch 16 has four output contacts, from the first output contact to the fourth output contact every T/R seconds (assuming R is an even number and R=4).
Switch in the direction of the arrow in the figure and output. From the left in the figure, the first. Second. Third. The fourth output contact is used, and this operation is repeated every T seconds. The sampling phase of operation of switch 16 is shown in FIG. 3, at t. , 11
, 12 and 13 are the first . . . , 12 and 13 of the switch 16 in FIG.
Second. Third. This corresponds to the sampling phase of the fourth output contact. The third contact output of switch 16 is selector 1
4 inputs. In addition, the selector 14
The output of the selector 11 is supplied as the other input. On the other hand, the data signal which is the determination result of the determiner 3 is inputted to the selector 14 as a control signal, and when the data signal is "1", the third contact output of the switch 16 is selected and output, and the data When the signal is 0, the output of the selector 11 is selected and output. That is, as is clear from the output waveform in Figure 3, the data signal is
', the symbol has a zero crossing point at the center, so the output of the third output contact of the switch 16 shown in FIG. Sometimes, the center of the symbol does not have a zero crossing point, so the output of the selector 11 becomes the residual intersymbol interference component.Therefore, the output of the selector 14 is sent to the switch 13 as the residual intersymbol interference component at the sampling phase t2.
is supplied to the third input contact of. The switch 13 is a switch having four input contacts, and is synchronized with the switch 16 for T/R seconds (here, it is assumed that R=4).

), the input is sequentially switched from the first input contact to the fourth input contact in the direction of the arrow in FIG. From the left in the figure, the first. Second. Third. This operation is repeated every T seconds using the fourth input contact. tg, tl+ shown in FIG.
tz and t, respectively, are switched to the first . Second. Corresponds to the sampling phase of the third and fourth input contacts. The first input contact of the switch 13 receives the first contact output of the switch 16, the second and fourth input contacts receive the output of the selector 11, and the third input contact receives the output of the selector 14 as described above. Outputs are provided respectively. As shown in FIG.
Since no zero crossing point occurs at and tz, the tap coefficients of the adaptive filter 25 are selectively updated using the residual intersymbol interference component obtained as the output of the selector 11 in FIG. Selecting zero in the selector 11 means that the tap coefficients are not updated, and corresponds to the case where no residual code interference component is obtained. Furthermore, at the sampling phase t2, the data signal “
Residual intersymbol interference component power corresponding to 0” and °1”) (
77147 and is supplied to the third input contact of switch 13. Therefore, as the output of the switch 13, the residual intersymbol interference component necessary for updating the tap coefficients is obtained at each sampling phase and is supplied to the adaptive filter 25. In the above description, R=4, but it is clear that R may be any even number.

Next, the adaptive filter 25 will be explained in detail.

FIG. 5 shows a block diagram of the adaptive filter 25 of FIG. The data signal 51, the mode signal 52, and the output signal 107 of the switch 13, which constitute the output signal of the determiner 3 in FIG. 1, are input to this filter. The mode signal 52 is transmitted through the delay element 1001 and the multiplier 10.
1°, 1011, -. 101R- and coefficient generator 10
20°102+, . . . , 102R-1.

The data signal 51 is also supplied to a delay element 100'r and coefficient generators 102o, 1021, . . . , 102°-2. Delay elements 1001.100□, ..., 100 N/R-1 each giving a delay of T seconds
and 100'], 100"z,..., 10
0' N/R-1 are connected in this order, and each can be realized by a flip-flop. here,
The number of taps N is a positive integer, and R is a divisor of N. Further, the data period of the data signal 51 and mode signal 52 is T
Seconds. Delay element 100'+(i.1, 2...

The outputs of N/R-1) are multipliers 101J and 1
01J+1. ..., 101 J+R-1 and coefficient generator 102J, 102J+1, ..., 102
Supplied to J+R-1. Moreover, the delay element 100'+(
i・1.2. ..., N/R-1) outputs are respectively,
Coefficient generator 102J, 102j+1. ..., 10
2 Supplied to J+R-1. However, j=iXR. To the multiplier 101, 101 to +R2..., 101 to +N-R (k・0, 1..., R-1>, respectively, to the coefficient generator 102, 102h-a, .=, 102
Each coefficient that is the output of +N+□ and the input mode signal (+1
or -1), all of the multiplication results are input to the adder 103k and added. R adders 103
n, 1031, -. The output of 103R-1 is switch 1
04 contact input. The switch 104 is a multi-contact switch with a cycle of T seconds, and has R adders 103o,
1031. −． The outputs of 103 are selected and output in this order every T/R seconds, and a pseudo intersymbol interference signal 108 caused by the past transmission data sequence is generated every T/R seconds. On the other hand, a switch 105 that operates in synchronization with the switch 104 has an input/output direction opposite to that of the switch 104 .

That is, the switch 105 functions to sequentially distribute the input signal 107 to R contacts every T/R seconds.

Each contact output of the switch 105 is supplied to a coefficient generator present in a signal path input to the contact corresponding to the switch 104 operating synchronously.

Next, the coefficient generator will be explained in detail.

FIG. 6 shows the coefficient generator 102 of FIG. ! (!・0,1
゜..., N-1> block diagram is shown. The mode signal 200 in FIG. 6 is the mode signal 5 in FIG.
2 or delay elements 1001, 100z,..., 100
It corresponds to the mode signal output from N/R-1.

Similarly, the data signal 200' of FIG. 6 is connected to the data signal 51 of FIG. 5 or the delay element 100' 1, 1oo'2 .・・・
., corresponds to the data signal output from the 100" N/R-1. Also, the error signal 201 in FIG. 6 corresponds to the contact output of the switch 105 in FIG. The output signal 209 in the figure corresponds to the output of the coefficient generator 102□ in FIG. 5. In FIG. Also, a mode signal 200 that takes "+1'' or -1" corresponding to the data signal 200' is supplied as one of the inputs of the multiplier 202. On the other hand, multiplier 2
02 is supplied with an error signal 201 consisting only of residual intersymbol interference components. Multiplier 202
Then, after the mode signal 200 and the error signal 201 are multiplied, the multiplication result is supplied as one input of the adder 203.

Here, delay elements 206 and 207 giving a delay of T seconds
are coefficient memories corresponding to "0" and "1" of the data signal 200', respectively, and their outputs are both sent to the selector 2.
08 input.

On the other hand, the data signal 200' is input as a control signal to the selector 208, and when the data signal 200 is 0'', it selects and outputs the coefficient corresponding to "0" which is the output of the delay element 206, and outputs the data. When the signal 200' is 1', the coefficient corresponding to the output of the delay element 207 of "1" is selected and output, and in either case, the output signal 209 representing the coefficient is obtained. The signal 209 is fed back to the adder 203, and after being added to the output signal of the multiplier 202, it is input to the selectors 204 and 205.The outputs of the delay elements 206 and 207 are input to the selectors 204 and 205, respectively. Furthermore, the outputs of selectors 204 and 205 are supplied to delay elements 206 and 207, respectively.Next, the operations of selectors 204, 205, and 208 will be explained.

When the data signal 200' is "0", the selector 20
8 selects the output of the delay element 206 corresponding to the data signal “0” and outputs it as an output signal 209. At this time, the output signal 209 is input to the adder 203, and then fed back to the delay element 206 via the selector 204, and the data "
0" is updated. On the other hand, the selector 205 selects the output of the delay element 207 and supplies it again to the delay element 207, so that the data "
The coefficient corresponding to 1'' is not updated.Contrary to this case, the data signal 200' is updated.

1", the selector 208 selects the output of the delay element 207, which is a coefficient corresponding to data 1, and outputs it as 20 output signals. At this time, the output signal 209 is input to the adder 203 and then , is fed back to the delay element 207 via the selector 205, and the coefficient corresponding to the data "1" is updated.On the other hand, the selector 204 selects the output of the delay element 206 and outputs the coefficient to the delay element 207 again.
06, the coefficient corresponding to the data ``O''' is not updated. According to the principle explained above, the coefficient corresponding to the data signal 200' is The coefficients of the adaptive filter can be adjusted adaptively by selecting the coefficients to be used, updating the coefficients for the coefficients that have been used, and retaining the original values for the coefficients that have not been used. Note that if only the residual intersymbol interference component is not extracted from the output of the adder 9 in FIG.
The coefficients of the filter 25 are not updated, and the error signal 201
becomes zero. At this time, as is clear from FIG. 6, the coefficient update is stopped, so the adaptive filter 25
convergence is guaranteed. The pseudo intersymbol interference signal caused by the past data sequence generated by the adaptive filter 25 is supplied to the subtracter 2 via the adder 22, and the received signal subjected to the intersymbol interference supplied from the input terminal 1 is is subtracted from. Next, interference cancellation within a symbol waveform will be explained.

The adaptive filter 20 has the role of removing intersymbol interference caused by the waveform within a symbol at the zero crossing points of the ends of the same symbol waveform. One determiner receives the difference signal that is the output of the subtracter 2, and determines the sampling phase t for the waveform within the first half of 3T/4 seconds of the symbol waveform with a period of T seconds.
, the data and mode are determined, and the obtained temporary demodulated data is supplied to the adaptive filter 20. Further, the first contact output of the switch 16 is supplied to the adaptive filter 20 via the polarity determination circuit 15. Therefore, at the sampling phase to, the polarity of the difference signal output from the subtracter 2 is input to the adaptive filter 20 and used as an error signal for updating the coefficients. As shown in FIG. 3, in an ideal case without intersymbol interference, the sampling phase 1.0 at the end of the symbol waveform. is a zero crossing point, but in reality, the amplitude at 1° does not become zero because intersymbol interference occurs. This difference is the intersymbol interference component, and the signal supplied from the output contact of the switch 16 matches the polarity of the intersymbol interference component.

FIG. 7 is a block diagram of adaptive filter 20 of FIG. The basic configuration corresponds to one tap and one phase of the adaptive filter 25 in FIG. Therefore, the operating principle of coefficient updating is exactly the same as that shown in FIG.

In FIG. 7, functional blocks or signals indicated by the same reference numerals as in FIG. 6 are also the same. However, in the case of FIG. 7, the data signal 212' and the mode signal 212 correspond to the output of the determiner 19 of FIG. 1. Furthermore, the error signal 213 in FIG. 7 corresponds to the output signal of the first output contact of the switch 16 in FIG. The difference between FIG. 7 and FIG. 6 is that the mode signal 212 and the output signal 2 of the selector 208
09 is performed in the multiplier 210, and a pseudo intersymbol interference signal 211 is output. Also, the 6th
The error signal 201 in the figure takes three values, +1 and 0, but the 7th
The error signal 213 in the figure takes a binary value of +1. The pseudo intersymbol interference signal, which is the output of the adaptive filter 20 configured with the circuit shown in FIG.
is input.

In FIG. 1, sample and hold circuits 81, 8□.

..., only the residual intersymbol interference component is extracted by the block consisting of cascaded 8Ps and the subtracter 9, but the third
As is clear from the eye pattern in the figure, the adder 9 is replaced with a subtracter, and a negative exclusive OR circuit is used in place of the XOR 58 for detecting the mismatch of mode signals in the circuit shown in FIG. A similar effect can be obtained by detecting coincidence of signals. Also, in Figure 1, the sample
It was assumed that the time required for sampling in the hold circuits 81, 8□, ..., 8P can be ignored, but if this assumption does not hold, the number of sample-and-hold circuits will increase + [
PT/(T-R8]+11 or more may be prepared. Here, δ is the time required for sampling by the sample-and-hold circuit, [X] is the maximum integer not exceeding X, and p=M XR. The sampling period of each sample-and-hold circuit is always equal to T/R.Now, the phases of adjacent sample-and-hold circuits are shifted from each other by (T/R-δ).At this time, one sample-and-hold circuit In this case, the sample value is held for (T/R-δ) seconds after subtracting the time δ required for sampling.For example, M=1.R=4.δ=
For T/32, the number of sample-and-hold circuits needs to be five or more, and if five sample-and-hold circuits are connected in series, the total hold time is 35T/32.
becomes. This is the maximum hold time that can be achieved by connecting five sample and hold circuits in series. In order to make the entire hold time T, the sample phases of adjacent sample-and-hold circuits may be sequentially shifted by T15.

In addition, the sample phases of the four sample-and-hold circuits are sequentially shifted by 7T/32, and the remaining one is used as the sample phase of the previous stage.
Even if the hold sample phase is shifted by 4T/32, the overall hold time can be reduced to T. In this way, by appropriately shifting the sample phases of adjacent sample and hold circuits, the overall hold time can be reduced to T.
It can be done. Similarly, smaller than T/R,
For any δ, any desired hold time can be obtained by connecting a sufficient number of sample-and-hold circuits in series and appropriately selecting the sample phase.

Therefore, even if the time generally required for sampling cannot be ignored, any hold time that is an integral multiple of T can be obtained.

Although the present invention has been described above in detail using the MSK code as an example, a biphase code, for example, can be used as the transmission path code. When using a biphase code, the received signal is a waveform obtained by shifting the received signal waveform shown in Figure 3 by T/2 seconds, so the pattern check method must be unique to biphase codes. . If the pattern check circuit 12 is configured as a logic circuit that outputs "1" only when it detects a combination of waveforms that cancel out the received signals, it can be used as a pattern check circuit for the MSK code shown in FIG. Can be used equally. However, in the case of the pi-phase code, the input signal to the pattern check circuit is only the data signal.

In the case of the pi-phase code, the control signal of the selector 14 is further different from that of the MSK code. That is, the selector 14 selects the output signal depending on whether the received signal takes a zero value or not at the sample point t2 in FIG. 3, but in the case of a pi-phase code, t2 is the boundary of the symbol waveform. Selector 1 corresponds to two consecutive symbol waveforms.
It is necessary to use a circuit for controlling 4. Considering transmission path codes other than these codes in the same way, if a pattern in which the received signal is canceled out is detected and the update of the coefficients of the adaptive filter 25 is controlled, the residual intersymbol interference component can be extracted accurately with a certain probability. It is clear that it can be done.

〔Effect of the invention〕

As described in detail above, according to the present invention, the residual intersymbol interference component contained in the received signal is not zero by calculating the sum or difference between the current value and the value MT seconds ago for the difference signal. Extracted accurately with probability of positive value. Therefore, by using the above sum or difference and further detecting a continuous pattern of the received signal waveform such that the residual intersymbol interference component can be extracted accurately, the sum or difference and the difference signal are calculated in accordance with the sampling phase. Adaptive operation is guaranteed by controlling an adaptive filter by updating coefficients while selecting, and provides a method and apparatus for removing intersymbol interference using decision feedback that is simple and does not require complicated control and has small hardware scale. can. Further, according to the present invention, it is possible to match the zero crossing points of the received signal with the sample points and simultaneously eliminate not only intersymbol interference caused by past symbol waveform sequences but also interference within symbol waveforms. It has the advantage that the judgment timing phase can always be optimally maintained regardless of the transmission distance, and is resistant to clock jitter.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing the symbol waveform and state transition of an MSK code, FIG. 3 is a diagram showing an eye pattern corresponding to the MSK code, and FIG. 4 is a diagram showing an eye pattern corresponding to the MSK code.
5 is a block diagram showing the pattern check circuit in FIG. 1, FIG. 5 is a block diagram of the adaptive filter 25 in FIG. 1, FIG. 6 is a block diagram of the coefficient generator in FIG. FIG. 7 is a block diagram of the adaptive filter 20 in FIG. 1, and FIG. 8 is a block diagram showing a conventional example of a decision feedback type isolator. 1... Input terminal, 2... Subtractor, 3.19... Determiner, 4... Output terminal, 5, 20.25... Adaptive filter, 81, 82. ..., 8p...sample/hold circuit, 9.22...adder, 10.
15...Polarity detection circuit, 11.14...Selector,
12... Pattern check circuit, 13.16...
switch. 1, /↑゛Agent Patent Attorney Uchihara Muka・H'-゛,- Figure 2 Figure 3 Ward 6 Ward 7

Claims (2)

[Claims] (1) After subtracting the pseudo intersymbol interference signal from the received signal that has undergone intersymbol interference to obtain a difference signal, add or subtract the difference signal and a delayed signal that delayed the difference signal to cause residual intersymbol interference. component, and a first adaptive filter selects either the polarity of the residual intersymbol interference component or the polarity of the difference signal based on the sampling phase and the demodulated data sequence obtained by demodulating the difference signal. When the polarity of the residual intersymbol interference component is selected, the coefficients are updated only when a specific pattern of the demodulated data sequence is detected, and the second adaptive - Updating the coefficients in response to the polarity of the difference signal and the temporary demodulation data sequence obtained by demodulating the difference signal before the symbol waveform of the difference signal is completely received by the filter, and updating the coefficients of the first and second adaptive signals. - An intersymbol interference removal method using decision feedback, characterized in that the pseudo intersymbol interference signal is generated by adding the outputs of filters. (2) a subtracter for obtaining the difference between the received signal and the pseudo intersymbol interference signal, a first determiner that receives the output of the subtracter and produces demodulated data, and the a first adaptive filter receiving demodulated data and a first error signal; a plurality of cascaded sample and hold circuits for sampling and holding the output of the subtracter; and an output of the subtracter; an arithmetic unit for obtaining the sum or difference with the outputs of the cascaded sample-and-hold circuits; a first polarity detection circuit for detecting the polarity of the output signal of the arithmetic unit; and the first polarity detection circuit. a first selector that selects either the output of the subtracter or zero; a pattern check circuit that receives the demodulated data and generates a signal that switches the first selector; and a pattern check circuit that detects the polarity of the output signal of the subtracter. a second polarity detection circuit; a first switch that distributes the output of the second polarity detection circuit based on the phase of the received signal; and a contact between the output of the first selector and one of the first switches. a second selector that selects one of the outputs based on the demodulated data; and one of the first switches.
a second switch that selects one of the first selector output and the second selector output based on the phase of the received signal; and a second switch that receives the subtracter output and selects the subtracter output. a second determiner that generates provisional demodulation data before completely receiving the symbol waveform; and a second adaptive detector that receives the output of the second determiner and a second error signal.
a filter, and an adder that adds the outputs of the first and second adaptive filters to generate the pseudo intersymbol interference signal, and the output of the second switch is used as the first error signal. Intersymbol interference by decision feedback, characterized in that the signal is fed back to the first adaptive filter, and one contact output of the first switch is fed back to the second adaptive filter as the second error signal. removal device.