JPS62245754A - Diagnosis control system for time division channel - Google Patents

Abstract

PURPOSE:To improve the resolution of diagnosis and to reduce a diagnosis execution time by applying time slot conversion at a prescribed junc time slot location to a pilot signal so as to apply diagnosis control to a highway switch section. CONSTITUTION:A highway number and a time slot number accommodating a pilot signal to supervise normally a channel are recognized by a time division channel diagnosis command from mastr controllers 50, 50a, the pilot signal is converted to a prescribed junc time slot location to confirm the conduction of a highway switch section 22. Further, junc time slot numbers 101, 103 are revised automatically sequentially to confirm the conduction of all address areas of the primary and secondary time switch talking memories. Thus, the diagnosis execution time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a diagnostic control system for a highway switch section of a TS"T type time-division communication path, and particularly relates to a diagnostic control system for a time-division communication path using pilot signals. .

〔overview〕

The present invention provides a diagnostic control method for a time-division communication path having a TS'T type communication path configuration, by recognizing a highway number and a time slot number that accommodate a pilot signal used for constant monitoring of the communication path. By converting the pilot signal into a predetermined junctor time slot position and performing diagnostic control of the highway switch section, the diagnostic resolution can be improved and the diagnosis can be performed without using the conventionally required tools. This allows the execution time to be significantly reduced.

[Conventional technology]

Conventionally, the diagnostic control method for the highway switch section in this type of TS'' T-type time-division communication path uses a separate device such as a communication path monitoring and testing device as a tool device, and the time-division communication path is controlled by the main controller. Continuity was confirmed by inserting and removing the test signal into and from the time switch section in the time division communication path of the diagnostic system.In addition, each grid gate, primary side and secondary side time switch in the highway switch was checked. In diagnosing all communication memory in the section, update control for confirming the normality of each junta time slot passing through the highway switch was performed by sequential control from the main controller.

[Problem that the invention seeks to solve]

The above-mentioned conventional diagnostic control method for the highway switch unit in the TS"T type time-division communication path uses a separate device other than the device to be diagnosed, such as a communication path monitoring and testing device, as a tool device, so the control of this tool device, etc. This not only increases the burden on diagnostic control processing, but also generally increases the suspect range, which has the drawback of causing a decrease in resolution, which is the basic performance of diagnosis.

Furthermore, the update control of the junctor time slots for checking the full continuity of each grid gate of the highway switch section in the time-sharing communication path and the communication memory in the primary and secondary time switches is controlled sequentially by the main controller. This has the drawback of prolonging the execution time of the diagnosis.

SUMMARY OF THE INVENTION An object of the present invention is to provide a diagnostic control method for a communication path device that can improve the resolution of diagnosis and significantly shorten the diagnostic execution time by eliminating the above-mentioned drawbacks.

(Means for Solving the Problems) The present invention provides a time division communication path device having a TS''T type communication path configuration and equipped with pilot signal testing means for constantly monitoring this communication path, and a microprocessor. In the method for diagnosing a time-division communication path including a communication path control device that has a built-in controller and controls the time-division communication path device, and a main control device, the time-division communication path from the main control section is controlled by the microprocessor. In accordance with the call path diagnosis command, the highway number and time slot number accommodating the pilot signal are recognized, the pilot signal is sequentially changed to the junctor time slot position to be tested, and the pilot signal test means is used to perform the time division test. It is characterized by checking the continuity of the highway switch section of the communication path.

[Effect]

Is this invention the main side? 11, recognizes the highway number and time slot number that accommodate the pilot signal for constantly monitoring the communication path, and converts this pilot signal to a predetermined junctor time slot position. , Check the continuity of the highway switch section. Further, by automatically updating the junctor time slot numbers in sequence, continuity of all address areas of the primary and secondary time switch call memories is confirmed.

Therefore, in the present invention, diagnostic control of the highway switch section can be performed using a pilot signal for normal constant monitoring, and a special diagnostic control tool device is not required, so the resolution of diagnosis is improved. can. Furthermore, the autonomous diagnostic function can be performed by a microprocessor built into the channel control device, rather than by the conventional main control device, and the diagnostic execution time can be significantly shortened.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

The figure is a block diagram showing a TST type communication path device to which an embodiment of the present invention is applied.

In this embodiment, the time division communication path device (0) (TDNW (0
)+20 and time-division channel equipment (1) (TDNW(
1)) 20a and subscriber or trunk highway 11
0 as time division channel device (0), (1), 20.20
Forward side highway accommodation device (TDC(F)
) 10 and time division channel devices (0), (1), 2
A highway accommodation device (TDC (B)) 30 on the backward side that sends an output of 0.20a to the subscriber or medium 41NM highway 120, and a time division communication path device (0) 2
(SWC(0)+40 and the communication path control bag!(1) (SWC(1)) 40a and the communication path system Main controller (0) (MC
P(0)) 50 and main controller (1) (MCP(
1) It includes a bus 50a, a switch bus (S-bus) 60, and a communication path bus (SP bus 70).

The forward side highway accommodation device 10 includes a highway reception control circuit (REIC) 11, an interface circuit (NWIF) 12 with the time division communication path devices (0), (1), and 20.20a, and a pilot signal generation circuit ( PLG) 13. Further, the highway accommodation device 30 on the backward side includes an interface circuit 31,
It includes a pilot signal synchronization circuit (PLS) 32, a pilot check circuit (PLO) 33, and a highway transmission control circuit 34.

Furthermore, the time division channel device (0) 20 and the time division channel device (1) 20a each have a channel memory (PSW).
i) 21a, a control holding memory (SCM), a conversion circuit (21b) that performs additional control and has a least significant bit inversion function (
F) an i (i = 0 to n 1 )th primary side (input side) time switch (TSW, 1) 21 including 21c;
The lattice gate (λij) 22a for highway conversion from the i-th ingress highway (IIWi) 80 to the j-th egress highway (IIWj) 90, and according to its contents, the ingress highway (IIWi) 80 and the egress highway () Illj) A highway conversion between 90 and 90 is carried out (
The figure shows the case where the i-th highway is converted to the j-th highway.
) 22b (jxoxm-1:m matches the multiplicity of the highway).
Wj) 22, the j-th (j=
0-n-1) secondary side (output side) time switches (TSWs)
j) Contains 23.

Furthermore, the communication path control device (0) 40 and the communication path control device (1) 40a are connected to the time division communication path devices (0), (1), 20.20 via the switching bus 60, respectively.
Interface circuit for controlling a (3%1IIN
F) 41, a wiring logic control circuit (PATI (C) 42 that performs bus control in normal call processing, main control circuits (0), (1), 50.50a and order Interface circuit (SPINF) 43 for transmitting and receiving
, a built-in processor circuit (CPU) 44, a control memory (MEM) 45 for the built-in processor circuit, a processor bus 46, a main control circuit (0), (1), 50.
Queue control circuit (ORDQ) that accumulates inter-processor communication command orders from 50a 47, main control device (0)
, (1) includes a queue control circuit (ANSQ) 48 for returning response information to 50.50a, and an interface circuit (CPINF) 49 for controlling the interface between the interface circuit 43 and the processor circuit 44.

In the figure, the interface circuit 12, pilot signal generation circuit 13, interface circuit 31, pilot signal synchronization circuit 32, and pilot signal check circuit 33 are each provided with two systems, a (0) system and a (1) system. It will be done.

In addition, time division channel equipment (0), (1), 20.2
The communication memory 21a in Oa operates in a sequential writing mode and sequential reading mode, and the communication path memory 23a operates in a sequential writing mode and occasional reading mode.

The feature of the present invention is that in the figure, the main controller (0), (1
), 50.50a holds the pilot signal from the pilot signal generation circuit 13 in accordance with the time-division channel diagnosis command. Under the control of the memories 21b, 22b, 23b and the conversion circuit 21c, the junctor time slots of the channel memories 21a, 23a are The pilot signal synchronization circuit 32
, the pilot signal check circuit 33 performs the check. This is repeated autonomously under the control of the processor circuit 44 to perform diagnostic control of the primary time switch 21, highway switch 22, and secondary time switch 23.

Next, the operation of this embodiment will be explained. The explanation is (
This is done for system (0), but the same applies to system (1)).

Communication path control device (0) 40 is the main control device! (0)
When a diagnosis instruction for the highway switch section of the time division communication path device (0) 20 is received from 50, the entire grid of the highway switch section (primary side time switch (TSWpt) 21 - highway switch (IIsW, ) 22 - secondary side time Switch (TSWsj) 23: 0≦1sn-1,0
TS diagnosis of ≦j≦n-1). -〇S oath. -TSW
TS vows sequentially from -o□71゜-ll5W, l-, TSW
−(,1−n, n×n total lattice gates λ,, (0
≦i≦n-1, 0≦j≦n-1). Also 1
In order to test all addresses of the secondary channel memory (PSWi) 21a and the secondary channel memory (SSJ) 23a, (i=j) of the conversion lattice gate λ cage 22a is
For the grid, the Junta time slot number (JE
N) Diagnose the highway switch (HSWj) 22 by setting the lot to JEN = 1 to m -1 (m: multiplicity of time-division highway) and limiting the grid of (i≠j) to JUN = 1. Assumed to be performed. In the following explanation, the case of λ1j (t=3) will be explained.

First, the forward side pilot signal accommodation time slot of the control holding memory (SCM, z) 21b of the primary side time switch (TS, 1) 21 corresponds to the forward side highway accommodation position number (FIJEN) 100. "1" is written in the highway diagnosis start junctor time slot number (JEN) 101 at the address where At the time when the control holding memory (SCM, 1) 2
Junctor time slot number (JUN) 101 for starting diagnosis read from 1b has the least significant bit inverted,
JIEN=0, that is, the communication path memory (PSJ) 21a
The pilot signal is stored at address "0".

Next, the control holding memory (IIcMJ) 22b in the highway switch (IIsW, ) 22 corresponding to the secondary side time switch (TSW, j) 23 (here, the control holding memory (IIcM) is TSW), and stores information that controls the highway conversion of the entrance (forward) time switch highway to the exit (backward) time switch highway.

) JEN=0, that is, control holding memory (llcMj)
The pilot signal is stored at address O of 22b.

Next, the backward pilot signal accommodating time slot of the control holding memory (SCM, . . . ) 23b, that is, the backward highway accommodating position number (BNI!) is selected.
N) The address corresponding to 102 is JEN+1・0
is written, the pilot signal is read out from the secondary side time switch (SSWJ) 23a at the time corresponding to the backward side pilot signal accommodation time slot, and the backward side highway accommodation device (B) (TDC ( B
)) The pilot signal (10101010-01010101→
(10101010 patterns alternately repeated every frame)
The pilot signal is checked in the pilot signal check circuit (PLC) 33 through the synchronization circuit (PLS) 32 of the time division channel device (0) (TD
NW (0)) Diagnosis of the high power switch section within 20 is possible.

In this case, the bus control, the update control of the junctor time slot number (LEN), the update control of the highway lattice gate )140
A processor (CPU) 44 built into the control memory (ME?I) 45 and an order queue control circuit (0111
[IQ) 47 and the processor bus 46 in autonomous logic, the order control 711 execution circuit (CONT) 24 performs the operation, the diagnostic result is stored in the answer queue control circuit 48, and the communication system bus 70 The result is reported to the main control circuit (0) (MCP(0)) 50.

As explained above, according to this embodiment, it is possible to efficiently utilize the pilot signal that is generally installed in the device to be diagnosed, and to autonomously execute the diagnosis using the communication path control device that has a built-in microprocessor or the like. By arranging the means in a distributed manner independent of the main controller, rapid diagnosis with high resolution becomes possible.

〔Effect of the invention〕

As explained above, the present invention applies the pilot signal, which is generally provided for continuous communication path continuity monitoring of a time-division communication path device, to the diagnosis of a highway switch section in a time-division communication path. Since no external channel continuity confirmation signal tool device is required, the diagnostic resolution can be improved. Furthermore, by distributing the highway switch diagnostic function independently from the main control device and distributing it to the communication route control device with a built-in microprocessor, etc., and adopting a system that provides an autonomous diagnostic function, the diagnostic execution time can be significantly reduced. This has the effect of shortening the time.

[Brief explanation of drawings]

The figure is a block diagram showing a TST type communication path device to which an embodiment of the present invention is applied. IO...Highway storage bag ff (TDC(F))
, 11... Highway reception control circuit (REC), 12
．． 31... Interface circuit (NWIF), 13.
...Pilot signal generation circuit (PLG), 20...
Time division channel equipment (0) (TDNW (0)), 20
a... Time division communication path device (1) (Tl) NW (1)
), 21,...Primary side time switch (TSW, =)
, 21a...Speech path memory (PSW), 21b
...Control holding memory (SCMpi), 21c...
・Conversion circuit (F), 22...highway switch (
HS14. ), 22a... Highway conversion lattice gate (λ+j), 22b... Control holding memory (1IC
MJ), 23...Secondary side time switch (TSW,
j), 23a = speech path memory (SSWj), 23b.
... Control holding memory (SCM□), 30... Highway accommodation device (TDC (B)), 32... Pilot signal synchronization circuit (PLS), 33... Pilot signal check circuit (PLO), 40-・・Call path control device (0
) (SWC(0)l, 40a...Speech path control device (1) (SWC(1)), 41...Interface circuit (SWINF), 42...Wiring logic control circuit (PATHC), 43 °°°Interface circuit (SPINF), 44...Process circuit (CPU), 45...Control memory (ME?I)
), 46... Processor path, 47... Queue control circuit (ORDQ), 48... Answer queue control circuit (ANS(1), 49... Interface circuit (CP
INF), 50... Main controller (0) (MCP(0
)l, 50a... Main control device (1) (MCP(1
) l, 60...Switch system bus, 70...Communication route bus, 80...Ingress highway (IIWi), 9
0...Exit highway (IIWj), 100...
Highway accommodation position number (FNEN), 101... Junta time slot number (Jl!N), 102...
・Highway accommodation location number (BNEN), 103...
・Junta time slot number (JEN+1), 1
10.120...Subscriber or Trunk Highway.

Claims (1)

[Claims] (1) A time-division channel device having a TS^nT-type channel configuration and equipped with pilot signal testing means for constantly monitoring this channel, and a built-in microprocessor to control the time-division channel device. In a system for diagnosing a time-division communication path including a communication path control device and a main control device, the pilot signal is controlled by the microprocessor in accordance with a time-division communication path diagnosis command from the main control unit. Recognize the highway number and time slot number to be accommodated, change the pilot signal to the tested junctor time slot position sequentially, and use the pilot signal testing means to check the continuity of the highway switch section of the time-division communication path. thing