JPS62240731A - Lead material for semiconductor equipment - Google Patents

Lead material for semiconductor equipment

Info

Publication number
JPS62240731A
JPS62240731A JP8529286A JP8529286A JPS62240731A JP S62240731 A JPS62240731 A JP S62240731A JP 8529286 A JP8529286 A JP 8529286A JP 8529286 A JP8529286 A JP 8529286A JP S62240731 A JPS62240731 A JP S62240731A
Authority
JP
Japan
Prior art keywords
lead material
peeling
solder
soft solder
alloy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8529286A
Other languages
Japanese (ja)
Inventor
Hajime Sasaki
元 佐々木
Shinichi Nishiyama
西山 進一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP8529286A priority Critical patent/JPS62240731A/en
Publication of JPS62240731A publication Critical patent/JPS62240731A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To manufacture a lead material capable of directly plating soft solder free from peeling even if temp. is elevated, by adding trace amounts of Ag, Mn, Ni, Sb, and Zn to a Cu-Sn alloy. CONSTITUTION:0.1-2.5% Sn by weight and 0.1-1.0% of one or more elements among Ag, Mn, Ni, Sb, and Zn are incorporated to Cu. This lead material is capable of directly plating soft solder and, even if a diffusion alloy layer with Sn is formed, soft solder hardly peels of from the interface. Consequently, even if this lead material is used under the condition of sharp temp. rise such as automobile engine room, it has no possibility of causing peeling of soft solder, so that reliability of products can be remarkably improved.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、ICなどの半導体リードフレーム用として使
用される銅合金材料の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to improvements in copper alloy materials used for semiconductor lead frames such as ICs.

[従来の技術と問題点] ICなどのパッケージにはDIP (Dual InL
ine Package  )やP L CC(Pla
stic  LeadedChip Carrier)
などといった様々な形態のものがおるが、これら従来の
リード部分には、はとんどはんだめっきが施され、それ
によって基板との接続が行なわれている。
[Conventional technology and problems] DIP (Dual InL) is used for packages such as ICs.
ine Package) and P L CC (Pla
stic Leaded Chip Carrier)
There are various forms such as these, but these conventional lead portions are usually plated with solder to connect to the board.

一方、ICなどの半導体素子が高集積化されるにつれ、
高い熱放散性がのぞまれるようになったことや、コスト
をできるだけ低減したいとする要請などなどから、近年
リード材として銅合金が使用される例が多くなった。と
ころが、このような銅合金をリード材として使用すると
、前記はんだ中の3nとCuとが拡散し合い、界面に金
属間化合物が生成される。このとき生成する金属間化合
物は、ε相(Cu3Sn)とη相(Cu6Sn5)から
なるものであり、いずれも性質が脆く、これらが生成さ
れると、曲げ応力、引張応力、熱応力等が加わった場合
に、はんだが界面で剥離するという現象がみられる。
On the other hand, as semiconductor devices such as ICs become highly integrated,
Copper alloys have been increasingly used as lead materials in recent years due to demands for high heat dissipation and the desire to reduce costs as much as possible. However, when such a copper alloy is used as a lead material, 3n and Cu in the solder diffuse into each other, and an intermetallic compound is generated at the interface. The intermetallic compounds generated at this time consist of ε phase (Cu3Sn) and η phase (Cu6Sn5), both of which are brittle in nature, and when these are generated, bending stress, tensile stress, thermal stress, etc. are applied. A phenomenon in which solder peels off at the interface is observed when

とくに銅合金を強化するという目的から、3n、Fe等
が添加された場合には、母材とε相の界面にFeが濃縮
され、剥離が起り易くなることも知られている。
It is also known that when 3n, Fe, etc. are added especially for the purpose of strengthening a copper alloy, Fe is concentrated at the interface between the base material and the ε phase, making it easy to peel off.

近年多方面へのマイコンの応用などから、ICの使用用
途が拡大され、それに伴いその使用条件も苛酷なものと
なりつつある。例えば、自動車のエンジンルームなどに
おいて使用された場合には、使用中に温度が上昇し、は
んだとリード材との前記化合物層の形成が促進され、前
記剥離をまねくおそれが大きいのである。
In recent years, the applications of ICs have expanded due to the application of microcomputers to various fields, and the conditions for their use have become more severe. For example, when used in the engine room of an automobile, the temperature rises during use, which promotes the formation of the compound layer between the solder and the lead material, and there is a large possibility that this may lead to the peeling.

従って、従来は、このような使用条件においてはリード
材として銅合金を使用しないか、使用するにしても銅合
金に特殊なめっき処理を施してからはんだめっきするこ
となどが行なわれてきた。
Therefore, conventionally, under such usage conditions, copper alloys have not been used as lead materials, or even if they have been used, the copper alloys have been subjected to special plating treatment and then solder plated.

[発明の目的] 本発明は、上記のような実情にかんがみてなされたもの
でおり、半導体機器用のリード材として、直接はんだめ
っきされ、snとの拡散合金層が生成されても、前記界
面よりの剥離の起りにくい銅合金を提供しようとするも
のでおる。
[Object of the Invention] The present invention has been made in view of the above-mentioned circumstances, and even if it is directly solder plated as a lead material for semiconductor devices and a diffusion alloy layer with sn is generated, the interface The purpose of this invention is to provide a copper alloy that is less prone to peeling.

[発明の概要] すなわち、本発明の要旨とするところは、リード材とし
て使用されるCu−3n合金に、Act、Mn、N i
 、Sb、Zn等の微量を添加したことにあり、それに
よって前記金属間化合物の生成を抑制しあるいはその界
面に元素の濃縮が起らないようにして、前記はんだの剥
離を効果的に抑制しようとしたものである。
[Summary of the Invention] That is, the gist of the present invention is that Act, Mn, Ni
, Sb, Zn, etc., to suppress the formation of the intermetallic compounds or prevent the concentration of elements at the interface, thereby effectively suppressing the peeling of the solder. That is.

[実施例] 以下に実施例に基いて説明する。[Example] This will be explained below based on examples.

Cu−3n合金が半導体機器用リード材として使用され
ていることは公知である。しかして、本発明に係る合金
のSnの下限は重量比(以下同じ)にして0.1%であ
る。それは必要な強度を得るための下限となるからであ
る。そして、Snの上限については、熱放射性の低下を
考慮すると、2.5%が上限となるのである。
It is known that Cu-3n alloy is used as a lead material for semiconductor devices. Therefore, the lower limit of Sn in the alloy according to the present invention is 0.1% by weight (the same applies hereinafter). This is because it is the lower limit for obtaining the necessary strength. The upper limit of Sn is 2.5%, taking into consideration the decrease in thermal radiation.

上記の組成範囲にある合金は、すでに説明した通り、は
んだとの間に拡散を生じ易く、合金層での前記剥離現象
を起し易い。しかしながら、発明者らは、上記合金にA
Q、Mn、N i 、Sb、Znのいずれかを単独で、
あるいは2以上を、所定範囲内で添加すると、これらの
元素が前記、Cu−Sn合金とはんだとの拡散によるε
相の生成を抑制する効果のあることを見出すとともに、
たとえε相が生成されても、特定元素が母材と合金層と
の間に濃縮するのを妨げ、ε相中に拡散して行って、前
記はんだの剥離に発展するのを抑制する効果のあること
も見出したのでおる。
As already explained, alloys within the above composition range are likely to cause diffusion with the solder, and are likely to cause the above-mentioned peeling phenomenon in the alloy layer. However, the inventors have discovered that the above alloy has A
Q, Mn, Ni, Sb, Zn alone,
Alternatively, if two or more elements are added within a predetermined range, these elements will increase the ε due to the diffusion between the Cu-Sn alloy and the solder.
In addition to discovering that it has the effect of suppressing phase formation,
Even if the ε phase is generated, the effect is to prevent specific elements from concentrating between the base material and the alloy layer, and to prevent them from diffusing into the ε phase and developing into solder peeling. I also discovered something.

しかして、上記の添加元素の含有量の下限を単独あるい
は2以上の合計で0.1%としたのは、これ以下では上
記効果が得られないためであり、また上限を1%とした
のは、これ以上の添加をするとベースとなっているCu
−3n合金の熱伝導性を害するようになるからでおる。
Therefore, the lower limit of the content of the above additive elements was set at 0.1% either singly or in combination of two or more because the above effects cannot be obtained below this, and the upper limit was set at 1%. If more than this is added, the base Cu
This is because it impairs the thermal conductivity of the -3n alloy.

以下に本発明に係る合金材料の具体的実施例を比較例と
共に説明する。
Specific examples of alloy materials according to the present invention will be described below along with comparative examples.

高周波溶解炉中、不活性雰囲気においてそれぞれ第1表
に示すような組成よりなる銅合金を溶解鋳造した。次に
これを熱間圧延により10mtの板材とした。ざらに冷
間圧延と焼鈍を繰り返し、最終的に50%圧延加工度の
0.25mt板材とした。これより試験片として107
1111巾X30mNに切り出した。
Copper alloys each having the composition shown in Table 1 were melted and cast in a high frequency melting furnace in an inert atmosphere. Next, this was made into a 10 mt plate material by hot rolling. Roughly cold rolling and annealing were repeated, and finally a 0.25 mt plate material with a rolling degree of 50% was obtained. From this, 107 as a test piece
It was cut out to a size of 1111 width x 30 mN.

この試験片をイソプロピルアルコールで脱脂洗浄した後
、ロジンフラックスを塗布し、230±℃に制御された
Pb/釦共晶はんだ中へ5秒間浸漬し、どぶ付はんだめ
っきを行った。
After degreasing and cleaning this test piece with isopropyl alcohol, it was coated with rosin flux and immersed in Pb/button eutectic solder controlled at 230±C for 5 seconds to perform gutter solder plating.

次に、はんだめっきの拡散による剥離を試験するため1
50℃に設定した恒温槽に試験片を置き、ioo 、3
00.500 、1000時間後にそれぞれ取り出し0
.2Hの90°曲げを行ない、ざらに密着面げした後曲
げ戻どし、はんだの剥離の有無を外観及び断面検鏡によ
り確認した。第1表に試験を行なった合金の組成及びは
んだ剥離試験結果を示す。
Next, in order to test peeling due to diffusion of solder plating, 1
Place the test piece in a constant temperature bath set at 50°C,
00.500 and 0 after 1000 hours respectively.
.. After bending at 90° for 2H and roughening the surface in close contact, it was returned to bending and the presence or absence of peeling of the solder was confirmed by external appearance and cross-sectional inspection. Table 1 shows the composition of the alloys tested and the results of the solder peeling test.

試験結果の通り、Cu−Sn合金及びl”e、Siの含
有されたもの、又、Ni、Mn等の添加量の少いものは
はんだめつき復150℃に加熱すると300〜500時
間後曲げにより剥離を生ずる様になる。ところがN i
、Mn、Sb、A(J、Znを単独又は2種以上添加ざ
すれば1000時間の加熱においても曲げによる剥離は
見られず、すぐれた効果を発揮することが明白となった
According to the test results, Cu-Sn alloys, those containing l"e, Si, and those with small additions of Ni, Mn, etc. are soldered and heated to 150°C after 300 to 500 hours. Bending causes peeling.However, Ni
, Mn, Sb, A(J, and Zn), when added alone or in combination of two or more, showed no peeling due to bending even after heating for 1000 hours, and it became clear that an excellent effect was exhibited.

またEPMAにより500時間加熱俊の試お1の断面の
母材とはんだめっき界面の分析を行ったところ、比較合
金であるNα7及び9ではFe及びSiがそれぞれ界面
に濃縮しておりここで剥離していることもわかった。又
、Nα8,10.11ではε相が厚く成長していた。こ
れに対し、本発明合金であるNα1〜6ではε相の成長
が抑制され剥離も起こっていないことが確認された。
In addition, when we analyzed the interface between the base material and the solder plating in the cross section of test sample 1 heated for 500 hours using EPMA, we found that in the comparison alloys Nα7 and 9, Fe and Si were concentrated at the interface, and peeled off at this point. It was also found that Further, at Nα8, 10.11, the ε phase had grown thickly. On the other hand, it was confirmed that the growth of the ε phase was suppressed and no peeling occurred in Nα1 to Nα6, which are the alloys of the present invention.

[発明の効果] 以上、本発明に係る合金をもってすれば、これをICな
どの半導体リードフレーム材として使用し、前記エンジ
ンルームのような温度上昇のはげしい相当に過酷な条件
下において使用しても、従来例のようにはんだが剥離す
るおそれがなく、製品の信頼性を大巾に高め得て、半導
体機器の応用範囲を安全により一層拡大せしめ得ること
となるものであり、半導体の各方面への応用がめざまし
い進展をしている今日、その意義はまことに大きなもの
がある。
[Effects of the Invention] As described above, the alloy according to the present invention can be used as a semiconductor lead frame material for ICs, etc., even under fairly harsh conditions such as the engine room where the temperature rises rapidly. , there is no risk of the solder peeling off as in conventional cases, and the reliability of the product can be greatly improved.The range of applications for semiconductor equipment can be further expanded safely, and it can be used in various fields of semiconductors. Today, with the remarkable progress made in the application of technology, its significance is truly significant.

Claims (1)

【特許請求の範囲】[Claims] (1)重量比においてSnを0.1〜2.5%、これに
Ag、Mn、Ni、Sb、Zn、のうち1種または2種
以上の合計で0.1〜1.0%含み、残部は本質的にC
uよりなる半導体機器用リード材。
(1) Contains 0.1 to 2.5% Sn in weight ratio, and 0.1 to 1.0% in total of one or more of Ag, Mn, Ni, Sb, and Zn, The remainder is essentially C
A lead material for semiconductor devices made of u.
JP8529286A 1986-04-14 1986-04-14 Lead material for semiconductor equipment Pending JPS62240731A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8529286A JPS62240731A (en) 1986-04-14 1986-04-14 Lead material for semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8529286A JPS62240731A (en) 1986-04-14 1986-04-14 Lead material for semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS62240731A true JPS62240731A (en) 1987-10-21

Family

ID=13854502

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8529286A Pending JPS62240731A (en) 1986-04-14 1986-04-14 Lead material for semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS62240731A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010118432A (en) * 2008-11-12 2010-05-27 Denso Corp Electronic apparatus and method for manufacturing the same
WO2019029018A1 (en) * 2017-08-07 2019-02-14 苏州列治埃盟新材料技术转移有限公司 Copper-based alloy material for electronic hardware of locomotive and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010118432A (en) * 2008-11-12 2010-05-27 Denso Corp Electronic apparatus and method for manufacturing the same
WO2019029018A1 (en) * 2017-08-07 2019-02-14 苏州列治埃盟新材料技术转移有限公司 Copper-based alloy material for electronic hardware of locomotive and preparation method thereof

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