JPS62234301A - Manufacture of resistance circuit board - Google Patents

Manufacture of resistance circuit board

Info

Publication number
JPS62234301A
JPS62234301A JP7782086A JP7782086A JPS62234301A JP S62234301 A JPS62234301 A JP S62234301A JP 7782086 A JP7782086 A JP 7782086A JP 7782086 A JP7782086 A JP 7782086A JP S62234301 A JPS62234301 A JP S62234301A
Authority
JP
Japan
Prior art keywords
substrate
roughened
circuit board
plating
resistance circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7782086A
Other languages
Japanese (ja)
Inventor
一泰 皆川
▲つる▼ 義之
岡村 寿郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP7782086A priority Critical patent/JPS62234301A/en
Publication of JPS62234301A publication Critical patent/JPS62234301A/en
Pending legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はPtsめっき法によりセラミック泰板上に抵抗
回路を形成する抵抗回路基板の製造法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a resistor circuit board in which a resistor circuit is formed on a ceramic plate by Pts plating.

(従来の技術) 無1!績めつきにより絶縁基板上に直接抵抗体?少ない
工程でMJ密度に実装する方法が提案されている。
(Conventional technology) No 1! Resistor directly on insulating substrate by plating? A method of mounting MJ density with fewer steps has been proposed.

(発明が解決しようとする問題点ン 無電解法によって絶縁基板上に直接抵抗体を形成する方
法は,大量学績,高密度化に通しているが,+1!抵抗
が得られない、密層強度が弱いという問題がある。本発
明は高抵抗で密着強度に優れる抵抗回路基板の製造法ン
促供するものである。
(Problems to be solved by the invention) Although the method of forming a resistor directly on an insulating substrate by an electroless method has led to mass production and high density, +1! There is a problem that the strength is weak.The present invention provides a method for manufacturing a resistive circuit board that has high resistance and excellent adhesion strength.

(問題点を解決するための手段ノ アルミナセラミック基板を例えば480へ490℃の溶
融アルカリ中に20分間浸槓することにより,ガラス質
だけでなく個々のアルミナ粒子を粗化し、表面積を粗化
前の基板の5へ20倍に増加させる。
(A means to solve the problem is to roughen not only the glass but also the individual alumina particles by immersing the alumina ceramic substrate in molten alkali at 480°C to 490°C for 20 minutes to increase the surface area before roughening.) of the substrate by a factor of 20 to 5.

第1図(alはアルミナ基板の粗化前の断面形状を示し
、1はアルミナ粒子、2はガラス質、3は粗化アルミナ
粒子であり、第1u(brは粗化後の断面形状ン示す。
Figure 1 (al indicates the cross-sectional shape of the alumina substrate before roughening, 1 is the alumina particle, 2 is glassy, 3 is the roughened alumina particle, 1u (br is the cross-sectional shape after roughening) .

この表面形状によつてめっき皮膜の密着力を強化させ、
また無電解めっきY(115〜(15,canの範囲で
行なえば、粗化なし基板に比べてシート抵抗値71.5
〜3倍増加させることができる。
This surface shape strengthens the adhesion of the plating film,
In addition, if electroless plating is performed in the range of Y (115 to (15, can), the sheet resistance value will be 71.5 compared to a substrate without roughening.
It can be increased by ~3 times.

膜厚は重量法で曲[定した値である。The film thickness is a value determined by the gravimetric method.

第2図は、めっき抵抗体の(a)平面図、(b)抵抗め
っき部の断面、(C)電極形成部分の形状乞模式的に示
したもので、4は粗化基板、5は抵抗めっき、6は銅め
っきKよる電極である。
Figure 2 schematically shows (a) a plan view of a plated resistor, (b) a cross section of a resistor plating part, and (C) the shape of an electrode forming part, where 4 is a roughened substrate, and 5 is a resistor. Plating 6 is an electrode made of copper plating K.

(作用) 粗化された表面は被雑な表面形状ンもち、めっき皮膜は
投錨効果によって強固な@着力χ得る。また粗化基板上
のめつき皮膜はある膜厚範囲においては基板形状に沿っ
て析出しているので、抵抗体の長さ方向の笑効長さはみ
かけよりも長(なる。このため、粗化前基板の場合より
も抵抗が大きくなる。
(Function) The roughened surface has a rough surface shape, and the plating film has a strong adhesion force due to the anchoring effect. In addition, the plating film on the roughened substrate is deposited along the substrate shape within a certain film thickness range, so the effective length of the resistor in the length direction is longer than it appears. The resistance is higher than that of the unprocessed substrate.

(実施例) アルカリ粗化したアルミナセラミック基板を脱脂、感受
性化、活性化の各処理を施した後。
(Example) After degreasing, sensitizing, and activating an alkali-roughened alumina ceramic substrate.

#、′に解ニッケルめっき浴中に浸漬することによりて
、めっき皮膜を形成する。
A plating film is formed by immersing # and ' in a decomposed nickel plating bath.

無電解ニッケルめっき浴の組成は次の通りである。The composition of the electroless nickel plating bath is as follows.

塩化ニッケル     30 g/1 次亜リンリントリウム 10 g/l 酢酸ナトリウム    10 g/1 F4−1       5 (HCJで調整)浴温  
 4の、6庇、8■ 以上の条件でめっきし1こ場合、40℃では2分から3
0分、60℃では1分から5分、80℃では30秒から
1分の間のめっき時間で0.15μmからα5μmの膜
厚のめ1き皮膜が得られ、シート抵抗値としては約10
S200Ω/が得られた。膜厚は重量法で測定。
Nickel chloride 30 g/1 Hypophosphorous thorium 10 g/l Sodium acetate 10 g/1 F4-1 5 (adjusted with HCJ) Bath temperature
4, 6 eaves, 8■ If plating is performed under the above conditions, at 40℃ it will take 2 to 3 minutes.
A plating film with a thickness of 0.15 μm to α5 μm can be obtained with a plating time of 0 minutes, 1 minute to 5 minutes at 60°C, and 30 seconds to 1 minute at 80°C, and the sheet resistance value is approximately 10
S200Ω/ was obtained. Film thickness is measured gravimetrically.

同様の条件で粗化前アルミナセラミックス基板にめっき
した場合、Q15−μmから05μmの膜厚のめっき皮
膜では約5へ20Ω/しか得られなかった。こ八は粗化
基板上に形成した場合の1/!〜1/foである。
When a pre-roughened alumina ceramic substrate was plated under similar conditions, a plating film with a thickness of Q15-05 μm only had a resistance of about 5 to 20 Ω/. This is 1/1 of that when formed on a roughened substrate! ~1/fo.

(発明の効果) 本方法によnは、絶縁2!l!板上に直媛密看力の強い
皮Paを形成でき、また、皮膜を工(115μmから[
1,5μmの膜厚範囲で粗化なしJk数上に形成し′r
−場合の2倍から10倍のシート抵抗が得られる。
(Effect of the invention) According to this method, the insulation is 2! l! It is possible to form a skin Pa with strong direct adhesive force on the board, and it is also possible to form a film (from 115 μm to [
Formed on the Jk number without roughening in the film thickness range of 1.5μm
- A sheet resistance that is 2 to 10 times that of the - case can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(at (blはアルミナ奉板の断面図、第2図
【工抵抗回路基叛ン示すもので、(a)は平面図s (
b九(clは断面図である。 符号の説明 1 アルミナ粒子   2 ガラス質 6 粗化アルミナ粒子  4 粗化基板5 抵抗めっき
     6 銅めっきによるi&、他代理人升埋士 
MRfI!A   軍τ−:(α)N化前      
  (b)粗化後筒2図         51氏抗力
・き6、銅鶴きl;よる電極 =
Figure 1 (at) is a cross-sectional view of the alumina plate, Figure 2 (a) is a plan view of the resistor circuit board, and (a) is a plan view of the alumina plate.
b9 (cl is a cross-sectional view. Explanation of symbols 1 Alumina particles 2 Glassy 6 Roughened alumina particles 4 Roughened substrate 5 Resistance plating 6 I & other agents by copper plating
MRfI! A Army τ-: (α) Before N conversion
(b) Figure 2 of the cylinder after roughening 51 drag force 6, copper crane l; electrode =

Claims (1)

【特許請求の範囲】 1、粗化したセラミック基板に、重量法で測定した膜厚
において0.15μmから0.5μmの範囲に抵抗導体
回路を無電解めっきにより形成することを特徴とする抵
抗回路基板の製造法。 2、セラミック基板が、溶融したアルカリによって粗化
処理されたアルミナセラミック基板である特許請求範囲
第1項記載の抵抗回路基板の製造法。 3、粗化基板の表面積が粗化前に比べて5倍から20倍
になっていることを特徴とする特許請求第1項又は第2
項記載の抵抗回路基板の製造法。
[Claims] 1. A resistance circuit characterized in that a resistance conductor circuit is formed on a roughened ceramic substrate by electroless plating to have a film thickness in the range of 0.15 μm to 0.5 μm as measured by gravimetric method. Substrate manufacturing method. 2. The method for manufacturing a resistance circuit board according to claim 1, wherein the ceramic substrate is an alumina ceramic substrate roughened with molten alkali. 3. Patent claim 1 or 2, characterized in that the surface area of the roughened substrate is 5 to 20 times larger than that before roughening.
2. Method for manufacturing a resistor circuit board as described in Section 1.
JP7782086A 1986-04-04 1986-04-04 Manufacture of resistance circuit board Pending JPS62234301A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7782086A JPS62234301A (en) 1986-04-04 1986-04-04 Manufacture of resistance circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7782086A JPS62234301A (en) 1986-04-04 1986-04-04 Manufacture of resistance circuit board

Publications (1)

Publication Number Publication Date
JPS62234301A true JPS62234301A (en) 1987-10-14

Family

ID=13644671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7782086A Pending JPS62234301A (en) 1986-04-04 1986-04-04 Manufacture of resistance circuit board

Country Status (1)

Country Link
JP (1) JPS62234301A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235291A (en) * 1988-03-15 1989-09-20 Matsushita Electric Works Ltd Manufacture of ceramic circuit board with resistor
JPWO2005002303A1 (en) * 2003-06-30 2006-11-24 イビデン株式会社 Printed wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01235291A (en) * 1988-03-15 1989-09-20 Matsushita Electric Works Ltd Manufacture of ceramic circuit board with resistor
JPWO2005002303A1 (en) * 2003-06-30 2006-11-24 イビデン株式会社 Printed wiring board
JP4606329B2 (en) * 2003-06-30 2011-01-05 イビデン株式会社 Printed wiring board

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