JPS6223284A - 水平同期回路 - Google Patents

水平同期回路

Info

Publication number
JPS6223284A
JPS6223284A JP60163373A JP16337385A JPS6223284A JP S6223284 A JPS6223284 A JP S6223284A JP 60163373 A JP60163373 A JP 60163373A JP 16337385 A JP16337385 A JP 16337385A JP S6223284 A JPS6223284 A JP S6223284A
Authority
JP
Japan
Prior art keywords
frequency
circuit
voltage
signal
deflection output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60163373A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0583027B2 (enrdf_load_stackoverflow
Inventor
Masaharu Iwashita
岩下　方治
Tetsuro Kawamoto
哲朗 河本
Kazutoshi Segawa
瀬川　和利
Sohei Yamamura
山村　宗平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60163373A priority Critical patent/JPS6223284A/ja
Publication of JPS6223284A publication Critical patent/JPS6223284A/ja
Publication of JPH0583027B2 publication Critical patent/JPH0583027B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)
  • Controls And Circuits For Display Device (AREA)
JP60163373A 1985-07-23 1985-07-23 水平同期回路 Granted JPS6223284A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60163373A JPS6223284A (ja) 1985-07-23 1985-07-23 水平同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60163373A JPS6223284A (ja) 1985-07-23 1985-07-23 水平同期回路

Publications (2)

Publication Number Publication Date
JPS6223284A true JPS6223284A (ja) 1987-01-31
JPH0583027B2 JPH0583027B2 (enrdf_load_stackoverflow) 1993-11-24

Family

ID=15772645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60163373A Granted JPS6223284A (ja) 1985-07-23 1985-07-23 水平同期回路

Country Status (1)

Country Link
JP (1) JPS6223284A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346073A (ja) * 1986-08-13 1988-02-26 Nec Corp 位相同期発振回路
JPH0294927A (ja) * 1988-09-30 1990-04-05 Sony Corp 自動周波数制御回路
US5596372A (en) * 1992-03-02 1997-01-21 Eeg Enterprises, Inc. Video signal data and composite synchronization extraction circuit for on-screen display

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6346073A (ja) * 1986-08-13 1988-02-26 Nec Corp 位相同期発振回路
JPH0294927A (ja) * 1988-09-30 1990-04-05 Sony Corp 自動周波数制御回路
US5596372A (en) * 1992-03-02 1997-01-21 Eeg Enterprises, Inc. Video signal data and composite synchronization extraction circuit for on-screen display
US5760844A (en) * 1992-03-02 1998-06-02 Eeg Enterprises, Inc. Video signal data and composite synchronization extraction circuit for on-screen display

Also Published As

Publication number Publication date
JPH0583027B2 (enrdf_load_stackoverflow) 1993-11-24

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term