JPS62232707A - Erasing device - Google Patents

Abstract

PURPOSE:To reduce the time required for an erasing operation, by impressing an erasing signal simultaneously on the plural heads in an in-line head which perform a recording and a reproduction, and performing an erasing. CONSTITUTION:In-line type heads 3-1 and 3-2 are provided, and a recording and a reproduction in a field mode, and a frame mode, are performed. Especially, when the erasing for all of the tracks are performed, a frame erasing is performed by erasing simultaneously erasing currents on the heads 3-1 and 3-2. In this way, the time required for the erasing can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an erasing device for erasing information recorded on a recording medium.

<Prior Art> Recording and reproducing apparatuses for recording and reproducing, for example, still image information on recording media such as magnetic disks have been developed in recent years.

As such a device, a device that uses a recording/reproducing head to record, reproduce, and erase one track at a time is considered.

<Problems to be solved by the invention> Using a conventional recording/reproducing head, recording one track at a time,
In a recording/playback machine that has the function of playing and erasing,
Since the unit of erasing is one track, when erasing a plurality of tracks, the time required for erasing is long and the operability is not necessarily good.

The present invention aims to solve such problems.

Means for Solving the Problems> In order to achieve the above-mentioned object, the present invention is an apparatus that performs recording or reproduction using an in-line head having a plurality of heads, and applies an erasing signal to the plurality of heads simultaneously. ,
It is characterized by erasing.

<Operation> In the above configuration, an erasing signal is simultaneously applied to a plurality of heads included in the in-line head, and a plurality of tracks are simultaneously erased.

<Example> The present invention will be described in detail below with reference to the drawings. In the example of the present invention described below, a still image video signal is recorded on a disk-shaped recording medium, specifically, a disk-shaped magnetic sheet. A recording and reproducing apparatus that records or reproduces a recorded still image video signal will be described.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In FIG. 1, l is a magnetic sheet on which the recording/reproducing track of the video signal, the track pitch, and the track position are determined in advance. In the case of a frame video signal, one field of video signal is recorded on each of two adjacent tracks to form a frame video signal. The magnetic sheet 1 is placed in a jacket (not shown) in advance, and the jacket is provided with a claw to prevent accidental erasure. 2.
is the DCC morph 3 for rotating the magnetic sheet l at a constant speed.
-1.3-2 is an inline type head that accesses two adjacent tracks, 3-1 accesses the outer circumferential side, and 3-2 accesses the inner circumferential side. 4 is a magnetic head 3-1.3-2
A magnetic head moving mechanism 5 moves the magnetic head 3-1 so as to access the track formed on the magnetic sheet l, and a magnetic head moving mechanism 5 moves the magnetic head 3-1 by the magnetic head moving mechanism 4 to access the innermost track on the magnetic sheet l. The state switches from off to on, and the microcomputer (hereinafter CP
(referred to as U) 40 is an innermost detection switch that outputs an L level signal, 6 is a reproducing amplifier for amplifying the signal detected by the magnetic head 3-1.3-2, and 7 is a signal from the reproducing amplifier 6. Level detector for detecting the average value of the output signal, 8
is a comparator that detects whether the output of the level detector 7 is higher than a threshold value set by a reference voltage source (not shown);
9 is a demodulation circuit that demodulates the output signal of the reproduction amplifier 6; 10
11 is a 1/2H delay circuit that delays the output of the demodulation circuit 9 by 1/2 horizontal scanning period (hereinafter referred to as 1/2H), and 11 is a synchronization circuit for synchronizing the horizontal synchronization signal Hsync, vertical synchronization signal Vsync, etc. from the output of the demodulation circuit 9. 12 is a data demodulator that detects a predetermined data signal from the output of the reproduction amplifier 6 and demodulates the data signal according to the timing of the sync signal separated from the sync signal separation circuit 11; be. The data signal is a signal for determining what kind of information is recorded on the track, for example, whether it is a field video signal or a frame video signal, and a year/month/year signal set by the user. , is a signal indicating an 11-digit number freely set by the user, and is recorded in a frequency band lower than that of the video signal at a position having a predetermined relationship with the part where the synchronization signal of the track is recorded. The reason why the demodulation circuit 9 and the data demodulation circuit 12 are provided separately here is as follows. In other words, the video signal recorded on the magnetic sheet l is FM modulated, but the data signals other than the video signal are FM modulated.
P S K modulation method (D6fferatialP h
a sc sh r t K e y i
n g ) is taken. Therefore, the demodulation circuit 9 described above is an FM demodulation circuit, and the data demodulation circuit 12 is a D P
This is an SK demodulation circuit.

Reference numeral 13 denotes a monitor for reproducing and observing video signals, and reference numeral 13' denotes a printer connected to print the video signals. Note that the printer +3' starts operating when the signal at the start signal input terminal becomes 1■ level, and during operation, the busy signal output terminal is set to L level. In contrast to the data demodulator 12, 14 is a modulator that performs DPSK modulation on data output from a CPU 40, which will be described later, and is used to perform DPSK modulation on data output from a CPU 40, which will be described later. sy n , V s
The modulated data is output to the recording amplifier 16 at a timing corresponding to y n c.

15 is F for the video signal input from the video signal input terminal 18.
This is a recording amplifier that performs processing necessary for recording such as M modulation and outputs it to the recording amplifier 16. Reference numeral 19 denotes a reference signal generator, which generates accurate reference pulses (60 Hz) for rotating the magnetic sheet 1 and an alternating signal for erasing.

Reference numeral 20 denotes a magnetic piece provided on the above-mentioned magnetic sheet l, and the reference signal generator 19 generates a signal (J: 'I') using a signal from the magnetic piece 20 as described later.
'L? The rotation control of l) C motor 2 is performed in synchronization with the bow. 1, 21 is for detecting the signal from the magnetic piece 20 when the magnetic sheet l is rotated by the DC motor 2.
It is a G coil.

22 is a waveform shaping circuit that shapes the waveform of the signal output from the IIG coil 21, and the output of the waveform shaping circuit 22 is manually input to a CPU 40 and a motor control circuit 23, which will be described later.

2: Blind [111] A control circuit that controls the rotation of the DC motor 2, and which outputs Vsy from the synchronization signal separation circuit 17.
The phase relationship between the output signal of the NC or reference signal generator 19 and the output of the waveform shaping circuit 22, that is, the signal from the magnetic piece provided on the magnetic sheet I, is a predetermined relationship, for example, the phase of both is always constant. The rotation of the I)C motor 2 is controlled so that the I) C motor 2 is shifted by 711. Here, magnetic head 3-1.3
-2, when a recording operation is performed, SWl is switched in advance to the synchronization signal separation circuit 17 side, and Vsync and the signal input from the waveform shaping circuit 22, that is, the magnetic piece provided on the magnetic sheet I-L. The rotation of the I)C motor 2 is controlled based on the signal from the magnetic head: 1-
1, 3-2, when the playback operation is performed, the SWI returns to C! The reference signal from base 1 (14 signal generation 1:, i, 9 and
The signal input from the waveform shaping circuit 22, that is, the magnetic sheet!
D based on the signal from the magnetic piece 2o provided above
The rotation of the C motor 2 is controlled.

Reference numeral 23' denotes a driver that drives a step motor 24 for controlling the position of the head 3-1, 3-2 based on a signal from the C I) U 40, which will be described later. head 3- through
1. Move 3-2.

25' is a display circuit driven by a signal from the CPU 40, and as a display element, as shown in FIG. 1.3-2 7-segment display element to display the feed speed, 2 digits, I) B, LED to indicate the playback mode, Rt: c, I, ED to indicate the recording mode. Displays the frame mode; RAME, LEI) Displays the field mode.

26 is R where the program of CI'''U/10 is stored.
OM.

27 is a RAM in which data of CI) U 40 is temporarily stored. 28 is a timer driven by the CPU 40, and 29 is a crystal oscillation "AR" that generates a reference clock for CI) U 40. Furthermore, 80 is a detection switch for detecting whether or not the magnetic sheet l is inserted. A detection circuit connected to the constituent photocouplers 81 and 82.

83, 84 and SW6 are circuits for displaying data signals (hereinafter referred to as ports) such as signals such as January 9, 2018, signals freely set by the user, etc. on the monitor 13 and printer 13-. Reference numeral 83 denotes a synchronization separation circuit that separates Vsync and Hsync of the video signal input through SW5 for adjusting the timing of data characters to be generated, and has the same configuration as the synchronization separation circuit shown as 17. . 84 is Vsy separated by the synchronization separation circuit 83.
This is a character generator for generating characters corresponding to data signals in synchronization with nc and Hsync. When displaying the rD185) superimposed on the video signal on the monitor 13 and printer 13, CPU 40 gives control number 15, SW6 is turned on, and the synchronization signal and data signal are added as indicated by ■ in Figure 1. Added on the monitor 13 or printer! 3' is displayed at a specific position. The details will be described later.

85 is an erasing signal generator for erasing signals on arbitrary tracks of the magnetic sheet 1. The AC signal for erasing is a reference signal generator! Given from 9.

Here, the erasing signal generator 85 generates an attenuation signal formed by a constant amplitude period 1 and a subsequent attenuation period T2 as shown in FIG.
connected to.

SWI is a switch whose state is changed by a signal from the control circuit 30 that is driven based on a signal from the CPU 40, and a video signal is input from the video signal input terminal I8, and if from the synchronization signal separation circuit 17. syn
When c is output and a signal indicating that CI) U is in the recording mode is input, connect the synchronizing signal separation circuit 17 and the motor control circuit 23,
If IJ synchronization is not output from the synchronization signal separation circuit 17, or if a signal indicating the reproduction mode is input from CI) U/I O, or if the reference signal generator 19 and the motor are in the erase mode, Control circuit 23
Connect with.

SW2 is a switch whose state is changed based on a signal from the CPU 40, and is connected to the state where the head 3-1 is connected to the recording amplifier 16, the state where it is connected to the playback amplifier 6, and whether the head 3-1 is connected to the recording amplifier 16 or the playback amplifier 6. Switch between an intermediate state in which no connections are made.

Like SW2, SW3 is a switch whose state changes based on a signal from the CPU 40, and there are two states: connecting the head 3-2 to the recording amplifier 16, connecting the head 3-2 to the reproducing amplifier 6, and connecting the head 3-2 to the recording amplifier 16 and the reproducing amplifier. 6 and an intermediate state in which it is not connected to any of

When reproducing a video signal from the magnetic sheet 1, the SW4 is switched to the upper position in FIG. When the head 3-1 is connected and a field video signal is reproduced using only the head 3-1, the demodulation circuit 9 is switched to the upper side and the lower side in FIG.
This switch is driven by the CPU 110 so that the state connected to the 1/2H delay circuit and the state connected to the 1/2H delay circuit are alternately switched for each field.

SW5 connects the monitor 13 to the video signal input terminal 18 during recording.
This is a switch driven by the CPU 40 to connect the monitor 13 to SW4 during playback.

Record on a magnetic sheet l or the sheet! As mentioned above, the video signal reproduced from SW2. SW3. Switching of the states of SW4 and SW5 will be explained using FIG. 2.

Figure 2 shows SW2. SW3. SW4. It is a figure which shows the combination of the switching state of SW5.

During field playback, SW2 connects the head 3-1 to the playback amplifier 6, and switches SW3 to an intermediate state, that is, head 3-1.
-2 is not connected to either the reproduction amplifier 6 or the recording amplifier I6, and SW4 is set to the return XIJ circuit 9 in the odd field.
It outputs a signal directly from to the monitor 13, and in even fields it outputs a signal to the monitor 13 via the 1/2 If delay circuit 10, so that it switches alternately for each field.
Prevents the occurrence of skew distortion.

Next, in frame reproduction, SW2 connects the head 3-1 to the reproduction amplifier 6 in odd fields, and is in an intermediate state in even fields, SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the reproduction amplifier 6 in even fields. Connect to. Therefore, during frame reproduction, signals from either head 3-1 or 3-2 are alternately output to the reproduction amplifier 6 for each field.

In this case, SW4 is switched to the upper side in FIG. 1, and the signal from demodulation circuit 9 is directly output to monitor 13.

In any of the above-described field reproduction and frame reproduction states, SW5 is driven so that the monitor 13 is connected to SW4.

Next, in field recording, SW2 connects the head to the recording medium 16, and SW3 is in an intermediate state.

Therefore, during field recording, recording is performed by the head 3-1.

In frame recording, SW2 connects the head 3-1 to the recording amplifier 16 in odd fields and is in an intermediate state in even fields; SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the recording amplifier I6 in even fields. Connecting. In frame recording, the combination of heads 3-1 and 3-2 can also be reversed.

Further, in both field recording and frame recording, during recording, the SW 5 is switched so that the monitor 13 is connected to the video signal input terminal 18 so that the video signal to be recorded can be observed on the monitor 13. In addition, if this occurs, SW
4 may be in any state.

Next, the erase mode will be explained. In the erase standby state, which will be described later, SWI is on the reference signal generator side, SW
5 is connected to the - side in FIG. 1, that is, it is in exactly the same state as the playback mode. At this time, a case will be described in which field erasing is performed, for example, erasing only the track being reproduced by the magnetic head 3-1. In this case, at the same time as erasing starts, a control signal is sent from the CPU 40 so that SW 2 is placed on the recording amplifier side and SW 3 is placed in an intermediate state.
Further, an erase signal trigger pulse is sent from the CPU 40 to the erase signal generator 85, so that the erase signal is sent only to the head 3-1.

Next, a description will be given of frame erasing in which tracks being accessed by heads 3-1 and 3-2 are simultaneously erased. When erasing a frame, an erasing signal is sent to the heads 3-1 and 3-2 at the same time, so the CPU 40 sends a control signal so that SW2 and SW3 are both on the recording amplifier side. and cp
A trigger pulse from u40 generates an erase signal, which flows to both heads via the recording amplifier.

Furthermore, in this embodiment, when field erasing is performed, the erasure is performed by head 3-1, but when field erasing is performed using head 3-2, SW2 is in the intermediate state, and SW2 is in the intermediate state.
It is only necessary to control W3 so that it is on the recording amplifier side.

Next, the switches 51 to 78 shown in FIG. 1 will be explained.

In giving this explanation, the external appearance of the apparatus of this embodiment shown in FIGS. 3 and 4 will also be explained.

FIG. 3 is a front view of the apparatus of this embodiment, and FIG. 4 is a front view of a remote control device used in the apparatus of this embodiment.

The switches 51 to 79 and 72 shown in FIG. 1 are the switch group provided in the device row shown in FIG. 3, the switch group provided in the remote control device shown in FIG. The switches are divided into groups of switches provided in both the illustrated device and the remote control device shown in FIG. 4, and switches having the same functions are given the same reference numerals in FIGS. 1 to 4. Note that the switch provided in the device shown in FIG. 3, which in FIG. 1 is only provided in the remote control device shown in FIG. 4, is connected to C1 via the line.
1U 40 is shown for convenience, but the signal generated by operating the switch provided only in the remote control device shown in FIG. is converted into infrared light by the remote control light receiving section 4 provided in the device shown in FIG.
5 to the CI'U 40 of such a device.

It should be noted that the method of arranging the switches 51 to 79 can be considered in various other variations of this embodiment, and is not limited to this embodiment.

In FIGS. 1 to 4, 41 is a power switch, 42
is a slot for inserting the magnetic sheet l, and the magnetic sheet is inserted into the slot 42! If the inject button 43 is turned on while the magnetic sheet l is inserted, it will automatically open and release the magnetic sheet l.
is injected. 43 is the above-mentioned inject button, 44Δ, 44B are each mentioned above! ) Mouth, LED, REC
, I, ED, 45 is a remote control light receiving unit that receives signals from the remote control device shown in FIG. 4, 46 is an interval mode display 1.1CD that lights up when interval playback is executed, and 48 is a field playback or recording unit. , a display LED for displaying whether frame playback or recording is set, and 25 is the aforementioned two-digit 7-segment LED.

50A, 5013, and 50C are LEDs that display the operating states of a program playback setting switch 58, an interval time setting switch 57, and a program track setting switch 62, which will be described later, respectively.

51 is a REC mode switch for setting the recording mode and checking whether the track accessed by the head in the recording mode is recorded or unrecorded; when the switch is turned on, the track accessed by the head is (If the track accessed by head 3-1 is already recorded during field recording, which track is accessed by head l-1 or head 3-2 during frame recording) RE if the file has been recorded)
C and LED blink, indicating that the track being accessed by the head cannot be accessed in Section 8.1 and has not been recorded, and the control circuit 30 determines that the video signal cannot be input manually. in case RE C, 1, E I)
lights up, indicating that recording is possible.

52 is a REC that determines the timing to perform the recording operation.
This is a case where the recording mode is set by the RICC mode setting switch 51, and when the switch 51 is turned on, recording is performed on the magnetic sheet l.

If continuous recording has been set in advance using a track feed speed setting switch 56, which will be described later, the head 3-1.3- is automatically set while the switch 51 is on.
Continuous recording is performed while the number 2 is shifted.

Reference numeral 53 denotes a P mode setting switch for setting the playback mode, and when the switch 53 is turned on, I) B, L l": I) indicating the playback mode is lit.

54 is a track U l) switch, and the switch 5
By operating 11, the driver 23' is controlled and the step motor 24 is rotated, and the head il and 3-2 are moved by the head moving mechanism 4, thereby moving the head 3.
-1.3-2 is shifted to change the track accessed by the head toward the inner circumference. Further, when recording is performed in frames using a field/frame setting switch 59, which will be described later, the recording progresses two tracks at a time. When +1 raw is set, when the track Ul) switch 54 is turned on, the heads 3-1, 3-2 are shifted by two tracks,
The 7-segment LED 25 also displays a track number shifted by 2 tracks instead of a track number shifted by 1 track, and when field recording or playback is set, when the track UP switch 54 is turned on, the head 3-1.3-2 is shifted toward the inner circumference by l tracks, and the 7-segment LED 25
The shift number shifted one track at a time is also displayed.

In addition, when the recording mode is set and the track UP switch 54 is operated, the head 3-1°3-2
REC if the track accessed by the head 3-1.3-2 has already been recorded when the head 3-1.3-2 is shifted.

RED44B performs a blinking display. 55 is truck U I
) Track D for changing the access of the head 3-1, 3-2 toward the outer circumference, contrary to the switch 54.
It is an OWN switch.

If the switch 55 is also set to frame playback like the track UP switch 54, the switch 55
When operating the track 1 and the track 2 on the outer periphery of the track
If the tracks on the outer periphery are frame recorded, the track numbers shifted by two tracks will be displayed instead of the track numbers shifted by one track on the 7-segment LED 25, and if field recording or playback is set. When the switch 55 is operated, the track number shifted by l track is displayed.

Also, in the case where the recording mode has been set in advance as described above with respect to the track UP switch 54, and when the head 3-1.3-2 is shifted by operating the track DOWN switch 55, REC if the track has already been recorded.

The LED 44B performs a blinking display.

56, when recording and reproducing, it automatically switches whether to perform such operations continuously or sporadically while shifting the head, and also determines how many times per second the operations are performed when performing them continuously. This is a track feed speed setting switch for setting the track feed speed shown in FIG.

When the switch 56 is pressed once and turned on, the track feed speed is displayed instead of the track number on the 7-segment LED 25, and in this state, the track feed speed setting switch 56 is turned on again within the predetermined time clocked by the timer 28 shown in FIG. is turned on, each time the switch 56 is turned on, the 7-segment LED 2
For example, "5" indicates continuous recording or playback of 2 screens per second, "5" indicates continuous recording or playback of 5 screens per second, or continuous recording or playback of 10 screens per second. "ID" indicating that playback is to be performed, and "8" indicating that recording or playback is to be performed one-off, are cyclically displayed. Also, by turning on and then turning off the switch 56, the track feed speed is displayed instead of the track number on the 7-segment LED 25, and when the timer 28 completes the measurement of the predetermined time without turning on the switch 56 again. ED25 changes from displaying the track feed speed to displaying the normal track number.

Further, when the track feed speed is changed by the switch 56, if frame video recording is set in advance by the field/frame setting switch 59 and the REC mode setting switch 51, l0i per second is set.
i! Continuous recording on side II is not set.

57 is an interval time setting switch. That is, the interval time setting switch is used to set the interval time for track forwarding when continuous playback is performed but the playback interval time is relatively long, or when program playback is set by the program track setting switch 58 described later. and
An interval time is set using the ten key switches 63 to 72 within 10 seconds after the switch is turned on.

Note that when any switch other than the IO key switches 62 to 72 is turned on after the interval time setting switch 57 is turned on, the interval time setting is automatically canceled. Reference numeral 58 denotes a program playback setting switch for setting a program playback mode in which the order of playback tracks is programmed in advance and the playback operation is performed continuously at the interval time interval set by the interval time setting switch 57.

To specify the order of playback tracks, first turn on the switch 58 to set the program playback mode, then operate the track UP switch 54 and track DOWN switch 55 to select the head 3-! .

:Change the track being accessed in 3-2, play the video of the desired track, check it on the monitor 13, and turn on the program track setting switch 62, which will be described later, to change the number of the track you are checking on the monitor 13. This is done by memorizing the 59 is the aforementioned field/frame setting switch, and each time the switch is turned on, the field recording or playback mode is changed.
Frame recording or playback mode switches alternately.

Note that if the continuous recording mode of 10 screens per second is set in advance by the REC mode setting switch 51 and the track feed speed setting switch 56, and the frame recording is selected by the field/frame setting switch 59, the track feed will start. The speed is automatically changed to continuous recording mode of 5 screens per second.

That is, compared to field recording, during frame recording the head 3-1.3-2 must be shifted two tracks at a time, so when recording 10 screens per second, 20 tracks per second are required. In other words, when recording a video signal, if m1 is taken into account, the head must be shifted for two tracks in 4/60 seconds, but such a high-speed head shift is difficult, so In the embodiment, continuous recording of frames for 10 screens per second is prohibited.

Reference numeral 60 is a start switch for performing continuous interval playback or program playback. When the start switch is turned on, if interval playback is set, the recorded tracks will be played back sequentially starting from the first track during the interval time. Interval playback is started according to the interval time set by the setting switch 57 and the ten key switches 63 to 72, and when program playback is set, program playback is started. Reference numeral 61 denotes a stop switch for stopping the reproduction operation started by the start switch 60, and when the switch 61 is turned on during program reproduction, the reproduction of the program is stopped while the track being reproduced at the time is being reproduced.

62 is the aforementioned program track setting switch.

Reference numeral 73 is a switch for starting ID setting in the recording mode and for switching whether or not to display the ID contents in the playback mode. That is, by turning on the switch 73 in the recording mode, it becomes the ID setting mode, and by turning on the switch 73 in the playback mode, it is possible to switch between displaying or not displaying the contents of [). . 74, 75.
Reference numerals 76 denote a switch that is turned on when setting the year as the ID when the ID setting mode is entered by the switch 73, a switch that is turned on when setting the month, and a switch that is turned on when setting the day. In FIG. 1, the switches 74, 75, 76 and the aforementioned switches 57, 58, 62 are shown as independent switches, respectively, for convenience, but in this embodiment, the switches 74, 75, 76 and the switches 57, 58, 62 are shown as independent switches, respectively, as shown in the remote control device of FIG. 75 and 76 are also used as switches 58 and 57 and 62, respectively. That is, the switch 57 is used to set the program using the interval time setting switch 58, and the switch 62 is used to set the program track independently of the ID setting of September 9, 2009, so in this embodiment, the switch is also used. This reduces the number of switch members and improves operability and reliability.

In addition, various other combinations can be considered when the switch is also used.

77 is an erase standby switch for temporarily placing the device in an erase standby state when erasing information recorded on the magnetic sheet l; 78 is for executing an erase operation in the erase standby state set by the erase standby switch 77; This is the erase switch. Reference numeral 79 is an all-track erase standby switch that sets a mode for erasing all tracks.

When erasing the information recorded on the sheet I, the switch 77 is first turned on to set an erasing standby state. Since the playback mode is automatically set in the blank state, it is possible to check the video recorded on the track to be erased on the monitor 13 or printer 13- before erasing. I can do it.

Furthermore, by operating the IO key switches 63 to 72 in the standby state, the number of tracks to be successively erased can be designated. Next, by turning on the erase switch 78, at least one of the heads 3-1 and 3-2 is connected to the recording amplifier 716, and the information recorded on the track is erased by the erase signal shown in FIG. 32 generated from the erase signal generator 85. will be deleted. Further, by turning on the all-track erase standby switch 79 and then turning on the erase switch 78, all tracks are automatically erased.

Next, the operation of the embodiment of the present invention will be explained using flowcharts shown in FIGS. 5 to 20, 23, and 25 to 27.

First, when the power switch 41 shown in FIG. 3 is pushed in, the power of the device shown in FIG. 1 is turned on, power is supplied to each part of the circuit, and operation is started.

#l: Then, in FIG. 5, the register S described later becomes “0”.
", the PB mode flag is set, the track feed speed is initially set to 2 screens per second, and the interval time is set to 3 seconds. Therefore, when the power is turned on, continuous playback mode is automatically set in advance. Ru.

#2: Detect whether a jacket having a magnetic sheet 1 is pushed in or not. When the jacket is pushed in, the flow branches to #3, and when it is not pushed in, the flow skips #3 and branches to #4.

#3: When the jacket having the magnetic sheet 1 is being pushed in in #2, the DC motor 3 is driven.

#4: Detect whether the head 3-1 is accessing the 50th track by detecting whether the switch 5 shown in FIG. When the head 3-1 is not accessing the 50th track, the flow branches to #5, and the step motor 24 shown in FIG. 1 is driven. Then, the loop of #4 and #5 is repeated so that the head 3-1 accesses the 50th track.

#6: When the head 3-11 accesses the 50th track, the flow reaches this step, and in this step, the register N for accessing the memory (RAM27) is set to 50.

#7: In this step, it is detected whether the DC motor 2 is being driven. When the jacket having the aforementioned magnetic sheet 1 is inserted, the DC motor 2 is being driven by executing #3, so the flow advances to step #8 and the field flag is set. When the jacket is not inserted, the flow proceeds without passing through #3, so the DC motor 2 is not driven. Therefore, the flow returns to #2 to detect whether a jacket is inserted or not.

#8: When the DC motor 4 is being driven in #7, a field flag is set. Therefore, the LED 44A indicating the field mode shown in FIG. 3 lights up, and a display indicating the field mode is performed. That is, in this embodiment, when the power is turned on and the jacket is inserted, the field mode is automatically set.

#9: Detect the output of the level detection circuit 7 shown in FIG. 1 to determine whether the track being accessed by the head 3-1 is a recorded track or not.

Here, since the track that the head 3-1 is accessing has already been recorded, when the output of the level detection circuit 7 becomes H level, the flow advances to #lO, and the output of the level detection circuit 7 becomes L level. The flow is #! Proceed to step 6.

Here, #16 will be explained first.

#16: Set "0000" to address N in memory. Here, 'oooo' indicates that the track corresponding to the memory address is unrecorded.

Next, the flow from #IO onwards will be explained.

@10: In #9, when the output of the level detection circuit 7 is at H level, the signal recorded on the track is reproduced,
The ID signal is taken in from the data demodulator 12.

#! ! =Detecting the contents of the ID signal and determining whether the video signal recorded on the track is a field video signal or a frame video signal. If it is a field video signal, the flow advances to #15, and if it is a frame video signal, the flow advances to #12.

#12: In this step, it is determined whether the video signal of the track that the head 3-1 is accessing is an inner track or an outer track of the frame video signal. If it is the inside track, the flow advances to #14. If it is an outside track, the flow advances to #13.

#13: If the video signal of the track that the head 3-1 is accessing is a track outside the frame video signal, set the memory address N to "0011". Note #l
When proceeding to this step for the first time, N is set to 50 in #6.

#14: In the case of a frame video transmission video inner track, set the memory address N to "0010".

#17: When the head 3-1 is shifted to the first track and it is detected that N=1, the flow is #2.
If N=1, the flow advances to #18.

#I8: When it is detected in #17 that N=1 is not true, the head 3-1 is shifted to the outer circumferential side by 18577 minutes.

#I9: Head 3 in #I8. When -1 is shifted toward the outer circumference, it is subtracted from N to obtain N.

#20: If N=1 is detected in #17, that is,
When the head 3-1 accesses the first track provided on the outermost periphery and the presence or absence of recording is set in the memory, the data at the N address of the memory, that is, the first address of the memory is read here and is "0011". ”, specifically the first
If the track is the outer track of the two tracks that make up the frame video signal, the flow advances to #21;
If not, the flow advances to #23.

@21: If it is detected in #20 that the first track is a track outside of the tracks constituting the frame video signal, the flow advances to this step. In this step, if the data at the N+1 address of the memory, that is, the second address of the memory, is read and it is "0010", specifically, if the second track is the inner track of the two tracks constituting the frame video signal. for#
Proceed to 22.

#22: When frame video signals are recorded on two tracks, the first track and the second track, the flow moves to this step. Therefore, the field flag set in #8 is cleared and the field mode is changed to frame mode. Therefore, the field frame display LED 48 shown in FIG. 3 lights up to indicate the frame mode.

#23. #24: The register N indicating the address of the memory mentioned above is connected to the 2-digit 7-segment LED shown in Figures 1 and 3.
25.

This display allows the user to recognize the track number that the head 3-1 is accessing.

When this flow ends, the process jumps to the next flow shown in A. The flowchart shown in FIG. 6 will be explained below.

#A-1: Detects whether the REC mode setting switch 51 is turned on, and when the switch 51 is turned on, the flow calls subroutine ■ to set the recording mode, and when it is not turned on, the flow calls #A-1. Proceed to A-2.

#A-2: Detect whether the REC switch 57 is turned on. If the switch 52 is turned on, call subroutine (2); if not, proceed to #A-3.

#A-3: Detect whether the PB mode setting switch 53 is turned on, and when the switch 53 is turned on, call the subroutine ◎, and when it is not turned on, proceed to #A-4.

#A-4:) When the rack UP switch 54 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-5.

#A-5 When the Nidorak DOWN switch 55 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-6.

To #-6=When the track feed speed setting switch 56 is turned on, the flow calls subroutine [F], and when it is not turned on, the flow advances to #A-7.
-#A-7: Interval time setting switch 5
When 7 is turned on, subroutine ◎ is called, and when it is not turned on, the process advances to #A-8.

#A-8 When the nib program setting switch 58 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-9.

#A-9 When the nib program track setting switch 62 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-10.

Go to #-1O: When the field frame setting switch 59 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-11.

#A-II When the start switch 60 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-12.゛#A-12
When the stop switch 61 is not turned on, subroutine [phase] is called; when it is not turned on, #A is called.
Proceed to -13.

#A-13: When the jacket detection switch (corresponding to the detection circuit 80 in Fig. 1) is turned on, jump to subroutine ■, and when it is not turned on, jump to #A-14.
Proceed to.

#A-14 Clear the Niprogram playback mode flag and the program playback execution flag.

#A-15: When any of the 10 key switches 63 to 72 is turned on, subroutine (2) is called, and when it is turned on, the process proceeds to #A-16.

#A-16: When the ID switch 73 is on, call the subroutine ◎, and when it is on, proceed to #-17.

#A-17: When the year setting switch 74 is on, call subroutine ■; when it is on, call #
Proceed to A-18.

#A-18: When the month setting switch 75 is on, subroutine ■ is called, and when it is on, #
Proceed to A-19.

#A-19: When the date setting switch 76 is turned on, subroutine ■ is called, and when it is turned on, #
Proceed to A-20.

#A-20: When the erase standby switch 77 is turned on, subroutine (2) is called, and when it is turned on, the process advances to #A-21.

#A-21: When the all-track erase standby switch 79 is on, subroutine (2) is called, and when it is on, the process advances to #A-13.

As explained above, by executing the flow shown in FIG. 5, head 3-! After accessing the first track of the magnetic sheet, the flow jumps to the flow shown in ■ in Figure 6, and each switch is detected while detecting the status of each switch shown in Figures 1, 3, and 4. The flow shown in (3) is repeatedly executed until the state of the switch changes, and the subroutine corresponding to the operated switch is called.

The subroutine [F] called when the track setting feed speed switch 56 is turned on will now be described with reference to FIG.

FIG. 7 is a flowchart showing a subroutine executed when the switch 56 for changing the track setting feed speed is turned on.

#F-1. #F-2: The set value of the track feed speed is read from the memory, and the set value is set in a track number display buffer (not shown).

Therefore, the two-digit 7-segment LE shown in Figure 3
The track feed speed is displayed on D25. If the flow comes to this step for the first time, the flow rate is 2 per second at #l.
Since the track advance speed on the screen is set, select “2”.
” is displayed.

#F-3 When the NiDrac feed speed setting switch 56 is on, the flow repeats #F-3, and when the switch 56 is turned off, the flow moves to #F-4.

As mentioned above, once the track feed speed setting switch 56 is turned on, the two-digit 7-segment LED 25 shown in FIG. 3 switches from displaying the track number to displaying the track feed speed.
Next, the track feeding speed is changed by turning on the switch 56 again.

#F-3 is provided so that the track feed speed is switched only when the switch 56 is turned on, once turned off, and then turned on again as described above.

#F-4. #F-5. #F-6. #F-7: In these steps, the track feed speed setting switch 56 is turned on, and the two-digit 7 segment ■, ED2 shown in FIG.
If the switch 56 or any other switch is not turned on for a predetermined period of time (2 seconds) after the display in 5 changes from the track number display to the track feed speed display, the track feed speed setting is disabled. This is a step provided to cancel the process.

Predetermined time (2 seconds) after timer l starts counting
When the track feed speed setting switch 56 is turned on during this period, the flow progresses from #F-7 to @F-10, and when timer 1 completes timing, or when another switch is turned on, the flow advances from #F-7 to @F-10. The flow advances from -6 to #F-8.

#F-8: Clear the count value of timer l.

#F-9: Contrary to #F-1, the two-digit 7 shown in Figure 3
The display of the segment LED 25 is returned to displaying the track number.

# F-10: Clear the count value of timer l.

#F-11 The setting value of the NiDrac feed speed is single (once recorded or played back, in field mode! the head is shifted by a track, and in frame mode it is 2
If it is a single, the flow advances to #F-12, and if it is not a single, the flow advances to #F-13.

Note that, as described above, when the flow reaches this step after the power switch 41 is turned on, the track feed speed is previously set at 2 screens per second in #l.

#F-12:l- If the rack feed speed setting value is single, change the setting value to 2 screens per second, return to #F-1, display the changed track feed speed, and return to #F-1 as described above. Execute steps 3 to #F-7.

#F-13 It is detected whether the NiDrac feed speed setting value is 2 screens per second, and if it is 2 screens per second, the flow proceeds to #F-14, and if it is not 2 screens per second, the flow proceeds to #F-15.

9F-14 Change the track feed speed set value to 5 screens per second, return to #F-1, display the changed track feed speed, and execute the above-mentioned steps #F-3 to #F-7.

#F-15: Detect whether the track feed speed setting value is 5 screens per second. If it is 5 screens per second, go to #F-16. If it is not 5 screens per second, that is, 10 screens per second is set. Then the flow advances to #F-17.

#F-16: Determine whether the PB mode flag is set. If the PB mode flag is set, that is, if the playback mode is set, #F-18
If the PI3 mode flag is reset, that is, if the recording mode is set, the flow advances to #F-19.

3F-17,) Change the rack feed speed setting value to single, return to #F-1, display the changed track feed speed, and execute the above-mentioned steps #F-3 to #F-7.

#F-18: In the playback mode, regardless of whether the video signal recorded on the track of the magnetic sheet l is a field video signal or a frame video signal, field playback is performed during continuous track feeding. Therefore, in such a case, change the track feed speed setting value to 10 screens per second and the flow will be #
Return to F-1.

#F-19: Detects whether or not the field flag is set, and if the field flag is set, that is, if track advance is set at 5 screens per second in recording mode and in field mode, #F is detected. The flow branches to -18.

Also, if the field flag is not set, that is, the track feed speed setting value of 5 screens per second is set in recording mode, and in frame mode, #F-17
The flow advances to change the track feed speed setting to single.

Therefore, in the above-mentioned subroutine [F], when the track feed speed setting switch 56 is turned on, the track feed speed is displayed on the two-digit 7-segment LED 25 shown in FIG. 3 for a predetermined period of time (2 seconds). The track advance speed is changed by turning on the switch 56 again within the time.

In addition, the range of changes is single, 2 screens per second, and 5 screens per second when in frame recording mode, and single, 2 screens per second, and 5 screens per second when in other than frame recording mode.
There are 4 types of screens, 10 screens per second.

The scope of this change is head 3-1.3-2 shown in FIG.
This is related to the track shifting ability of the moving mechanism, etc., and is set in advance to an appropriate range depending on the track shifting ability.

Next, using FIG. 8, while executing the subroutine (2) shown in FIG. 6, the track UP switch 54. TRACK DOWN
The subroutines ① and ② that are called when the switch 55 is turned on will be explained. First, a flow called when the track UP switch 54 is turned on will be described.

#I)-l: When the flow reaches this step, it is detected whether the track being accessed by the head 3-1 is the innermost track or not, and whether or not the register number N is 50. Distinguish by this.

As a result, if N is not 50, go to #D-2;
If it is 0, the flow advances to #D-34, which will be described later.

#D-2: Determine whether the P13 mode flag is set. When the PB mode flag is set, that is, in playback mode, #D-8; when the PB mode flag is not set, that is, in recording mode, #D-8
The flow advances to -3.

#D-3+ It is detected whether the N+1 address of the memory is "0000", that is, the N+1th track is unrecorded, and if it is unrecorded, it goes to #D-4; if it is already recorded, it goes to #D-7. The flow branches.

#D-4: The N+1 track was unrecorded #
I) If it is determined in -3, it is determined in this step whether or not the field flag is set, and if it is set, go to #D-6, and if it is not set, go to #D-5. The flow continues.

#D-5: When it is determined in #D-4 that the field flag is not set and the mode is frame mode, this step is reached. In this step, it is detected whether the N+2 content of the memory is "oooo", and if it is "oooo", that is, the N+2 content is detected.
If 2 tracks are unrecorded, go to #D-6, “o
ooo", that is, if the N+2 track has already been recorded, the flow advances to #D-7.

By executing Steplap from #D-3 to #D-5, if both consecutive two tracks are unrecorded in frame mode, the step will be changed to #D-6, and the step number ( If both have already been recorded, #D-
The flow advances to 7.

#D-6: In the field mode, the track that the head 3-1 is accessing; in the frame mode, the track that the head 3-1 is accessing, and the track that is being accessed! If the track being accessed by the head 3-2 on the inner track side is unrecorded, that is, if it is recordable, the flow reaches this step, and the RECLED shown in FIG.
44B lights up.

#D-72 Contrary to #D-6, when the track to be accessed and recorded by head 3-1.3-2 has already been recorded, the RECLED 44B shown in FIG. 3 is blinked ( By flashing), a warning is displayed to make the user aware that recording is not possible.

#D-8: If the I'B-mode flag is set in #D-2, the flow reaches this step and sets the field flag.

For the meaning of this step, #D-9゜#D-1o,
#D=13 will be explained.

#D-9 Memory address N is 10011", that is #13
As explained above, it is detected whether or not the track being accessed by the head 3-1 is the outermost track of the two tracks constituting the frame video signal, and it is determined whether the track is the outermost track of the two tracks. If so, the flow proceeds to #D-10, and if the track is not on the outer circumferential side, the flow proceeds to #D-13.

#D-10: Detects whether address N+1 of the memory is "0010", that is, whether the track being accessed by the head 3-2 is the inner track of the two tracks constituting the frame video signal; If the track is on the inner side of the two tracks, the flow proceeds to #D-11, and if it is not on the outer side, the flow proceeds to #D-13.

That is, if the inner track of the two tracks that make up the frame video signal is erased or a new video signal is recorded after erasing, the track that the head 3-1 is accessing constitutes the frame video signal. Even if it is the outer track of the two tracks, the head 3
It happens that the track being accessed by -2 is not the inner track of the two tracks. Therefore, in this case, when shifting the head 3-1, 3-2 to the inner circumferential side, it is necessary to shift only one track and reproduce the erased or track on which the video signal is newly recorded after the erased.

However, in such a case, if the head 3-1°3-2 is
When only the track is shifted to the inner circumferential side, the head 3
A frame video signal is not necessarily recorded on the track accessed by -1.3-2, and completely different field video signals may be recorded thereon. In this case, if the field flag is reset, a problem arises in that two separate field video signals are reproduced as frame video signals. The above #D-
In this embodiment, by providing 8 steps, when the spatula V is shifted to the inner circumference side, a field flag is set in advance in this step to set the field mode, and even in the above case, a completely different field image is generated. The problem that the signal is reproduced as a frame video signal can be solved.

#D-11; In this step, it is detected whether register N is 49 or not, and if N is 49, #D-11;
If N is not 49, the flow branches to #D-12.

#D-12: The flow reaches this step when frame video signals are being recorded on the two tracks accessed by the heads 3-1 and 3-2. If such a recording is made, track U
When the P switch is turned on, the driver 23 is driven to shift the heads 3-1 and 3-2 by l track in this step, and then in #D-13, the driver 23 is driven to shift the heads 3-1 and 3-2 by l track. -Shift 2. Further, as described above, N is updated by 1 each time the heads 3-1, 3-2 are shifted.

Similar to #D-13 and #D-12, head 3-1.3-2
is shifted by l tracks.

#D-+4; Similarly to #23, display N on the 2-digit 7-segment LED 25 shown in FIG.

In this embodiment, these steps are #D-12 and #D-13.
Heads 3-1 and 3-
When a frame video signal is recorded in the accessed track 2, the track number displayed on the LED 25 is updated by 2, and when a field video signal is recorded, the track number displayed on the LED 25 is updated. What is the track number? It will be updated one by one, and magnetic sheet 1
It is possible to display whether a field video signal or a frame video signal is being recorded on the top.

In addition, if this step is also provided between @D-12 and #D-13, if frame video signals are recorded on the two tracks accessed by heads 3-1 and 3-2, Even if there is, when the track UP switch 54 is turned on, the track number displayed on the LED 25 will be updated one by one.

#D-15; Determine whether the Pn mode flag is set. #D-16 if set
If it is not set, the flow branches to #D-19.

If set, branch to #D-15-1.

#D-15-1; Here, the CI'U 40 converts the reproduced ID signal output from the data demodulator 12 in FIG.
Import into M27. The flow advances to #D-15-2.

#D-15-2; Here, it is determined whether the mode is one in which the ID is superimposed on the video signal and monitored. Details of this mode will be explained using FIG. 20. If it is in this mode, proceed to #D-15-3; otherwise, proceed to #D-15-4.

#D-15-3; When the flow reaches this step, the mode is in which the ID is superimposed on the video signal and monitored, so the CPU reads playback 1 [signal] from the RAM 27,
A character pattern is generated by controlling the character generator 40 and superimposed on the reproduced video signal on the monitor. The flow advances to #D-15-4. That is, at this point, the ID DΔTA signal recorded in the currently accessed track is displayed on the monitor.

31)-15-4; If the automatic track feed flag is not set, the flow branches to #D-20, and if it is, the flow branches to #D-16.

#D-16, memory address N is “0011” head 3
It is determined whether the track being accessed by -1 is one of the tracks on the outer circumferential side of the tracks where the frame video signal is recorded. Here, N corresponds to the number of the track that the head 3-1 is accessing after the heads 3-1 and 3-2 have already been moved, as repeated above. Here, the content at address N of the memory is “0011”
If it is, the flow branches to #D-17, and if it is not "0011", the flow branches to #D-19.

#D-17; The contents of memory (7) address N+1 are”
0010'', that is, it is determined whether the track being accessed by head-3-1 is the inner track of the two tracks on which the frame video signal is recorded.

Here, if address N+1 of the memory is "00!0", the flow branches to #D-18, and if not "001O", the flow branches to #D-19.

If the flow reaches this step via HD-18, #D-16, and #D-17, frame video signals are recorded on the two tracks accessed after the heads 3-1 and 3-2 move. Therefore, the field flag set in #D-8 is cleared and the frame playback mode is set. Note that this step is executed only if the automatic track advance flag is set. (If the automatic track feed flag is not set, #D
Since the flow branches from -15-4 to #D-20, #D
Since the field flag remains set at -8, field reproduction is performed. ) #D-+9; In this step, it is determined whether the automatic track feed flag is set or not, and if it is set, the process returns to #D-20, and if it is set, the process returns from this subroutine. (RTS).

The automatic track advance flag is a flag that is set in the subroutine ■ described later, and is used when calling the subroutine ■ or ■ described later while running a program that repeats playback while automatically advancing tracks. , ■ is provided for extraction.

#D-20; Import the track feed speed setting value from memory.

#D-21; ) Determine whether the rack feed speed setting value is single or not, and if it is single, check #D-
34, if it is not single, the flow branches to #D-22.

#I)-22: ) Determine whether or not the rack feed speed setting value is 2 screens per second.
24, the flow branches.

#D-23; WAIT TI in CPU 40
Set the MER register to 28.

#D-24; l- Determine whether or not the rack feed speed setting value is 5 screens per second, and if it is 5 screens per second, #D-
If there are not 5 screens per second, the flow branches to #D-26.

#D-25. Set WAIT TIMER register to IO.

#D-26: If 10 screens per second is set as the track feed speed setting value, the flow reaches this step and the WAIT TIMER register is set to 4.

Note that the WAIT TIMER registers set in #D-23, #D-25, and #D-26 are used to control the track feed speed, and are set in #D-3, which will be described later.
1° #D-32 l) Magnetic sheet 1 is moved by C motor 2! It is subtracted each time it rotates.

#D-27; Determine whether or not the REC execution flag is set, and if it is set, #D-28;
If not set, the flow branches to #D-31. Here, the REC execution flag is a flag that is set in subroutine ■, and is a WAIT flag that is set when subroutine ■ is called during the execution of a program that repeats recording while automatically sending tracks.
This is provided to obtain the time required for recording by subtracting 2 or 5 in #D-29 and #D-30 from the r1MER register.In other words, in the recording mode, the rotation of the magnetic sheet l is In order to determine the timing for detecting the state from the PG coil 21 and recording the signal to be recorded from a predetermined position on the magnetic sheet,
and magnetic sheet 1 for recording signals J2.

Subtract 2 from the TIMER register, and if not set, subtract 5 from the WAIT TIVER register. Here, if 10 screens per second is set as the track feed speed, the WAIT TIMER register is set to 4, but such a setting is possible only in field mode, so in this case, the WAIT TIMER register is set to 4.
Five is never subtracted from the TIMER register.

#D-31; Detects whether or not there is a pulse from the reference signal generator 19 shown in FIG. Repeat the flow.

#D-32, WAIT 'l'1 Subtract 1 from the contents of the VER register.

#L)-33; Determine whether the content of WAI”r 1'1MERL/ register has become 0, and if it is O, #
If the result is not O, the process branches to #D-31.

In steps #D-32 and #D-33, the timer for controlling the track feed speed is set to WAITTI.
A MER register and a reference signal generator 19 were used. Therefore, compared to the method of configuring a timer by subtracting the contents of the WAIT TIVER register according to the output of the waveform shaping circuit 22 that shapes the output of the PG coil 21, stable and more accurate clock operation can be performed. . That is, P
The output of G coil 21 is a magnetic sheet! Although there is a possibility that errors may be included due to causes such as uneven rotation of the reference signal generator 19, the output of the reference signal generator 19 is substantially free of such errors. Further, when performing interval recording, it is desirable to stop the rotation of the DC motor 2 during the interval time in order to save power consumption.

When performing such an operation, the method of subtracting the WAIT TIMER register according to the output of the waveform shaping circuit 22 is as follows.
Although it is not possible to measure the interval time over time, the method of this embodiment makes it possible to perform a stable timekeeping operation even when such an operation is performed.

#D-34; Determine whether or not the REC execution flag is set, and if it is set, return (RTS) to the original program that called the subroutine ■; if not set, # Branch to D-35.

#D-35; Determine whether or not the track UP switch 54 is on, and if it is on, further shift the track accessed by the heads 3-1 and 3-2 to the inner circumferential side. Therefore, the flow branches to #D-1, and when it is off, the flow branches to #D-36.

#D-36;) Determine whether or not the rack DOWN switch 55 is on, and if it is on, shift the track accessed by the head 3-1.3-2 to the outer circumferential side. To #E-1 of subroutine ■, when it is off::D-37
Branch into.

#D-37; If the PB mode flag is set, go to #D-38; otherwise, go to the subroutine ◎
Return to the program that called.

Clear. Then the subroutine Return to the porogram that called 0.

In the above example, #D-23 is passed regardless of whether it passes through #D-12 in PB mode or not.
, 25, and 26, if the value set in WAIT TIMER is not changed, and #D-12 is passed by the time required to perform l-track feeding, the track feeding speed will be delayed. However, in order to match this, in #D-27, #D-12
If the head passes through 1 track, the track feeding speed can be adjusted without any problem by subtracting the time required to feed the head for one track from WATE TIMER.

Next, subroutine (2) executed when the track down switch 55 is turned on will be explained.

Steps #E-1 to #E-13 of subroutine (2) are similar to steps #D-1 to #D-13 of subroutine (◎), so a detailed explanation will be omitted.

However, subroutine ■ is track DOWN switch 55.
For example, #E-
1, it is detected whether N=1, and in #E-9, the memory (N-1) battery is "0010", that is, the (Nth)
-1) Detect whether the track is the inner track of the two tracks constituting the frame video signal, and
, it is detected whether the memory address (N-2) is '0011', that is, the (N-2)th rack is the outer track of the two tracks constituting the frame video signal, and #E-It is detected. Then, detect whether N=2 or not, and #E
-12, #E-13! Trough 2 minute head 3-1.3
-2 is shifted to the outer circumferential side.

Next, with reference to FIG. 9, subroutine (2) which is called when the field/frame changeover switch 59 and the REC mode setting switch 51 are turned on will be explained.

#J-1: When it is detected in #A-10 shown in FIG. 6 that the field/frame changeover switch 59 is turned on, the flow advances to this step, and in this step, the field flag is set. If it is set, go to #J-2, if it is not set, go to #J-4
The flow branches.

When the field flag is set in #J-2 and #J-1, the field flag is cleared in this step.

#J-3; Determine whether or not the PB mode flag is set. If it is set, the flow branches to #J-8; if not, the flow branches to #J-5.

When it is detected in #J-4 and #J-1 that the field flag is not set, the field flag is set in this step.

'If the PR mode is not set, that is, in the recording mode, and the field flag is cleared in #J-2, the frame recording mode is entered, and as explained in subroutine O9■, [F], every second 1
Continuous recording of 0 screens is not possible. Therefore, when switching from field mode to frame mode in subroutine ■, the track feed speed is 10 per second.
If the screen track advance speed is set, it is necessary to prohibit such switching.

Therefore, according to this embodiment, #J-6 and #
When a track feed speed of 10 screens per second is set by J-7, the track feed speed setting value is automatically changed to a track feed of 5 screens per second.

#J-5; l-Rack feed speed setting value CI'
Incorporate into U40.

$ J - (i; # If the track feed speed setting value imported in J-5 is 10 screens per second, go to #J-7; if it is not 10 screens per second, go to #J-7.
The flow branches at j-8.

tel-7; ) Set the rack feed speed to 5 per second.
Change to screen.

#J-8: If the field/frame setting switch 51 continues to be turned on, this step is repeated, and the process returns to step #A-1 in FIG. 6 for the first time when it is turned off from on.

Next, subroutine (2) called when the REC mode setting switch 51 is turned on will be explained.

#B-1; REC in #A-1 shown in Figure 6
When it is detected that the mode setting switch 51 is turned on, the flow branches to this step, and the PB shown in FIG.
, the LED 44A goes out and the PB mode flag is cleared.

#13-5-1; This step uses CPU40
controls the character generator 84 to temporarily stop character generation.

#13-5-2: Determine whether or not it is the ID setting mode. If it is the setting mode, proceed to 3B-5-3; otherwise, proceed to #B-6'.

#13-5-3; The CPU/10 reads the set fD from the RAM'27 and controls the character generator 84 to generate a character pattern. Therefore, the ID is displayed on the monitor 13 superimposed on the video signal input from the video signal input terminal 18. The flow then proceeds to #B-6'.

$1l-(i';Ice1:, C mode setting switch 5!
Repeat this step as long as it continues to be on.
When the switch is turned off, the flow branches to #B-7.

#11-7; REC mode setting switch 5
1 is turned off, it is determined in this step whether the field flag is set, and if the field flag is set, the flow returns to step #A-1 in Figure 6, and the field flag is set. If is not set, jump to #J-5 of subroutine ■ and execute #J-6 to #J-8 to set the track feed speed setting value! /7 seconds IO screen is automatically corrected to 5 screens per second. Therefore, when the REC mode is set by the REC mode setting switch 51 and the frame mode is set, the track feed speed setting value is limited to a maximum of 5 screens per second.

Next, l) subroutine ◎, which is started when the B mode setting switch 53 is turned on, will be explained using FIG. 1).

#C-1: +3 in #A-3 shown in Figure 6
When it is detected that the 11 mode setting switch 53 is turned on, the flow branches to this step, the RECLED is turned off, and the field flag is temporarily set. That is, separate field video signals are recorded on the two tracks being accessed by heads 3-1 and 3-2, and P
When the frame recording mode in which the B mode flag is cleared and the field flag is reset is set, it is detected that the PB mode setting switch 53 is turned on and the head 3-! , 3-2, in order to prevent separate field video signals from being interlaced and played back if the track being accessed by 3-2 is immediately played back.
In this step, the field flag is set once.

#C-2; Detects whether the memory address is "0011", that is, the track being accessed by the head: 3-1 is the outer circumferential side of the two tracks where the frame video signal is recorded, and the address is "0011". If so, go to #C-3“
0011'', the flow branches to #C-5.

#C-:',: It is detected whether the memory address N+1 is "0010", that is, the track being accessed by the head 3-2 is the inner track of the two tracks where the frame video signal is recorded, and "001O",#C-4
If it is not "0010", the flow branches to #C-5.

#C-/l; When it is detected in #C-2 and #C-3 that frame video signals are recorded on the two tracks that the head 3-113-2 is accessing, the flow changes to this. Once the step is reached, the field flag is cleared and the frame mode is set.

#C-5: P port, L, E D / shown in Figure 3
14A lights up, the P13 mode flag is set, and the playback operation is started.

#C-5-1; In this step, the CPU 40 controls the character generator 84 to temporarily stop generating characters. Further, the CPU 40 stores the ID DATA demodulated by the data 1 summer conditioner 12 in the RAM 27 .

#B-5-2. It is determined whether or not the mode is the ID display mode. If the mode is the display mode, the process proceeds to #C-5-3; otherwise, the process proceeds to #C-6'.

#C-5-3; The CPU 40 reads the LD demodulated by the data demodulator 12 from the RAM 27, and reads the LD demodulated by the character generator 8.
4 to generate a character pattern. Therefore, the image (eye) is displayed on the monitor 13 superimposed on the video signal reproduced from the magnetic sheet. Then the flow is #C
-Proceed to 6.

#C-6: If the P mode setting switch 53 continues to be turned on, this step is repeated, and when it is turned off, the #A-
Return to 1.

Next, using Fig. 11, set the interval time setting switch 5.
Subroutine O that is called when 7 is turned on will be explained. First, in the subroutine ■#G-0, the timer 1' is set to 0, and the interval time 'ri' is set to 7 segments LED25.
is displayed.

#G-1; When it is detected that the interval time setting switch 57 is turned on in the sixth flash #A-7, the timer 'r' is initialized to 0, and then the flow reaches this step. , plus 10 key switches 63-72
When turned on, go to #G-2, ! 0 key switch 63
When ~72 is not turned on, the flow branches to #G~3.

#G-2; Set the interval time Ti to the interval time '1' set by the 10 key switches 63 to 72.
Change to i.

#-23: Determine whether any switches other than the 10 key switches f63 to 72 are turned on, and if they are turned on, branch to #G-4; if they are not turned on, branch to #G-5. .

#G-4; Detects whether or not the interval time setting switch 57 is turned on, and when it is turned on, #G-4;
When G-1 is not turned on, #A- shown in Figure 6
The flow branches to 1.

#G-5; Increase '' in 1iii by 1.1
The flow moves to #G-6 every second.

However, 1'' is a timer that is incremented by 1 every second, and no addition is made if less than one second has elapsed.

#G-6: Determine whether ``l'' is 10 or not, and
If T' is IO, branch to #A-1 shown in FIG.
! , #G-3, #G-5 and #G-6 are repeated'! When '' becomes 10, it returns to #Δ-1.

Therefore, in the above-mentioned subroutine ◎, if no other switch is turned on within 10 seconds after the interval time setting switch 57 is turned on, #A shown in FIG.
The value returns to -1 and the interval time setting is canceled. Of course, the interval time is 1゛i while executing the subroutine ◎
is displayed in the two-digit 7 segment r, ED 25, but the display of the interval time 'ri required to return to #Δ-1 at #G-6 stops.

Also, in this subroutine ◎, at interval 11
When 1jiri is set to O'', an external trigger mode is set for performing an operation when connecting to a printer, for example, as described in subroutine (3) as a reproduction operation.

Next, subroutine (2) called when the REC switch is turned on will be explained using FIG. 12.

#N-1: When it is detected in #A-2 of FIG. 6 that the REC switch 52 is turned on, the flow reaches this step, and f) detects whether or not the 11 mote flag is cleared. However, when it is not cleared, the flow returns to ::A-14 shown in FIG. 6 because it is in the playback mode (1?TS), and when it is cleared, the flow branches to #N-2.

Therefore, if the REC mode is not set, no recording will be performed even if the REC switch 52 is turned on.

#N-2; It is determined whether the N address of the memory is "oooo", that is, whether the track being accessed by the head 3-1 is unrecorded or not. If it is not unrecorded, the process shown in FIG. 6 is performed. The flow returns to #A-14, and if it is unrecorded, the flow branches to #N-3.

#N-3; It is determined whether the field flag is set, and if it is set, the flow branches to #N-5; if it is not set, the flow branches to #N-4.

#N-4; This step is performed when frame recording mode is set, but memory N+1
It is determined whether the address is "0000", that is, the accessed track of head: (-2) is unrecorded. If it is not unrecorded, the flow goes to #Δ-14 shown in returns.In addition, in such a case, IinIetalC,I,
EI) 44 B is blinking.

This track was also unrecorded. In this case, the flow branches to #N-6.

#N-5; Magnetic sheet! A video signal for one field is recorded on one upper track by the head 3-1. At this time, SW6 shown in FIG. 1 is turned off and the output of the character generator 84 is no longer output to the monitor. Also, 0001 is set in the memory address N.

#N-6, when the flow reaches this step, frame recording mode is set, so 2 on the magnetic sheet l
Each on one truck! The video signal for the field is head: 3-1.

5 hits by 3-2. 001 at memory address N
1. 0010 is set at address N+1 and SW 6 is turned off similarly to #N-5. Next, the step morph 24 is driven to shift the heads 3-1 and 3-2 inward by one track.

Note that when #N-5 and #N-6 are executed, SW2 to SW5 are driven as explained in FIG. Also #N-6
When recording is executed, the CPU 40 reads out the set ID from the RAM 27, and outputs it to the data modulator 14, thereby allowing the data modulator 14 to record the TD modulated into a DPSK signal. Amplifier 1
6, where it is superimposed on the video signal and ID recording is performed. However, the 10th display mode is the 20th display mode described later.
In the case of Figure C), even if the data is set, the ID
will not be recorded. However, DΔ'r indicates whether it is an inner track, an outer track, or a field recording of the frame.
Δ is simply recorded together with the video signal. Also, even in the display mode of Fig. 20 a) and b), #N-5. #
By executing N-6, the ID DATA signal will no longer be displayed on the monitor unless SW6 is turned off during recording.

#N-7: The REC execution flag is set and SW6 in FIG. 1 is turned on.

By executing #N-1 to #N-7, when the set ID is generated by the character generator 84, superimposed on the video signal, and output to the monitor, the REC
The character signal that is generated only during execution is SW in Figure 1.
6 will turn it off and the characters will disappear. At #N-7, SW6 is turned on again, so that ID DAT is displayed again.

#N-8; Call subroutine ◎ and head 3-
If 1 is accessing a track other than the 50th track, #
The flow moves from D-1 and #D-2 to #D-3. Next, steps #D-3 to #D-14 are executed to move the head 3-1, 3-2 to the inner circumferential side by l track. In the frame recording mode, the heads 3-1 and 3-2 have been moved to the inner circumferential side by one track in advance at #N-6, so even in the frame recording mode, the head 3-1 is #D-6. The track adjacent to the track recorded in step 14 is accessed. Further, when the track recorded by the head 3-1.3-2 has been recorded, the RFC and LED 44B shown in FIG. 3 blink to warn the user.

The flow then branches from #D-15 to #D-19 and #
The flows shown in #D-20 to #D-34 are executed via D-19.

That is, if the set value of the track feed speed is single, the flow branches from #D-21 to #D-34, and returns to #N-9 according to the RFC execution flag set in advance in #N-7. .

If 2 screens or 5 screens per second are set, subtract the WAIT TIMER register by the time necessary for recording in #D-28, and then
DOWN TIMER register WAI'
When r'l'1MER Renosk becomes (), the flow is the same as above from 31)-ko33 to #D-:54,
Return to #N-9 according to the REC execution flag set in #N-7 in 'c.

#N-9; Clear the REC execution flag.

#N-IQ; This step is similar to #D-20, and the set value of the track feed speed is taken in from the memory.

#N-II; If the set value of the track feed speed is single, go to #N-12; if not, go back to #l\-1, 1 shown in FIG. 6.

#N-12;) When the rack feed speed is set to single, this step is repeated as long as the REC switch 52 is turned on, and subroutine ■ is executed again so that no recording is performed. Control.

The track feed speed is set to something other than single, and the REC switch 52 is turned on.1;4;!
This is #l\- from #N-11 to # via -17+
1゜#A-2 to subroutine (call inside 11;1
Is the flow described actually true? As long as the R15C switch 52 is turned on, recording continues at the set track feed speed. When the RE C switch 52 is turned off, the flows are #Δ-14, #Δ-1 . Proceed to #A-2 but #Δ
Do not call subroutine ■ at -2 (continuous one-time recording ends.

Next, the subroutine (2) called when the program setting switch 58 is turned on will be explained using FIG.

111-1; When it is detected that the program setting switch 58 is turned on in #A-8 of FIG. 6, this step is reached! ) Determine whether or not the B mode flag is set, and if it is set, return to #11-2; if not, return to #A-1 shown in Figure 6 (RTS) .

This step is provided to inhibit program setting by +1 in the recording mode. That is, in this embodiment, when the program setting is set to 11, the reproduction mode is selected in advance, so that the magnetic sheet! The program is configured so that program settings can be made while checking the video recorded on, for example, a monitor.

Matatapu [! By automatically setting the I)11 mode flag when the program setting switch 58 is turned on, the operation to the reproduction mode can be performed automatically.

In this case, call subroutine ◎ to perform the same steps as those shown in subroutine ◎, that is, instead of the steps shown in #II-1.
All you have to do is set it up.

#ll-2; When a program is played back in the program track memory shown in FIG. 14 where the program is stored, the register (2) indicating the address where the track number to be played next is stored is set to ().

#l+-1,B I:lCl, 11) Set the program playback mode flag indicating the raw mode and return to #-I.

Next, the 15th subroutine ■ is called when the program track setting switch 62 is turned on after the program playback mode is set by the subroutine ■.
This will be explained using figures.

1-1, Determine whether the program playback mode flag is set, and if it is set, #I-
If not set, the flow branches to #A-1.

Therefore, when the program playback mode is not set by the program setting switch 58, no program setting operation is performed even if the program track setting switch 62 is turned on.

#I-2, register S (
In #1, the same contents as those of S=0 (initialized as S=0 when the power is turned on) are written to register M.

#I-3; The data in the program track memory at the address stored in register M is
stored at a larger address. In other words, the data indicating the track number stored in the program track memory is stored at an address that is 1 larger than the address where the data is stored.

#I-4; Write the value obtained by adding 1 to the contents of register M to register l.

#I-5; Subtract 1 from the contents of register M.

#I-6; Determine whether the contents of register M are 0 or not,
If it is 0, the flow branches to #I-7, and if it is not 0, the flow branches to #■-3.

The flow from #I-3 to #■-6 is repeated, and when the contents of register M become O, all data stored at each address in the program track memory is transferred to an address larger by l. Therefore, when this flow is repeatedly executed and the flow branches from #I-6 to #■-7, no data is stored at address l of the program track memory.

#I-7, the number of the track that the head 3-1 is accessing is stored at address l of the program track memory. Therefore, by turning on the program track setting switch 62, the number of the track where the video being accessed by the head 3-1 and being reproduced is recorded is programmed.

#I-8; Add 1 to the contents of register S. By executing this step, register S always has #I
The first address (largest address) where the data of the program track memory moved by executing the flow from -3 to #■-6 is stored.

#I-9; If the program track setting switch 62 is turned on, repeat this step, and if it is turned off, return to #A-1.

If the user wants to continue setting the program, turn on the track UP switch 54 or the track DOWN switch 55 to set the head 3-1.3-.
Program settings can be made by changing the track being accessed in step 2 and turning on the program setting switch 62 while checking the reproduced video when the desired track is played back. .

Note that each time the program setting switch 62 is turned on, the 14th
The data stored at each address of the program track memory shown in the figure will be stored at addresses one by one. Also, during program setting, the contents are exactly the same as the register S register (2).

Next, program playback is performed to play back the program set by turning on the program setting switch 58 and the program track setting switch 62, and the head 3-1
The first part about the program executed when performing interval playback, which plays recorded tracks sequentially at a set interval time, starting from the track being accessed.
This will be explained using FIGS. 6 to 18.

' First, the subroutine (2) called when the start switch 60 is turned on will be explained with reference to FIG.

#-i; When it is detected that the start switch 60 is turned on in #A-11 of FIG. 6, the flow reaches this step, and it is detected whether the PB mode flag is set and the PB mode flag is set. When the mode flag is not set, the flow branches to #A-1, and when the PB mode flag is set, the flow branches to #-2. Therefore, in this embodiment, if the playback mode is not set in advance, interval playback or program playback cannot be performed, so even if the start switch 60 is turned on by mistake during the recording mode, interval playback or program playback will start. It is possible to prevent this from happening.

Also, by providing a step similar to the step shown in subroutine ◎ instead of -1 in #, it is possible to immediately start playing the interval playback program by simply turning on the start switch 60 without having to set the playback mode in advance. .

-2 to #: It is determined whether or not the program reproduction mode flag is set, and if it is set, the flow branches to #-13. If it is not set, the flow branches to #-4.

Here, the flow will be described when the program playback mode flag is not set, that is, when interval playback is performed.

-4; lmo+) -(DNtr ground power"0000
”, Determine whether the track being accessed by head ≦-1 is unrecorded or not, and if it is green, #K
-6 If not recorded, the flow branches to -5 at #. First, the flow from #16 onward will be described assuming that the track being accessed by the head 3-1 is unrecorded.

According to this embodiment described below, when the track being accessed by the head 3-1 is other than the 49th or 50th track, the interval playback is performed from the track to the track being accessed by the head 3-1. When it is the 49th or 50th track, only the tracks that have been recorded sequentially from the 1st track are played back, but between #-2 and #-4, the head 3-1 is moved to the 1st track. If a step of driving the step motor 24 is inserted to access the tracks, only the tracks that have been recorded sequentially from the first track are always reproduced.

Therefore, when the head 3-1 is not accessing the first track but is accessing another track, it is extremely effective for automatically performing interval playback sequentially from the first track to perform a search.

Set # to -6, an automatic track advance flag indicating that interval playback is in progress.

-7 to #: Determine whether or not the field flag is set, and if it is set, the flow branches to #-18; if it is set, the flow branches to #-9.

#-8, it is determined whether the track being accessed by head 3-1 is the innermost track by detecting whether N is 50, and it is detected that N is 50. In this case, the flow branches to #-10, and when 50 is not detected, the flow branches to #-11.

-9 to #; Indicates whether the track that the head 3-1 is accessing is one track outside the innermost circumference.
The determination is made by detecting whether or not 49.
When 9 is detected, the flow branches to #-10 and when 48 is not detected, the flow branches to #-11.

-10 to #; In this step, the interval time T set by executing subroutine ◎
It is determined whether or not i is "O". As will be described later, when the interval time Ti is "O", the head 3-
In this mode, when the interval time Ti is set to "0'', the flow shifts to #A-1, and when it is not set to "0", the flow shifts to #. The flow branches to -12.

#-11; Call subroutine ◎, #D-1
The flow shown in ~#D-18 is executed.

When subroutine O is called in subroutine ■, the PB mode flag is set, so the flow branches from #D-2 to #D-9, and at #K-4, the track accessed by head 3-1 is checked. When it is determined that a track on the outer circumference side of the frame and one track inner circumference than this track is the inner track of the two tracks on which the frame video signal is recorded, and that the head 3-1 is not accessing the 49th track. Heads 3-1 and 3-2 are #
When the heads 3-1 and 3-2 are shifted inward by two tracks by D-12, #, and D-13 and no discrimination is made, the heads 3-1 and 3-2 are shifted inward by one track by #D-13. Also, if a frame video signal is recorded on the track being accessed by head 3-1.3-2, the field flag is cleared and the flow goes from #D-19 to #-1.
Move on to 4.

#-12; Call subroutine ■#E-1~
The flows shown in #E-13 and @D-14 to #D-19 are executed, and in #-4, the track on the outer circumference side adjacent to the track accessed by the head 3-1 and the outer circumference side by one more track are executed. If frame video signals are recorded on two of the tracks, head 3-1.3-2 is #E-
12, #E-13 shifts the track by two tracks toward the outer circumference; otherwise, #E-13 shifts only one track toward the outer circumference.

Also, if # is the same as -11 < 3-1. If a frame video signal is recorded in the accessed track of 3-2, the field flag is cleared and the flow moves from #D-19 to #K-13. .

#L(-13; Determine whether or not the track being accessed by the head 3-1 is the outermost track by detecting whether or not the content of register N is 1.
When 1 is detected, the flow branches to #K-14, and when 1 is not detected, the flow branches to #K-12. Therefore, if the flow branches to #K-12 at #-8 or #-9, that is, head 3
When the head 3-1 is accessing the 49th track or the 50th track, the head 3-1 is controlled to access the 1st track by repeating steps -12 to # and -13 to #. .

-14 to #; Clear the automatic track feed flag.

As explained above, the flow from #K-4 to #K-14 is executed, and when the flow branches from #K-4 to #K-5, the head 3-1 moves to the track where the video signal is recorded. Tracks on which no video signals are recorded are essentially skipped without being played back.

Furthermore, by executing the flow from #K-4 to #K-14, when the flow branches from #K-4 to #K-5, the two tracks being accessed by heads 3-1 and 3-2 are #D if a frame video signal is recorded
Since the field flag is cleared at -18, the frame playback mode is automatically set. Further, when a field video signal is recorded on the track being accessed by the head 3-1, 3-2, the field playback mode is automatically set. Therefore, during interval playback, the most appropriate playback mode is automatically set according to the recording method of the video signal.

-5 to #: The interval time Ti set in subroutine (3) is taken into the register T' of the CPU 40 from the memory.

#K -15; Similar to -10 in #, detect whether the interval time Ti is "O" and if it is "O", #
To K-17, if it is not “0”, H#! (The flow branches to -16. Here, the explanation from #K-16 will be given assuming that the external trigger mode is not set.

-16 to #; Start timer 1 timing operation, #I
(Proceed to -18.

-18 to #; It is detected whether or not the timer l has clocked for 1 second. If the timer is being counted, the flow branches to -19 to #, and if it is in the middle of counting, the flow branches to #K-20.

-20 to #; It is detected whether the stop switch 61 is turned on, and if it is turned on, the flow branches to #A-i, and if it is not turned on, the flow branches to @K-21.

Here, when the flow branches to #A-1, it returns to #A-1.
Since steps from #A-12 are executed, when the stop switch 61 is turned on in the normal state, the flow is #A-12.
The subroutine [phase] will be called from A-12.

The subroutine [phase] will be explained below using FIG. 17.

#M-1; Detects whether the program playback mode flag is set and if it is not set, @A
-14, and if set, the flow branches to 4M-2.

4M-2; It is detected whether or not the program reproduction execution flag is set. If it is set, the flow branches to #M-3; if it is not set, the flow branches to #M-4.

#M-3; Make the contents of register ■ the same as the contents of register S.

#M-4; Set register S to 0 and then execute #M-3.

This subroutine 0 will be described in more detail in the program playback mode. Below, #K-21 and later will be explained in detail.

-21 to #: Detects whether the track UP switch 54 is on, and when it is detected that it is on, calls the subroutine ■ and shifts the heads 3-1 and 3-2 to the inner circumferential side and turns it on. If it is not detected, the flow branches to #-22.

-22 to #: Detects whether the track DOWN switch 55 is on, and when it is detected that it is on, calls subroutine ■, shifts the heads 3-1 and 3-2 to the outer circumferential side, and turns it on. If it is not detected, the flow branches to #-18.

-19 to 9; subtract 1 from T'.

-23 to #; when T' is "0", -24 to #, T'
When is not 0'', the flow branches to #K-16.

Therefore, by executing the above-mentioned steps #15 to #23, turning on the track UP switch 54 and track DOWN switch 55 during interval playback will record data on the track adjacent to the track being played. You can play videos that are on the screen. In that case, by keeping switch 54 or switch 55 on, the tracks being played can be automatically updated sequentially according to the track feed speed set in subroutine [F], and the number of tracks during interval playback can be updated automatically. You can also easily play back the video before the screen is placed.

Furthermore, in this embodiment, before turning on the switches 54 and 55, when playing back a video recorded on a track adjacent to the track being played back by turning on the track UP switch 54 and the track DOWN switch 55, When the remaining time of the interval time Ti of the track being played in is played back, the flow moves from # -23 to # -24 and is updated to play a new track. As shown by the dotted line,
By jumping the flow to -5 at #, it is possible to reset the interval time T' so that the image updated by the switches 54 and 55 can be reliably observed for a certain period of time.

-24 to #; When updating the track to be played after the interval time T' ends, it is detected whether or not the program playback mode is set, and if it is set, it changes to -3 to #. If not, the flow branches to #-6.

Next, about the routine ◎ that branches when the program playback mode flag is set at -2 in #, the 18th
This will be explained using figures.

#O-1; Detects whether the contents of register S is “0” and when “O” is detected, transfers “0” to #A-1.
When it is detected that this is not the case, the flow branches to #o-2.

As mentioned above, register S stores the start address of the program in the program track memory, and the content of register S is "0" if no program is stored in the program track memory. When the value is "0", the process returns to 8 in FIG.

#O-2; Detects whether the contents of register ■ is “0” and when “0” is detected, transfers to #0-3;
”, the flow branches to #O-3.

As mentioned above, register ■ stores the address of the track memory where the track number to be played next is stored when program playback is executed.
When executing program playback, l is subtracted every time one step program playback is executed, as shown in #0-14 below.

Therefore, the reason why the flow branches to #0-2 and register I is detected as "On" is because the program has been set and register S is not "0", and the program playback steps have been executed. In other words, when the program playback is executed in - ways, #O
-3, the flow branches to #0-5 while the program playback is being executed -3.

#0-3, the interval time Ti set in subroutine ■ is taken in and the interval time Ti is “
If it is "0", the flow returns from routine ◎ to #A-1 and ends the program playback operation.

Therefore, in the external trigger mode set by q where the interval time is "O", the program playback operation is stopped after the program playback has been executed three times.

Also, during normal program playback when the interval time Ti is set to other than “O”, #
The flow moves to O-4.

#O-4; Write the contents of register S to register I.

Program operation is started again.

no-g; Read the data (■) at the address of the program track memory set in register I (the data written to the address set in register I of the program track memory is shown in parentheses) .

#O-6; If data (1) is subtracted from N indicating the track number currently being accessed by head 3-1 and it is less than "O", then #0-7
, if it is smaller, the flow branches to #O-8.

#O-7; Set field flag. This set is the same as #D-8 (this is to prohibit head feeding in frame mode).

#O-8; Shift the heads 3-1 and 3-2 by one track in the outer circumferential direction.

#O-9, detect whether data (1) is equal from N indicating the track number accessed by the head 3-1;
If they are equal, the flow branches to #0-1°; if they are not equal, that is, if the data (I) is greater than N indicating the track number, the flow branches to #0-11.

#0-10. Head 3-1.3-2 towards the inner circumference
Frame playback and field playback are automatically performed depending on whether the video signal recorded from the start is a frame video signal or a field video signal.

Furthermore, by repeating #0-6 to #0-10, Herad 3
-1 is controlled to access the track programmed in the program track memory.

#0-14; Subtract 1 from register ■.

#0-15; The program playback execution flag is set. With this step, the flow can be branched by determining whether the program reproduction mode flag is set at -24 in #.

The flow then jumps to #-15.

Therefore, when branching to routine 0 at -3 in #, it is first determined whether or not a playback program is actually set, and then it is determined whether or not the external trigger mode is set, and the external trigger mode is set. When this is the case, the program is executed only one way; otherwise, the program is played repeatedly.

Next, a flow when the external trigger mode is set will be explained. When the external trigger mode is set, the flow branches from #K-15 to #K-17.

#117'; Detects whether the printer connected as an external device is busy (executing a print operation) or not; if busy, returns #A-1; if not busy, returns #K- The flow branches at 18'.

#K-18', Sends a print start signal to the printer as an external device. The print start signal is executed by setting the signal level of the terminal connected to the printer to H level.

#119'; 150m5ec wait #120'
; If the printer is busy, the flow branches to #-21'; if the printer is not busy, the flow branches to $I(-24).

Detects whether or not the stop switch 61 is turned on. If the stop switch 61 is not turned on, the flow returns to #20', and if it is turned on, the flow returns to #A-1.

If the printer connected as an external device is busy when executing steps #K-17' to #K-21' above, the flow returns to #A-1 as described above, and other switches are activated again. The flow shown in FIG. 16 is repeated until the switch is turned on. If the start switch 60 is turned on again while repeating the flow shown in FIG. 16, the above-described flow will be repeated and step 17' will be executed again.

In addition, if a printer is not connected as an external device, use the printer 1 shown in Figure 1 in #K-17'.
3' Bi! The terminal into which the signal from the G signal output terminal is input is open and becomes H level. Therefore, if a device such as a printer is not connected even though the external trigger mode is set, the head 3-1.3-
The track being accessed by No. 2 continues to be played, and the track being played is not updated.

Also, if a printer is connected as an external device and the printer is not busy (from #K-17' to #
When the flow advances to K-18', printer operation is started after waiting 150m5pc as shown in #K-19 after sending the print star I signal to the printer, and if the printer becomes busy, the printer Repeat 120' for # and 121' for # until the operation is completed or the stop switch 60 is turned on.
When the printer operation is finished, the flow is #120'
The process branches to #K-24, and it is determined whether program playback is set by detecting whether the program playback mode flag is set. If program playback is set here, the flow is #
If program playback is not set, the process branches to #K-6. Further, when the stop switch 60 is turned on, the flow is as described above.

Further, if the external trigger mode is selected when program playback is set, the program playback operation is stopped after the program playback has been executed three times as described in #O-3.

Further, according to this embodiment, even when the external trigger mode is selected and the program playback is not set, since #K-10 is provided, the head 3-1.3-2 When the playback is performed sequentially from the accessed track to the last track, the playback operation is stopped.

Therefore, in external trigger mode, regardless of whether programmed playback is set or not, the playback operation stops after the normal playback is performed, so the printer is used as a device that performs external triggers. When using , only −-way printing is performed.

On the other hand, in modes other than external trigger mode, even if program playback is set or not, playback starts again from the beginning after playback is performed in a predetermined order. will be held. Therefore, when such a playback device is used in a mode other than the external trigger mode, so-called endless playback can be performed because playback is performed repeatedly in a predetermined order.

Further, although a printer is shown as the external trigger device in this embodiment, it may be a device having an electric transmission function, or any other device as long as it processes a reproduced signal.

Next, the case of setting TD will be explained.

When the IO key switches 63 to 72 are turned on in the flow (2), the flow branches to the subroutine (2) shown in FIG.

#R-1; If the PB mode flag is set, the process branches to #R-10 and returns to the flowchart (2). Therefore, in a mode other than the recording mode, even if the IO key is turned on, virtually nothing is executed in this subroutine. If the PB mode flag is not set, that is, if it is in recording mode, the flow branches from #R-1 to #R-2.

#R-2; Here, it is determined whether the ID setting mode, that is, the ID is superimposed on the video signal and the mode is being monitored. The method for setting this mode will be described in detail with reference to FIG. 20. If this mode is not selected, the process branches to #R-10 and returns to #A-1 in the flowchart shown in FIG. If this mode is selected, the process branches to #R-3.

#R-3; The CPU 4 selects the set position from the register P of the RAM 27 for storing the set position indicating where on the monitor the ID set here is to be displayed.
0 is read, and data corresponding to the switch turned on among the IO key switches 63 to 72 is written and stored in the address corresponding to the set position in the RAM 27. Then C
The PU 40 controls the character generator 84 to display the data on the monitor B according to the read set position.

#R-4; Here, wait until the 10 key switches 63 to 72 are turned off once. If the switches that were turned on are turned off, the flow advances to #R-5.

# R-5-; Here, the setting position of the data other than the date in the ID is 1 from 0 to 10 as shown in Figure 21.
Since it is 1 point, if register P is equal to lO, branch to #R-6, otherwise, go to #R-
Branches into 7.

#R-6; Here, register P is set to 0, and D
The setting position of ATA is initialized.

#R-7; Here, 1 is added to the value of register P and D
The ATA setting position moves to the next setting position.

1? -7-1; The data at the position stored in register P blinks (blinks).

#R-8: In this step, it is determined whether the 10 key switches 63 to 72 are turned on, and if they are turned on, the process branches to #R-3 and the 10 key switches 63 to 72 are turned on according to the flow described above. set 1
0 is displayed on motor 13.

If it is not turned on, the process branches to #R-9.

#R-9; Here, it is determined whether any switches other than the IO main key switches 63 to 72 are turned on, and if they are not turned on, the process branches to R-8. If it is turned on, it branches to #R-11.

#R-9-1. Stop the blinking of the ID displayed on the monitor. Flow proceeds to #R-10.

#R-11; Here, register P at the ID setting position
Set 0 to #R-9-1 and initialize the ID setting position.
Proceed to.

#R-10; Return to the flow of ■.

As explained above, when the PB mode flag is not set and the ID setting mode, that is, the mode in which the set ID can be monitored, the 10 key switch 6
Each time a switch 3 to 72 is turned on, the CPU 40 controls the character generator 84 to generate data at a position determined by the register P.

Next, the ID switch 73 will be explained.

When the switch 73 is turned on, the subroutine ◎ shown in FIG. 20 is called from the flow shown in . Here, subroutine ◎ will be explained.

#Q-1; Here, determine whether or not the PB mode flag is set, and if it is set, #Q-2
Otherwise, the process branches to #Q-7.

#Q-2; Here, check whether it is in ID display mode or not.
That is, it is determined whether the mode is such that the ID is output on the monitor superimposed on the video signal. If you are in ID display mode, go to #Q-4, otherwise go to #Q-4.
Branch to Q-3.

#Q-3: Here, the CPU 40 controls the character generator 84 to stop displaying the ID output from the generator 84. From here, the flow advances to #Q-6.

#Q-4; Here, the CPU 40 reads from the RAM 27,
The reproduced ID is taken into the CPU 40 and the flow is #Q
-Proceed to 5.

#Q-5: Here, the CPU 40 controls the character generator 84 based on the reproduced ID, and causes the character generator 84 to output the reproduced ID as a character pattern as shown in FIG. 21(a). The flow then proceeds to #Q-6.

#Q-6; Here, if the switch 73 is turned on, the process waits; if it is turned off, the flow proceeds to the next step and returns to the flow of (2).

#Q-7; PB mode flag is not set.
First, when in recording mode, it is determined whether or not it is in ID setting mode. That is, if the ID is in a mode in which the character generator 84 outputs a character pattern superimposed on the video signal, the flow advances to #Q-9. Otherwise, the flow advances to #Q-8.

#Q-8, where the character "ID" is the character generator 84
If it is likely to be determined whether the mode is being output by
The flow advances.

#Q-9; In this step, the CPU 40 controls the character generator 84 to stop displaying the ID, and generates a two-character pattern "ID" by the character generator 84 as shown in FIG. 21(b). to enter the “ID” character display mode. The flow then proceeds to #Q-6. That is, when the ID switch 73 is turned on in the ID setting mode, the "ID" character display mode is set.

#Q-10, In this step, the CPU 40 controls the character generator 84 to stop displaying all character patterns as shown in FIG. 21(C). Then the flow is #Q-6
Proceed to.

#Q-11; If the flow reaches this step, I
Since it is not in the D setting mode (not in the "ID" character display mode, that is, the mode is set to stop displaying the ID on the monitor), the CPU 40 reads the set ID from the RAM 27, controls the character generator 84, and The character generator 8 uses the ID as a character pattern as shown in FIG. 21(a).
Output from 4. That is, the ID setting mode is set by this step. The flow then proceeds to #Q-6.

As explained above, every time ID switch No. 73 is turned on, [
The display format of D will be rewritten.

In other words, in the playback mode, the ID switch 73
ID display mode in which the playback ID DAT is superimposed on the video signal and monitored every time you turn on the playback ID
The ID non-display mode in which no data is output will be repeated. Specifically, I shown in FIG. 21(a)
The D display mode (C) is a repeat of the H) non-display mode. Also, in the recording mode, there is an ID setting mode that displays all IDs to be set, and an ID setting mode that displays all IDs to be set.
The "ID" character display mode in which only characters are displayed and the mode in which no ID is displayed on the monitor are repeatedly switched each time the ID switch 73 is turned on. Specifically, as shown in FIG. 21(a). .

The modes shown in (b) and (C) will be switched repeatedly. The ID display in the recording mode will be further described below. FIG. 21(a) in recording mode.

When recording a video signal in the mode shown in (b), the ID is modulated with the video signal in #N-5 and #N-6 in FIG. 12, is modulated into DPS, and is further frequency-multiplexed with the video signal and recorded. It turns out. Also, Figure 20 (C)
When recording a video signal in this mode, I
D data is not recorded. However, DATA indicating whether it is inside or outside the frame or field recording is always sent together with the video signal.

That is, in this embodiment, depending on the number of times the ID switch is pressed, the monitor 1 is
You can switch the display regarding [) in 3.

Furthermore, in this embodiment, in the recording mode in which the ID is recorded together with the video signal, the display shown in FIG. 21(a) is performed in the D setting mode, and the display shown in FIG. 21(b) is performed in the
The reason for providing these two display modes will be explained below.
It is possible to set the year, month, date and 11-digit number, but if you try to display all of the ID information as shown in Figure 21(a), it will occupy a considerable area on the screen of the monitor 13. Therefore, there is a problem that the viewing of the image may be obstructed, so a display mode as shown in FIG. 21(b) is provided to solve this problem.

Next, a method of displaying the reproduced ID in the reproduction mode will be explained. That is, in the recording mode, the image shown in FIG. 21 (
A display method for reproducing the ID recorded together with the video signal when the modes shown in a) and (b) are set by the ID switch 73 will be described. In the playback mode, when the head is moved to a new track, the ID recorded on that track will be played back on the monitor 13. This is done by demodulating the ID reproduced by the data demodulator 12 shown in FIG. 1, reading this output by the CPU 40, and further driving the character generator 84. The ID read by the CPU 40 is held in the RAM 27 by the CPU 40. The display of such ID has been explained using FIG. 21(a), but in this embodiment, I? There are two modes for displaying characters held in the AM27 as shown in I) and II) below.

I) A first display mode that is displayed when an ID recorded in which only the year, month, and date are set as ID data and no other data is set is played back.

n) When playing back an ID in which the year, month, date and other numerical data are set as ID DATA, the second
display mode.

FIG. 22(a) shows the ID display in (2).

FIG. 22(b) shows the ID display in (2).

That is, for I), only the year, month, and day are displayed on the lower right side of the monitor, and for (2), the year, month, date and other data are displayed on the lower right side of the monitor. Therefore, the ID information is always displayed in the lower right corner of the monitor screen, so that it can be prevented from interfering with the video signal as much as possible. Further, in this embodiment, the display is displayed in the lower right corner of the screen, but it may be displayed anywhere as long as it is in the corner of the screen.

In order to execute this operation, after reading the output signal of the data demodulator 12 shown in FIG.
All you have to do is generate the characters after confirming that all data other than daily income has not been set. In other words, I), I[
), the CPU 40
controls character generator 84.

Also, if it is determined that the year/month/day income data is not the DATA recorded by this device, the 22nd
The display shown in Figure (b) is performed.

This is ok (known check code l DATAo
This can be determined by recording it as such.

Next, a case will be described in which the year, month, and day are set as the ID. In the flow (2), when the year setting switch 74 is turned on, the flow jumps to the subroutine (2) shown in FIG.

#S-1; If the PB mode flag is set here, the flow advances to #5-14 and returns to the flow of (2). If not set, proceed to #S-2.

#S-2; Here, it is determined whether the mode is the rD setting mode, that is, the mode in which the ID data is superimposed on the video signal and output to the monitor or the link. If it is not in this mode, proceed to #5-14 and return to the flow of (2). If this mode is selected, proceed to #S-3.

#S-3; Here, the year setting position 1 on the monitor 13
Blinking of the number in the 10th digit of the year setting position means that the character in the position shown in ■ in Figure 24 (a) blinks. This means that the CPU 4
This is accomplished by 0 controlling the character generator 84 to generate or not generate a character at this position. This is done by well-known interrupt processing. The flow then proceeds to #S-4.

#S-4; At this point, wait until the switch 74 is turned off. When switch 74 is turned off, the flow is #S-
Proceed to step 5.

#S-5; Here, it is determined whether the lO key switches 63 to 72 are turned on. If the 10 key switch is on, the flow advances to #S-6. If not, proceed to #5-12.

#S-6; Here, the CPU 40 writes the input data from the 10-key switch to the RAM 27, and generates a character pattern by controlling the character generator 84 at the position shown as ■ in FIG. 24(a), which is the year setting position. let The flow then proceeds to #S-7.

#S-7; Blink the first digit of the year setting position. This means that the characters at the position shown in Figure 24 (■) blink.

Blinking is performed by CPU 40 controlling character generator 84. The flow proceeds to #S-8.

#S-8; At this point, wait until the lO main key switch is turned off. When the IO primary key switch is turned off, the flow advances to #S-9.

#S-9: It is determined whether the 10 key switch is turned on or not. If turned on, the flow is #5
-10, otherwise go to #5-13.

#5-1o; C if the 10 key switch is turned on
The PU 40 writes the data inputted by the 10-key switch to the RAM 27, and controls the character generator 84 to generate a character pattern at the position shown in ■ in FIG. 24(a), which is the first digit of the year setting position. let Then the flow is #
Proceed to 5-11.

#5-11; The CPU 40 controls the character generator 84 to stop the character from blinking at the year setting position. This allows the user to know that the year setting has been completed. Flow proceeds to #5-14.

#5-12; If the lO main key switch is not turned on in #S-5, it is determined whether a switch other than the lO main key is turned on. If it is not turned on, the key σ- branches to #S-5, and steps #S-5゜#5-12 are repeated, and if the switches other than the 10 key are turned on, the switch goes to #5-5. Proceed to step 11.

#5-13. Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, the flow branches to #S-9, and if it is turned on, the flow branches to #5-11. Therefore, until a switch other than the 10 key is turned on, #S-9. By repeating steps #5-13, the characters at the year setting position continue to blink, prompting the user to set the year using the 10-key switch.

#5-14; If the PB mode flag is set, if the mode is ID setting mode, and if the blinking is stopped by #5-11, the flow returns to step (2) through this step.

As explained above, when the year setting switch 74 is turned on, the number that is the 10th digit of the year setting position starts blinking to inform the operator of the position where data is set. Here, by inputting numbers using the 10-key switch, the data input at the blinking position is generated as a character pattern by the character generator 84, and the CPU holds the data in the RAM 27.

When the setting of the 10th digit is completed, the number in the 1st digit position will start blinking, and the DAT will be placed at this position in the same way.
Settings for A are performed. Here, when the setting of the first digit is completed, the year setting mode ends and the process returns to the flow shown in ■, but it is also possible to proceed to the flow shown in ■ and enter the month setting mode.

Next, the setting of the month's DATA will be described in detail with reference to subroutine (2) shown in FIG.

In the flow of (2), when the switch 75 is turned on, subroutine (2) is called and the month DATA setting mode is entered.

#T-1; If the PB mode flag is set here, the flow advances to #T-16 and returns to the flow of (2).

If the PB mode flag is not set, the flow advances to #T-2.

#T-2; Here, it is determined whether the mode is an ID setting mode, that is, a mode in which ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, proceed to $T-16 and return to the flow of (2). If this mode is selected, proceed to #T-3.

#T-3: Here, blink the 10th digit number at the column setting position above the 1,200 digits. The blinking of the 10th digit number at the column setting position means that the character at the position shown by ■ in FIG. 24(a) blinks. This is CPU40
is performed by controlling the character generator 84 to generate or not generate characters. The flow then proceeds to #T-4.

#T-4; At this point, wait until the row setting switch 75 is turned off. When the switch 75 is turned off, the flow advances to #T-5.

#, T-s; Here, 10 key switches 63-72
Determine whether or not it is turned on. If the 10 key switch is on, the flow proceeds to #T-6; otherwise, the flow proceeds to #T-13.

#T-6; Here, it is determined whether the number inputted by the 10-key switch is 2 or more. If the number is 2 or more, the flow proceeds to #T-14, otherwise the flow proceeds to #T-7. In other words, in the case of column settings, the flow is branched according to the number set in this step in order to accept the first digit number only when the first number input is "l" or "0". .

#T-7; Here, the CPU 40 stores the input data in the RAM.
27 and controls the character generator 84 to write the character pattern to the position shown in ■ in FIG. 24(a), that is, #.
It is generated at the position blinked at T-3. °Flow proceeds to #T-8.

#T-8; Here, blink the first digit number at the column setting position. This means that the character at the position indicated by ■ in FIG. 24(a) blinks. The flow is #T-
Proceed to step 9.

#T-9; At this point, wait until the 10 key switch is turned off. When the 10 key switch is turned off, the flow advances to #T-10.

#T-to; Here, it is determined whether the 10 key switch is turned on. If it is turned on, the flow advances to #T-11; otherwise, the flow advances to #T-15.

#T-II; Here, the CI'U40 writes the data input by the 10 key switch in #T-5 or #T-1o to the RAM 27, and
The character generator 84 is controlled to generate a character pattern at the position shown in FIG.
Go to 12. If #T-14 branches to this step, by executing #T-14゜#T-11, the data entered by the 10 key switch in #T-5 will be displayed in the 1st digit and the 10th place will be displayed. “0” is displayed in the digit.

#T-12: Stops blinking of the data at the column setting position and displays that month setting is completed.

Flow proceeds to #T-16.

#T-13; This step includes 1 in #T-5.
Branches if the 0 key switch is not turned on. Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, it branches to #T-5, and if it is turned on, it branches to #T-12. That is 10
#T-5. until the key switch or other switch is turned on. #T
-13 is repeated, and if the 10th key switch is turned on, the flow branches to #T-'6, and if any other than the 10th key switch is turned on, the flow branches to #T-12.

#T-14; The process branches to this step when it is determined in #T-6 that the input data is "2" or more. Here, the CPU 40 stores data "O" in the RAM 27.
” and set the character generator 8 to the 10th digit of the column setting position.
4 to generate a character pattern "0". The flow advances to #T-11.

@T-15; Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, branch to #T-10; if it is turned on, it branches to #T-10.
Branches into 12.

#T-16; Return to the flow of ■.

As explained above, when the switch 75 is turned on, the 10th digit at the month setting position first blinks, thereby first indicating the position at which data to be input using the 10 key switch is to be set. If two or more pieces of data are input here, "O" is automatically set in the 10th digit and the input data is automatically set in the 1st digit. Of course, if there is an input of 1 or less, 10
Needless to say, the next blinking position that is input in the 1st digit moves to the 1st digit, and the next data input using the 10 key is set to the 1st digit. Therefore, according to this embodiment, when setting the month, it is possible to easily set the month by taking advantage of the fact that 2 or more is never set in the 10th digit.

Further, in #T-3, only the 10th digit is blinked here, but the 10th digit and the 1st digit may be blinked together.

Furthermore, when the setting of the next first digit is completed, the process returns to the flow shown in (2) in this example, but it is also possible to proceed directly to subroutine O shown in FIG. 26 and enter the day setting mode.

Next, the day data setting will be described in detail with reference to FIG. When the switch 76 is turned on in the flow (2), the day data setting mode is called and the flow jumps to (2).

#U-1: If the PB mode flag is set here, the flow advances to #U-16 and returns to the flow of (2). P
#U-2 if B mode flag is not set
Proceed to.

#U-2, it is determined whether the mode is the ID data SET mode, that is, the mode in which the ID data is superimposed on the video signal and output to the monitor or printer. If it is not in this mode, proceed to #U-16 and ■
Return to flow 1-. If you are in this mode,
#Proceed to U-3.

#U-3; Here, the blinking of the 10th digit of the month setting position that blinks the 10th digit of the sunset position on the monitor is the character at the position shown in ■ in Figure 24 (a). means blinking. This is CPU40
is executed by controlling the character generator 84 to generate or not generate characters.

The flow then proceeds to #U-4.

#U-4; At this point, wait until the date setting switch 76 is turned off. When switch 76 is turned off, the flow advances to #U-5.

#U-5; Here, it is determined whether the 10 key switches 63 to 72 are turned on. If the IO key switch is turned on, the flow advances to #U-6; otherwise, the flow advances to #U-13.

#U-6; Here, it is determined by the IO key switch whether the input data is 4 or more. If it is 4 or more, the flow goes to #U-14, otherwise it goes to #U-14.
Proceed to U-7. In other words, in the case of column settings, in order to add a first digit number only when the first number input is 3", "2", "J", or "ON", the number set in this step is used. to branch the flow.

#U-7; Here, the CPU 40 sends the input data to RA
M27 and controls the character generator 84 to generate a character pattern at the position shown by ■ in FIG. 21(a), that is, at the blinking position #U-3.

The flow proceeds to #U-8.

#U-8; Here, blink the first digit of the date setting position. This means that the characters at the positions indicated by ■ in FIG. 24(a) blink. Flow is #U-9
Proceed to.

#U-9; At this point, wait until the 10 key switch is turned off. When the IO key switch is turned off, the flow advances to #U-10.

#U-io; Here, it is determined whether the lO key switch is turned on. If it is on, the flow goes to #U-tt, otherwise it goes to #U-15.

#U-11; Here, the CPU 40 writes the data input by the 10 key switch in #U-5 or #-10 to the RAM 27, and inserts a character generator into the position shown in Figure 24 (■), which is the first digit of the date setting position. 84 to generate a character pattern, and the flow then proceeds to #U-12. In addition, when branching to this step from #U-14, by executing #U-14゜#U-11,
In U-5, the data input by the IO key switch is displayed in the first digit, and "0" is displayed in the tenth digit.

#U-12, the 8th setting stops blinking the data,
Displays that date setting is completed.

Flow proceeds to #U-16.

#U-13; This step includes l in #U-5.
Branches if the O key switch is not turned on. Here, it is determined whether any switches other than the IO key are turned on.

If it is not turned on, it branches to #U-5, and if it is turned on, it branches to #U-12. i.e. until the 10 key switch or other switch is turned on.
U-5. The flow of #U-13 is repeated, and if the 10 key switch is turned on, the flow branches to #"I'-6, and if any other than the 10 key switch is turned on, the flow branches to #U-12.

#U-14; The process branches to this step when it is determined in #U-6 that the input data is "4" or more. Here, the CPU 40 stores data in the RAM 27.
0" is written, and the character generator 84 is controlled to generate a character pattern "0" in the 10th digit of the month setting position. The flow advances to #U-11.

#U-15; Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, branch to #U-10; if it is turned on, it branches to #U-10.
Branches into 12.

#U-16; Return to the flow of ■.

As explained above, when the switch 76 is turned on, the 10th digit at the date setting position first blinks, thereby first indicating the position where the data to be input using the 10 key switch is to be set. If 4 or more data is entered here, "0" will be automatically set in the 10th digit and the input data will be set in the 1st digit. Of course, if 3 or less is entered 10 for
Needless to say, the next blink position that is input in the first digit moves to the first digit, and the next data input using the IO key is set to the first digit. Therefore, according to this embodiment, when setting the day, it is possible to easily set the day by taking advantage of the fact that 4 or more is never set in the 10th digit.

Further, in #U-3, only the 10th digit is blinked here, but the 10th digit and the 1st digit may be blinked together.

In the embodiment described above, the display is blinked to indicate the setting position, but the setting position may be indicated by other methods such as changing the brightness or changing the color.

Next, the erase sequence will be explained. When erasing data, the erase execution switch 78 and erase standby switch 77 shown in FIG. 1 are used. That is, when erasing is to be executed, the switch 77 is used to put the data into an erase standby state in advance, and then the erasure is executed only when the erase execution switch 78 is turned on. Furthermore, there are two modes for erasing: a mode in which a plurality of tracks are continuously erased, and a mode in which only a single track is erased. Hereinafter, the above operation will be described in detail based on the flowchart (2) shown in FIG. In the flowchart A in FIG. 1, when the switch 77 is turned on, the flow calls subroutine (2) and proceeds to #V-1. At this point, the erase standby state is set, but at this time, the buffer memory E for storing the number of erased tracks contains “
FF" is set. Also, the track number accessed by the head 3-1 on the two-digit 7-segment LED 25 that displays the track number is approximately 2.
The track number display LED blinks (2 times) at a frequency of Hz.
Hz period) allows the operator to confirm that the erase standby mode has been set.

That is, compared to the method of using a dedicated display element to indicate that the erase standby state is in effect, the method of this embodiment not only does not require the use of such a dedicated display element, but also displays the track number. By changing the display format of the display, the standby state for erasing is displayed, making it easy to recognize the track number to be erased.In addition, in this embodiment, the 7 segment L
Although the standby state for erasure is indicated by blinking the display of the ED25, it is of course possible to use other liquid crystals as the display element, and in addition to blinking, the color and brightness of the display may be changed. Various methods are possible, such as changing the form of displayed characters.

In addition, if there is a display that displays other information than the track number, such as the number of free tracks, the display format of the display can be changed as described above to enable the erase standby state. It may be possible to display a certain thing.

The flow then proceeds to #v-2.

#V-2; Here, it is determined whether or not the PB mode flag is set, and if it is set, the flow advances to #v-4; otherwise, it is determined that the switch 77 is turned off. After confirmation, the flow advances to #v-3.

#V-3; Here, the subroutine ◎ for setting the playback mode described above is called, the playback mode is set, and the flow advances to #v-4. Therefore, when the erase standby switch 77 is turned on, #V- By executing #2 and #V-3, the playback mode is set and the erase standby state is set.

#V-4; Here, it is determined whether the switch 78, that is, the erase execution switch is turned on. If it is on, #V-4-1; if not, #V-1
The flow advances to step 5.

#V-4-1; Here, the branch destination of this step is determined by a switch that is prepared in advance in the case (not shown) of the magnetic sheet 1 and that determines the presence or absence of a claw. In other words, this claw has the function of preventing accidental erasure, and if it is broken off, it is promised in advance not to erase the data. Therefore, if accidental erasure prevention is set, the flow advances to @V-18. If not set, the flow advances to #v-5.

#V-5: In this step, it is determined whether the value set in the buffer memory E (hereinafter referred to as E) for storing the number of erased tracks is "0". The buffer memory E is previously set to "FF" in #V-1, but the setting value can be changed in #V-15, which will be described later. If the value set in the buffer memory E is "O", the flow proceeds to #V-18; otherwise, the flow proceeds to #V-5-1. Next, #v-5-1 will be explained.

#V-5-1; In this step, it is determined whether the value set in the buffer memory E is "FF" or not. If it is "FF", the flow proceeds to #v-6, and if not "FF", the flow proceeds to #V-5-2.

#V-5-2; Set the field flag and set the field playback mode.

The flow proceeds to #U-6.

#V-6; Here, display the track number 7
The blinking of the segment LED 25 is switched from the 2Hz set in #V-1 to the fast cycle of 5Hz. In addition, when performing continuous track erasure, the set track number is displayed on the 7-segment LED 25 instead of the track number being accessed by the head 3-1 in #V-17 described later. Even #
7 segment LED25 by running v-6
Automatically switches to display the track number. Therefore, the user can confirm which track is currently being erased during continuous track erasing.

At #V-7, , :, , :, the cPU 40 controls the erase signal generator 85 to generate an erase signal, and erase is executed. In addition, when performing erasing, switch 2 shown in Fig. 1 is pressed.
, the switch 3 is controlled to connect at least one of the heads 3-1, 3-2 to a recording amplifier. Here, when the field flag is set, that is, in the case of filled playback mode, the erase current flows only to the head 3-1 shown in FIG. 1 that is playing, and l tracks are erased. If the field flag is cleared, that is, if frame playback is selected, the head 3 shown in Figure 1
An erasing current flows simultaneously to both of -1 and 3-2 to erase one frame's worth of tracks, in other words, two adjacent tracks' worth of video signals are erased.

Note that in this embodiment, erasure in frame mode is executed only when the flow advances from #V-5-1 to #v-6 without passing through #V-5-2. There is. In other words, in #V-5-1, the value of buffer memory E is “FF”.
”, that is, when the continuous erase mode, which will be described later, is not selected.

#V-8; Wait until erasing is completed.

When erasing is completed, the flow advances to #V-8-1.

#V-8-1; Here, it is determined whether E is equal to "FF". If it is equal to “FF”, it is single erase mode, so the flow goes to #V-18, otherwise, continuous track erase is set, so the flow goes to #V-9
Proceed to.

@V-9; Here, the value of buffer memory E is subtracted by 1. Flow proceeds to @V-10.

#V-10; In this step, it is determined whether the value of the buffer memory E is greater than 0.

That is, the number of tracks to be erased when continuous track erasure is set is detected, and if it is greater than 0, the flow proceeds to #V-11; otherwise, it is assumed that continuous track erasure has ended. Proceed to #V-18.

#V-11; In this step, it is determined whether the stop switch 61 is turned on. If it is turned on, the flow branches to #V-18, and if it is not turned on, the flow proceeds to #V-12. That is, the continuous erasing mode, which will be described later, is selected, and if the stop switch 61 is operated while this mode is being executed, the continuous erasing can be interrupted. Flow then proceeds to #V-12.

#V-12; In this step, it is determined whether N of the track number buffer memory is 50 or more, that is, whether the track being accessed by the head 3-1 is the final track. If so, the flow proceeds to @V-18 and ends the erase operation, otherwise proceeds to #V-13.

#V-13; By executing this step, the track position accessed by the heads 3-1, 3-2 moves one track toward the inner circumference. Also head 3-
1. With the movement of 3-2, N+1 is set to N in the track number memory. Then the flow is #V-5-
Branches into 2.

Therefore, when continuously erasing tracks, #V-5-2 to # is used until the stop switch 61 is turned on or the innermost track is erased.
V -13 (D 7 o - is repeated until the value of the buffer memory E becomes O, that is, until the erasure of the set number of tracks is completed.

Next, the flow after #V-15 for setting the continuous erase mode executed as described above will be explained.

#V-15; io shown in items 63 to 72 in Figure 1
It is determined whether any of the main key switches is on or not, and if it is on, the flow proceeds to #V-16; if not, the flow proceeds to #V-15-1.

#V-16; In this step, the continuous track erase mode will be set. In other words, the number input using the IO main key switches 63 to 72 becomes the number of tracks on which continuous erasure is to be performed. In the erase track number buffer E, the numerical value of the turned-on 10 key is set in the 1's digit. Flow then proceeds to #V-17.

#V-17; 7 segment L in this step
The value of E is displayed on ED25. This situation will be explained with reference to FIG. 28. In #V-15, the value of the first 10 key switch turned on is set to the 1 digit of E (#V-15).
16) and is displayed at the 1's digit of the LED 25 in this step, as shown in FIG. 25(a). Here, before reaching the display shown in FIG. 22(a), the track number is displayed on the display and is blinking.

Further, F set to E is displayed as "0". Note that the numerical value displayed on the display is 2l- in #v-1.
Since the blinking operation of 1z continues to be repeated, the display "81" shown in FIG. 25(a) will blink. The flow then proceeds to #V-17-1.

#V-17-1; At this point, wait until the IO main key switch is turned off. When turned off, the flow is #V-15
Proceed to -1.

@V-15-1; Erase standby switch 7 here
7 is turned on. If it is turned on, the flow proceeds to #V-18, and if it is not turned on, the flow proceeds to @V-15-2.

That is, by turning on the erase standby switch 77, the erase standby state set in @V-1 is automatically canceled by turning on the switch 77 again and in the steps after #V-18. Therefore, there is no need to provide a dedicated release switch.

#V-15-2; , :, Determine whether any switches other than the switch 78 and the 10 key are turned on. If it is turned on, the flow branches to #V-18, and if it is not turned on, the flow branches to #v-4.

In other words, the erase standby state is automatically canceled by turning on any switch other than the 10 key in steps #V-18 and subsequent steps. Therefore, there is no need to provide a dedicated release switch. Therefore, there is no need to go out of your way to provide a separate switch. Above #V-
15-1, #V-15-2 with No, the above-mentioned steps from #v-4 onward will be repeated (but the 7-segment LED 25 has already indicated "8I" shown in FIG. 25). ” is displayed and the steps after #v-4 are executed.

When the lO main key switch is turned on in #V-15, the numerical value input by the switch in #V-16 is set to the 1st place in the buffer memory E, and the number that was previously set in the 1st place is stored in the buffer memory E. The number set in the 10th place disappears.

Here, for example, if the "5" key of the lO main key switch is turned on, #V-16. #V
-17, the display shown in FIG. 28(b) is displayed on the 7-segment LED 25. Of course, the value set in the buffer memory E in this case is 15.

Next, when a good "2" is similarly input to the IO main key switch, the display shown in FIG. 25(C) is produced. The above display example shows the display performed by the LED 25 when 1, 5.2 of the 10 key switches are turned on in order in the erase standby state. Furthermore, the displayed numerical value matches the value set in E as it is. In other words, if a value of "2" or more is set using the 10-key switch, this is equivalent to selecting the continuous erase mode.
Further, the set value becomes the number of tracks on which continuous erasing is performed. This situation can be seen in #V in the flow description above.
If the value of the buffer memory E is greater than 0 at -10, the flow proceeds to #V-11, otherwise branches to #V-18, and if the track number N is less than 50, the flow proceeds to #V-11. UP L the track at 13
Te#V-5-2+: Branching Branch material V-6 and subsequent steps are executed to perform continuous erasure.

That is, if the stop switch 61 is not turned on in #V-11, until the value of E becomes equal to O or the innermost track No. 50 is erased,
Erasing will be performed continuously.

Then after performing the steps described above run #
V-18 to #V-20 will be explained.

#V-18; , -, -, 7 segment LED 25
(7) Stop blinking and display track No. N on the display. The flow then reaches #V-19. In other words, this step erase standby state is released.

#V-19; If the switch 77 is turned on, the process waits; if the switch 77 is turned off, the process proceeds to #V-20.

#V-20; At this point, the flow returns to the flow shown in A of FIG.

As explained above, when performing erasing, in this embodiment there are two modes: a mode in which erasing is performed only once, a mode in which it is performed continuously, and a mode in which erasing is performed after specifying the number of tracks to be erased consecutively in advance. However, for erasing when the number of erase tracks is not set using the 10-key switch, the value of E in #V-s-i is set to "F" in advance.
F", the process moves to #v-6 without passing through #V-5-2. Therefore, if the field flag is cleared in the erase standby state, it is set in frame mode. In other words, if the field flag is set, erasure of 1 track will be performed in field mode.In other words, if the field flag is set, erasure of 1 track will be performed. In this case, if the two tracks used for playback were played in field mode,
This means that L tracks of the reproduced track will be erased.

However, if the number of erased tracks is set by the IO main key switch, the process goes through #V-5-2, so erasure is always performed in field mode. However, if "0" is set from the lO main key switch, in #v-5,
Erasing is not performed because it branches to #V-18. In addition, since the field flag is set in #v-5-2 when "B" is set, even if the frame is being played back, the outer periphery of the two tracks constituting the frame image will be Only one track will be erased.

Therefore, it is possible to erase only the signal recorded on one of the two tracks constituting a frame image.

Furthermore, when performing continuous track erasing, it is generally assumed in many cases that new information, such as a video signal, is recorded on the erased track. In the embodiment described above, when continuous track erasing is completed, the head 3-1 is located on the last erased track, so when recording new information, the user must press the track UP switch 54 and the track DOWN switch. It is necessary to operate the switch 55 so that the head 3-1 accesses the track on which erasing has started.

Therefore, the next step is to execute continuous track erasing, and when this is completed, the flow for realizing a function that is extremely effective in terms of operability is to have the head 3-1 automatically access the track where continuous erasing has started. is shown in FIG. The flow shown in FIG. 29 is @V-18 shown in FIG. 27.
#V-19(7) This is a flow inserted between each step.

First, when subroutine V is executed, the track number N that is being accessed at that time in #V-1 is stored in memory N'. After the erasure is executed according to the flow described above and reaches #V-18, the flow shown in FIG. 29 is executed. That is, in #V-18-1, it is determined whether the number of the track that the head 3-1 is accessing at that time matches the number of the track stored in the memory N' in #V-1, and if they match. If not, #V-18-2. #V18-3 is executed, the head 3-1 is controlled to access one track on the outer circumference, N is set to N-1, and the memory N is displayed on the 7-segment LED 25. Then the flow returns to #V-18-1 and head 3
The number of the track that −1 is accessing is memory N.
#V-18-2. until it matches the track number stored in '. #Repeat V-18-3, head 3
-1 accesses the track that started erasing #V1
The flow branches from 8-1 to #V-19, and the above-mentioned @V
-19 and subsequent steps are executed. Therefore the 29th
By executing the flow shown in the figure, when erasing is completed, head 3=1 automatically accesses the track where erasing started, so it is possible to omit the operation of manually searching for the position where erasing started for the next recording. I can do it.

Furthermore, when performing continuous erasing, the video to be erased is played back for a certain period of time, the operator is made to confirm this, and after determining whether or not the stop switch 61 is turned on, the erasing operation for that track is started. is extremely effective in preventing accidental erasure.

To realize this function, one track is UP in #V-13 of subroutine V shown in FIG.

Preferably, a step for a delay of about 1 second is provided in the step immediately after #v-6 after N+1 is executed until #v-7 is executed, and furthermore, during this delay, the stop switch 61 is Determine whether or not is turned on,
If it is not turned on, go to #v-7, if it is turned on, go to #V-
What is necessary is to provide a step that branches to 18.

By providing such a step, it is possible to confirm the video signal to be erased, so that if a video that is not desired to be erased is played back, continuous erasing can be interrupted by turning on the stop switch 61. Therefore, the probability of erroneous erasing is dramatically reduced.

In addition, when performing continuous erasing, in the above-mentioned embodiment, the flow branches from #V5-1 to #V5-2 in subroutine ①, and by executing #V5-2, all tracks are erased one track at a time in field mode. However, in order to shorten the execution time of continuous erasing, it is necessary to erase two tracks at least once during continuous track erasing by sending an erasing signal to two heads simultaneously in frame mode. is valid. An example in this case will be described below.

First, in FIG. 30, the flow shown in FIG. 30(a) is changed to #V-6 shown in FIG. This step is inserted between the step #V-7, and the flow shown in FIG. 30(b) is the step #V-11. This step is inserted between step #V-■2. Next, the flow will be explained.

After subroutine (2) shown in FIG. 27 is executed up to #v-6, #V-6-1 is executed following #v-6. In this step, it is determined whether the number of erased track buffers E is two or more, that is, whether continuous track erasure is being performed.

If it is 2 or more here, the flow is #V-6-2
If not, proceed to #V-7. #V-6-
2, sets E to E-1 and clears the field flag. The flow reaches #v-7. Here the 27th
An erase signal is generated at #v-7 shown in the figure, but in this case, if the field flag is set, one head of '3-1.3-2, that is, performs field reproduction. If the field flag is cleared, the erase signal is supplied to both heads 3-1 and 3-2 at the same time. #v-8 to #V-1 after erasing is completed
1 is executed as described above, and if the continuous erase operation is not completed, the flow goes from #V-11 to #V-11-1, and it is determined whether the field flag is set. If continuous track erase is not set and the field flag is set, the flow is #V-12
and follow the flow described above. Also, if continuous track erasure is set in #V-11-1 and the field flag is not set, as described above, #
Since two tracks have been erased in V-7, the flow reaches #V-11-2, and N, +
1 is set and the head 3-1゜3-2 is set on the inner circumference side of the l track.
moves. After that, the flow reaches #V-13, and the head further moves toward the inner circumferential side of the l track according to the above-described flow.

By doing so, when performing continuous erasing, erasing is performed in frame mode until the number of remaining tracks for continuous erasing becomes 1, so that the execution speed of continuous erasing can be increased. However, in this case, if you want to check the video to be erased before executing the erase, following #v-6,
When the field flag is set, it is necessary to select heads 3-1 and 3-2 in FIG. 1 for a certain period of time so that head 3-1 performs field reproduction and head 3-2 performs field reproduction. be. Also #V-
2. #Skip step V-3 and switch to PB mode, RE
In particular, by switching between the C mode and the C mode, a mode in which the reproduced video to be erased during continuous erasing is confirmed or a mode in which the reproduced video is not confirmed may be selected. In other words, select a mode in which the images to be erased are not confirmed when performing continuous erasure, and perform the flow shown in FIGS. 30(a) and (b) in the second
When added to the flow shown in FIG. 7, the time for continuous erasing becomes the shortest, and this is an extremely effective means when erasing all tracks.

Next, subroutine (2) executed when the all-track erase standby switch 79 is turned on will be explained with reference to FIG.

#W-1 The near segment LED 25 flashes ":";::" (ALL-ERASE) at 2 Hz, indicating the all-track erase standby state.

#W-2: Determine whether or not the PB mode flag is set, and if it is not set and the flow branches to #W-4 if the flow goes to #W-3.

#W-3-1: Clear the PB mode flag to prohibit reproduction of the magnetic sheet l.

#W-3-2: Detects that the switch 79 is turned off and proceeds to #W-4.

#W-4: Determine whether the erase switch 78 is on or not. If it is on, the flow branches to #W-9; if not, the flow branches to #W-5.

#W-5: All track erase standby switch 79
Determine whether or not is turned on. If it is on, #W-7
If it is not on, the flow branches to #W-6.

#W-6: Determine whether any switches other than switch 79 are turned on. If it is on, the flow branches to #W=7, and if it is not on, the flow branches to #W-4.

#W-7: Stop the blinking of LED25, and
5 to display N, that is, the track number accessed by the head 3-1.

#W-8: If the switch 79 is turned off at the same time, the process returns to ■.

#W-9: 'When the erase switch 78 is turned on in #W-4, the flow branches to this step. In this step, it is determined whether or not there is an erroneous erasure prevention claw (not shown). If there is, the flow branches to #W-10; if not, the flow branches to #W-7.

#W-10: Determine whether N is "1", that is, the track number accessed by head 3-1 is "1", and if it is 'l', transfer to #W-12 with "1". If not #
The flow branches to W-11.

#W-11: Heads 3-1, 3-2 are moved to the outer circumferential side by one track, 1 is further subtracted from N, and the flow returns to #W-10. Therefore #W-10. #W-11
The flow branches to #W-12 only when the number of the track being accessed by the head 3-1 reaches 1 by repeatedly executing .

#W-12: Flashing N on LED25 (5Hz)
let This allows the user to know which tracks have been erased when all tracks are erased.

#W-13: Field flag is cleared and frame mode is set. Therefore, head 3-1.
3-2 is used to erase the track.

@W-14: :(F) Both 2 steps are #V-7. #
Same as V-88W-15.

#W-16: Since both heads 3-1 and 3-2 are used and two tracks are erased without moving the head, in this step the head is moved two tracks to the outer circumferential side and further N is erased. Add 2 to .

#W-17: Determine whether or not N is 50. If N is 50, the flow branches to #W-7; if not, the flow branches to #W-12, and erasing of all tracks is completed. Until #W-
Steps 12 to #W-17 are repeated.

As explained above, in the all-track erase mode, which is executed by turning on the erase switch after turning on the all-track erase standby switch, the PB mode flag is cleared before erasing, and the video to be erased is not checked. Furthermore, since erasing is performed two tracks at a time using both magnetic heads 3-1 and 3-2, the time required to erase all tracks is extremely short compared to the method of erasing one track at a time. Furthermore, when erasing all tracks, the head is moved to the end of the track (in this example, the outermost circumference) and then all the tracks are erased in order toward the opposite end. When attempting to erase a track, all tracks can be reliably erased no matter which position the head 3-1 is accessing.

Further, during erasing, the number of the track being accessed by the head 3-1 is displayed on the LED 25, so that the user can recognize how much erasing is being performed.

In the embodiments described above, the magnetic sheet 1 is used as the recording medium, but an optical recording medium may be used. A magneto-optical recording medium or other recording medium may also be used. As the recording means, means depending on the recording medium may be used, for example, in the case of an optical disc, an optical head may be used.

In the embodiment of the present invention described above, the inline type head 3-1.3-2 is provided to perform recording and reproduction in field mode and frame mode. In particular, when erasing all tracks, the inline type head 3-1.3 is provided. The time required for erasing all tracks is made as short as possible by performing so-called frame erasing in which an erasing current is simultaneously applied to the two tracks.

Also, as explained in #v-7 of subroutine ■, if continuous erasing mode is not set, in which consecutive tracks are erased after setting the number of tracks to be erased in advance, frame playback is selected. If field reproduction is selected, field deletion is performed.

Specifically, #V-2. executed when the erase standby switch 77 is turned on. When the playback mode is automatically set by #V-3, feed playback or frame playback is automatically selected depending on the information recorded on the track being accessed by head 3-1.3-2. However, field erasure and frame erasure are automatically switched in accordance with the selected field playback and frame playback.

Therefore, from the user's point of view, the video signal that is being reproduced while the erase standby switch 77 is turned on is erased by turning on the erase switch 78, resulting in a very user-friendly effect.

<Effects of the Invention> ′ As explained above, according to the present invention, erasing signals are simultaneously applied to a plurality of heads included in an in-line head to simultaneously erase adjacent tracks, so the time required for erasing can be significantly reduced. It has a short-lived dulling effect.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing combinations of switching states of SW2 to SW5 shown in FIG. 1, and FIG. 3 is a front view of the device of this embodiment. 4 are front views of the remote control device used with the device, FIGS. 5 to 20, 23, and 25.
Figures 27 to 27 and 29 to 31 are C shown in Figure 1.
Flowchart of PU40, Fig. 21, Fig. 22, Fig. 2
4 Figures are displayed on the monitor!・A diagram for explaining the D signal, FIG. 28 is a diagram for explaining the flow of FIG. 27,
FIG. 32 is a diagram for explaining signals generated from the erase signal generator 85 shown in FIG. 1. 1--1 magnetic sheet 3-1.3-2--head 4O---CPU

Claims (1)

[Claims] (1) An erasing device that performs recording or reproduction using an in-line head having a plurality of heads, characterized in that erasing signals are simultaneously applied to the plurality of heads to perform erasing.