JPS622280U - - Google Patents

Info

Publication number
JPS622280U
JPS622280U JP9313685U JP9313685U JPS622280U JP S622280 U JPS622280 U JP S622280U JP 9313685 U JP9313685 U JP 9313685U JP 9313685 U JP9313685 U JP 9313685U JP S622280 U JPS622280 U JP S622280U
Authority
JP
Japan
Prior art keywords
base
holes
electronic device
package
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9313685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9313685U priority Critical patent/JPS622280U/ja
Publication of JPS622280U publication Critical patent/JPS622280U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例におけるパツケージの
ステムとキヤツプの分解斜視図、第2図は電子デ
バイス完成状態の断面図、第3図は第2図の電子
デバイス装置側基板へ半田付けした時の部分拡大
断面図、第4図は従来の一例の斜視図、第5図は
第4図のパツケージを用いた電子デバイスをプリ
ント板へ実装した状態を示す断面図である。 1……ベース、2……内部接続端子、4……ラ
ンド、5……スルーホール、6……側端面凹部、
7……キヤツプ、8……逃げ、9……プリント板
、10……ランド、11……半田。
Figure 1 is an exploded perspective view of the stem and cap of the package in the embodiment of the present invention, Figure 2 is a sectional view of the completed electronic device, and Figure 3 is the electronic device when soldered to the side board of the electronic device in Figure 2. 4 is a perspective view of a conventional example, and FIG. 5 is a sectional view showing a state in which an electronic device using the package of FIG. 4 is mounted on a printed board. 1...Base, 2...Internal connection terminal, 4...Land, 5...Through hole, 6...Side end surface recess,
7...cap, 8...escape, 9...printed board, 10...land, 11...solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電子デバイスを収容し、ステムとキヤツプとか
らなるパツケージにおいて、前記ステムが、ベー
スとこのベースのスルーホールに固定された複数
個の内部接続端子と、前記スルーホールに近接し
たベース側端面に前記スルーホールと1対1対応
で設けられた凹部と、前記凹部を覆いかつ前記対
応のスルーホールのベース両面のランドに接続す
る導体パターンとより構成されていることを特徴
とする電子デバイス用パツケージ。
In a package that houses an electronic device and includes a stem and a cap, the stem includes a base, a plurality of internal connection terminals fixed to through holes in the base, and a plurality of internal connection terminals fixed to the through holes on the base side end surface near the through holes. 1. A package for an electronic device, comprising a recess provided in one-to-one correspondence with a hole, and a conductor pattern that covers the recess and connects to lands on both sides of the base of the corresponding through hole.
JP9313685U 1985-06-20 1985-06-20 Pending JPS622280U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9313685U JPS622280U (en) 1985-06-20 1985-06-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9313685U JPS622280U (en) 1985-06-20 1985-06-20

Publications (1)

Publication Number Publication Date
JPS622280U true JPS622280U (en) 1987-01-08

Family

ID=30650543

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9313685U Pending JPS622280U (en) 1985-06-20 1985-06-20

Country Status (1)

Country Link
JP (1) JPS622280U (en)

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