JPS62216250A - プリント基板型ｐｇａパツケ−ジの製造方法 - Google Patents
プリント基板型ｐｇａパツケ−ジの製造方法Info
- Publication number
- JPS62216250A JPS62216250A JP24865685A JP24865685A JPS62216250A JP S62216250 A JPS62216250 A JP S62216250A JP 24865685 A JP24865685 A JP 24865685A JP 24865685 A JP24865685 A JP 24865685A JP S62216250 A JPS62216250 A JP S62216250A
- Authority
- JP
- Japan
- Prior art keywords
- plating
- holes
- opening
- plate
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000000758 substrate Substances 0.000 title description 11
- 238000007747 plating Methods 0.000 claims abstract description 39
- 239000004065 semiconductor Substances 0.000 claims abstract description 18
- 238000000034 method Methods 0.000 claims abstract description 10
- 238000003860 storage Methods 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 28
- 239000011889 copper foil Substances 0.000 abstract description 14
- 238000007493 shaping process Methods 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 description 14
- 239000010949 copper Substances 0.000 description 14
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 239000011810 insulating material Substances 0.000 description 4
- 230000000873 masking effect Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24865685A JPS62216250A (ja) | 1985-11-06 | 1985-11-06 | プリント基板型ｐｇａパツケ−ジの製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24865685A JPS62216250A (ja) | 1985-11-06 | 1985-11-06 | プリント基板型ｐｇａパツケ−ジの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62216250A true JPS62216250A (ja) | 1987-09-22 |
| JPH025014B2 JPH025014B2 (enrdf_load_stackoverflow) | 1990-01-31 |
Family
ID=17181373
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24865685A Granted JPS62216250A (ja) | 1985-11-06 | 1985-11-06 | プリント基板型ｐｇａパツケ−ジの製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62216250A (enrdf_load_stackoverflow) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63255996A (ja) * | 1987-04-14 | 1988-10-24 | シチズン時計株式会社 | 半導体チツプ実装用多層基板 |
| JPH01112739A (ja) * | 1987-10-27 | 1989-05-01 | Matsushita Electric Works Ltd | 電子部品実装用プリント配線板 |
| US5804422A (en) * | 1995-09-20 | 1998-09-08 | Shinko Electric Industries Co., Ltd. | Process for producing a semiconductor package |
| US6011694A (en) * | 1996-08-01 | 2000-01-04 | Fuji Machinery Mfg. & Electronics Co., Ltd. | Ball grid array semiconductor package with solder ball openings in an insulative base |
| US6040984A (en) * | 1996-02-27 | 2000-03-21 | Fuji Machinery Mfg. & Electronics Co., Ltd. | Printed circuit board with opposed bonding shelves for semiconductor chip wire bonding at different levels |
| KR100285116B1 (ko) * | 1997-02-12 | 2001-06-01 | 모기 쥰이찌 | 반도체패키지의제조방법 |
| CN103227164A (zh) * | 2013-03-21 | 2013-07-31 | 日月光半导体制造股份有限公司 | 半导体封装构造及其制造方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS568855A (en) * | 1979-07-04 | 1981-01-29 | Mitsubishi Electric Corp | Container for semiconductor |
| JPS5892248A (ja) * | 1981-11-28 | 1983-06-01 | Mitsubishi Electric Corp | 大規模実装化半導体装置 |
| JPS59201449A (ja) * | 1983-03-09 | 1984-11-15 | プリンテツド・サ−キツツ・インタ−ナシヨナル・インコ−ポレイテツド | ヒ−トシンクを有する半導体チツプ担体パツケ−ジ及びその製造方法 |
-
1985
- 1985-11-06 JP JP24865685A patent/JPS62216250A/ja active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS568855A (en) * | 1979-07-04 | 1981-01-29 | Mitsubishi Electric Corp | Container for semiconductor |
| JPS5892248A (ja) * | 1981-11-28 | 1983-06-01 | Mitsubishi Electric Corp | 大規模実装化半導体装置 |
| JPS59201449A (ja) * | 1983-03-09 | 1984-11-15 | プリンテツド・サ−キツツ・インタ−ナシヨナル・インコ−ポレイテツド | ヒ−トシンクを有する半導体チツプ担体パツケ−ジ及びその製造方法 |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63255996A (ja) * | 1987-04-14 | 1988-10-24 | シチズン時計株式会社 | 半導体チツプ実装用多層基板 |
| JPH01112739A (ja) * | 1987-10-27 | 1989-05-01 | Matsushita Electric Works Ltd | 電子部品実装用プリント配線板 |
| US5804422A (en) * | 1995-09-20 | 1998-09-08 | Shinko Electric Industries Co., Ltd. | Process for producing a semiconductor package |
| US6040984A (en) * | 1996-02-27 | 2000-03-21 | Fuji Machinery Mfg. & Electronics Co., Ltd. | Printed circuit board with opposed bonding shelves for semiconductor chip wire bonding at different levels |
| US6011694A (en) * | 1996-08-01 | 2000-01-04 | Fuji Machinery Mfg. & Electronics Co., Ltd. | Ball grid array semiconductor package with solder ball openings in an insulative base |
| KR100285116B1 (ko) * | 1997-02-12 | 2001-06-01 | 모기 쥰이찌 | 반도체패키지의제조방법 |
| CN103227164A (zh) * | 2013-03-21 | 2013-07-31 | 日月光半导体制造股份有限公司 | 半导体封装构造及其制造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH025014B2 (enrdf_load_stackoverflow) | 1990-01-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |