JPS62200414A - Hand-held computer - Google Patents

Abstract

PURPOSE:To curtail the power consumption and to extend a battery life by generating plural clocks so that a main clock of a microprocessor can be selected from among these plural clocks by the user and as a software. CONSTITUTION:When a battery circuit is turned on, a power-on resetting circuit is operated and outputs of ports P0, P1 of a parallel input/output port 5 become both '0'. In this case, a control signal selecting circuit 4 selects an input signal '0' of an input terminal D0 and output it as a clock selecting signal 8 from an output terminal Q, a clock selecting circuit 2 selects a clock 9 and outputs it to a microprocessor 1, and the microprocessor 1 executes its initial operation. Thereafter, a control signal 11 becomes a high level and the control signal selecting circuit 4 outputs an input signal of an input terminal D1, namely a signal corresponding to a state of a manual switch 7, as the clock selecting signal 8. As a result, to the microprocessor 1, the clock 9 or 10 which has been selected by a user is outputted from the clock selecting circuit 2, as a main clock.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to handheld computers.

[Conventional technology]

In conventional handheld computers, in order to extend battery life, a low power consumption CMO5 circuit is introduced, and the main clock of the microprocessor after power-on reset is used at a fixed low frequency.

[Problem that the invention seeks to solve]

In the conventional handheld computers mentioned above, the main clock of the microprocessor is fixed at a low frequency.
Since the main clock cannot be changed depending on the type of program or the user's request, the battery life is determined by the time that power is supplied to the microcomputer.

[Means for solving problems]

The handheld computer of the present invention is:

a clock generator that generates a plurality of clocks with different frequencies; a manual switch that allows a user to select one of the plurality of clocks as a clock after power-on reset; and a manual switch that allows a user to select one of the plurality of clocks as a clock after power-on reset; Means for setting a clock after reset by software; At power-on reset, a predetermined clock is selected from the plurality of clocks and output to the microprocessor, and after power-on reset, the microprocessor Only when performing processing that requires real-time processing, the clock set by the means is selected from the plurality of clocks, and when performing other processing, a clock corresponding to the state of the manual switch is selected from the plurality of clocks. It has a clock selection circuit that selects and outputs the clock to the microprocessor.

Power consumption of a CMOS circuit is proportional to the frequency of the operating clock.

Therefore, by generating a plurality of clocks with different frequencies and selecting them by the user or software from the main processor of the microprocessor, it is possible to suppress battery consumption and extend the life of the battery.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of essential parts of an embodiment of a handheld computer according to the present invention.

Clock generator 3 generates two types of clocks 9.10. Note that the clock lO has a lower frequency than the clock 9, and the clock 9 is the clock when the microprocessor 1 initially operates.

The clock selection circuit 2 receives clocks 9.0 from input terminal D0.01, respectively. When the control signal 8 input to the control terminal S is at a low level, the clock 9 is selected, and when the control signal 8 is at a high level, the clock 10 is selected and output from the output terminal Q. C
The 0 manual switch 7 manually applied to LK is for the user to select the clocks 9 and 10 of the clock generator 3, and is designed to select the clock 9 in the on state and the clock lO in the off state. The address decoder 6 decodes the address signal from the address output terminal ADD of the microprocessor 1 and generates a chip select signal to the parallel input/output board 5. The control signal selection circuit 4 selects the input signal of the input terminal DO when the control signal 11 of the control terminal S is low level, selects the input signal of the input terminal device when the control signal 11 is high level, and selects the input signal of the input terminal device when the control signal 11 of the control terminal S is low level. The signal is output from the output terminal Q to the clock selection circuit 2 as a signal. The parallel input/output board 5 connects the address decoder 6 to the chip select terminal C8.
When the signal to becomes high level, it becomes enabled state,
In addition, the data terminal Data, write control terminal IOW, read control terminal 10R of the microprocessor I are connected to the data terminal D, write control terminal W, and read control terminal R, respectively, so that the signal to the control signal selection circuit input 4 is outputted by software. The control signal 11 of the control signal selection circuit 4 is output from the baud) PG, the data signal for clock selection is output from the baud) P1 to the input terminal DO of the control signal selection circuit 4, and the manual Input the status signal of switch 7.

Note that the baud values (PO and Pi) of the parallel input/output board 5 are initialized at power-on reset.

Next, the operation of this embodiment will be explained.

When the battery circuit (not shown) is turned on, the power-on reset circuit (not shown) operates and the outputs of the parallel input/output port 5 (baud) PO and Pi both become 0''.

At this time, the control signal selection circuit 4 selects the input signal IIO11 at the input terminal DO and outputs it from the output terminal Q as the clock selection signal 8. As a result, the clock selection circuit 2
selects the clock 9 and outputs it to the microprocessor 1, and the microprocessor 1 performs an initial operation. After this,
The control signal 11 becomes high level, and the control signal selection circuit 4 selects the input signal of the input terminal D1, that is, the manual switch 7.
A signal corresponding to the state of is outputted as a clock selection signal 8. As a result, clock selection circuit 2 outputs clock 9 or lO selected by the user to microprocessor l as the main clock. By the way, if the main clock of the microprocessor 1 is different from the one at power-on reset, something that requires real-time processing, such as communication processing software, may not be able to achieve its original performance. When the parallel input/output port 5 is accessed and the control signal 11 becomes low level, it becomes possible to transfer the clock selection right from the user side to the software side.

In this embodiment, the number of clocks is two, but by increasing the number of bits of the control input/output board and the output of the clock generator 3, it is possible to select any number of clocks from three or more types for user applications and software. It goes without saying that this can be done depending on the application, and although only the microprocessor 1 and the input/output ports necessary for control are shown in Figure 1, when configuring the desired functions of the handheld computer, memory and Needless to say, various I10 boats are required. If a clock is required for various types of 170 boats, it is also possible to reduce power consumption using a similar method.

〔Effect of the invention〕

As explained above, the present invention generates a plurality of clocks and allows the user and software to select the main clock of the microprocessor from among these clocks, thereby reducing power consumption and conserving battery power. It has the effect of extending lifespan.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing essential parts of an embodiment of a handheld computer according to the present invention. 1... Microprocessor, 2... Clock selection circuit. 3... Clock generator, 4... Control signal selection circuit, 5... Parallel input/output board, 6... Address recorder, 7... Manual switch, 8.11... Control signal, 9 .10...Clock.

Claims (1)

[Scope of Claim] In a handheld computer, a clock generator that generates a plurality of clocks with different frequencies; a manual switch that allows a user to select one of the plurality of clocks as a clock after power-on reset; means for setting one of the plurality of clocks as a clock after a power-on reset by software; After a power-on reset, the clock set by the means is selected from the plurality of clocks only when the microprocessor performs processing that requires real-time processing, and when performing other processing, the state of the manual switch is selected. 1. A handheld computer comprising a clock selection circuit that selects a clock corresponding to the clock from the plurality of clocks and outputs the selected clock to a microprocessor.