JPS58121434A - Clock pulse control circuit - Google Patents

Abstract

PURPOSE:To reduce the power consumption for normal CMOS operation by putting a microcomputer in operation by a clock pulse of the 1st frequency before frequency division only in a routine which requires high-speed clock pulses. CONSTITUTION:Microcomputers Q1, Q2...Qn are supplied with the 2nd clock pulses from changeover contacts c1, c2...cn of switching circuits S1, S2...Sn normally and control the switching circuits S1, S2...Sn through clock pulse control lines L1, L2...Ln when prescribed tasks are generated respectively to close normally open contacts a1, a2...an of the switching circuits S1, S2...Sn in charge of the control, thereby changing the 2nd supplied clock pulses over to the 1st high-speed clock pulses. Once a task requiring high-speed processing ends, switching to the 2nd normal clock pulses is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a clock pulse control circuit, and more particularly to a clock pulse control circuit for controlling the frequency of a clock pulse used in a plurality of microcomputers and the like.

Technical Background of the Invention On the r Tsutaru Road, each Yuzu gate opens and closes, with an electronic meter slowing down!
One clock cycle Nt is provided for one CPU in order to guarantee the prescribed operation when executing a program, etc.,
In this way, the single-phase or multi-phase clock pulses output from the p-clock circuit are used to perform the operations of the p CPU. II is performed.

There is an upper and lower applicable range for each device, and it is usually within that range.
The calculation speed tL is determined based on the frequency of this clock pulse.

Problems with the Background Art An increase in the power consumption of electronic meters causes unnecessary heat generation in various parts of the integrated circuit, leading to a decrease in performance due to temperature fluctuations, so it is important to reduce power consumption as much as possible. This is an essential condition for computer circuit design.

% *In microcomputers that use extremely low capacity batteries such as silver oxide batteries, 0M is used to reduce power consumption JIIk.
O8 is sometimes used. 0MO8 has excellent low power consumption characteristics, but the power consumption during operation is 100 to 300 times the power consumption during non-operation, and as shown in Figure 1, it operates approximately in proportion to the operating frequency. Power consumption increases. For this reason, when operating the CB4O8 with a high-speed I4P clock, the line calculation speed becomes faster, but the operating power consumption is large and the low power consumption characteristic of the j9 CMOli cannot be fully demonstrated. Ta.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a four-channel A4 pulse control circuit capable of obtaining p-pulses with a frequency higher than normal according to control.

Summary of the Invention In response to requests from a plurality of microphone ambiators formed of the ljiFi CMO8 of the present invention, a high-speed clock signal is supplied to each microphone ambiator with a second frequency signal divided by the first frequency tube. The microcomputer is operated with the first frequency pulse only during a routine-in that requires a pulse, and the CMD is controlled during normal times.
Embodiment of the Invention An embodiment of the clock pulse control circuit according to the present invention will be described in detail along with one aspect thereof.

In the diagram C12, 1/a is a crystal oscillator, which sends out a reference clock pulse to the integrated clock I/R pulse distribution circuit 2.

A second clock/pulse divided from the first clock pulse A is supplied to the Ill clock pulse distributor 2 via the 3-minute M1 generator 3 to the 2-clock/4-pulse distributor 4. In addition, the switching circuit 81#8m...Sn normally open contact areal"
Distribute aBK@1 clock pulse.

The IR2 clock signal supplied from the second frequency divider 4hh frequency divider 3 is switched, and the switching circuit S is switched.

8, -8. Normally closed contact ble b=...bnK distribution.

Micro pump Q1. Qm...Q is the switching contact C1s of the switching circuit 81s81...S...@,
They are constantly supplied with two clocks/clock pulses from 1 and 2 to execute their respective predetermined tasks t'. In addition, when a task that requires high-speed sensing mt occurs, the clock pulse control line IJI #
Switching path 81#Sm...5 via Lll...Ln
n11-control and switching circuit 81e8 related to III#
Close the normally open contacts 1s 118...a of 1...8n, and switch the supplied 2nd clock I/4 pulses to the high speed 1st clock/4 pulses. If high-speed processing is required. When the task is finished, t! Butterfly returns to normal 1 [2 clock pulses.

Effects of the Invention The clock pulse system Wa path according to the present invention divides the clock pulse with a frequency of 111 and divides the second frequency opatzp) pulse into the first frequency pQ')/yf.
Since it has a switching means that switches to a clock pulse, a control means that controls all of this switching means, and a tA value, it has the feature that it can constantly operate circuits such as microcomputers made of cMOS integrated circuits with low-speed clock pulses. ing.

For this reason, it is possible to reduce the operating power consumption of the CMOB integrated circuit compared to the conventional one, and it is possible to reduce the operating power consumption of the CMOB integrated circuit compared to the conventional one.
By installing the Tsuku-1 bus control circuit, it is expected that the battery life will be extended.

[Brief explanation of drawings]

The first diagram is a graph of the clock pulse frequency and power consumption of the integrated circuit in C area S, and the m2 diagram is an example of the I clock/f pulse control circuit according to the present invention. This is Ron 2 diagram. In the figure, reference numeral 1 is a crystal oscillator, 2 is a first clock pulse distributor, 4 is a kite 2 clock pulse distributor, 81 to B is a switching circuit, Qt to Qnla microcomputer, L1
~Ln is a clock pulse control line.

Claims (1)

[Claims] In a CMO8 integrated circuit that operates with clock pulses,
a switching means for switching a clock pulse of a second frequency obtained by dividing a clock pulse of a first frequency to a clock/medium pulse of the first frequency; and a control means for controlling the switching means; Said island 1 switched according to
It is assumed that the CM08 integrated circuit is configured to operate with a 0 frequency non-polar pulse.