JPS62198544A - Wiring logical notation for aggregated wiring system - Google Patents

Wiring logical notation for aggregated wiring system

Info

Publication number
JPS62198544A
JPS62198544A JP3742586A JP3742586A JPS62198544A JP S62198544 A JPS62198544 A JP S62198544A JP 3742586 A JP3742586 A JP 3742586A JP 3742586 A JP3742586 A JP 3742586A JP S62198544 A JPS62198544 A JP S62198544A
Authority
JP
Japan
Prior art keywords
wiring
logical
data
expression
high
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3742586A
Inventor
Fumio Hamano
Akira Hasegawa
Zenichi Hirayama
Shigeru Obo
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3742586A priority Critical patent/JPS62198544A/en
Publication of JPS62198544A publication Critical patent/JPS62198544A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make a wiring logical expression have generality and expressible with a minimal expression method, simplify an alteration of high-speed processing, a logic addition, elimination, etc., as well as to render it inexpensive, besides high in reliability, by expressing wiring logic with an inverse Polish notation.
CONSTITUTION: In an inverse Polish notation, a right side of the conventional logical operation expression Y=X+Y comes to XY+, while the right side of y=(W+X)*(Y+Z) comes to WX+YZ+*. Therefore, logical development finding a logical expression to show wiring logic on the basis of a combination of the input data prestored in a memory is performable in succession in order of being high in precedence. As for the procedure, data retrieval of a distribution table is performed out of the first data, and when the data is an operator, the logical operation is made so as to be carried out. And, the retrieval is performed in order from a (n) address, and only when the operator is the case, operation to two adjacent on-bite data takes place. Therefore, processing efficiency is improved, and control software also can be made into a concise one.
COPYRIGHT: (C)1987,JPO&Japio
JP3742586A 1986-02-24 1986-02-24 Wiring logical notation for aggregated wiring system Pending JPS62198544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3742586A JPS62198544A (en) 1986-02-24 1986-02-24 Wiring logical notation for aggregated wiring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3742586A JPS62198544A (en) 1986-02-24 1986-02-24 Wiring logical notation for aggregated wiring system

Publications (1)

Publication Number Publication Date
JPS62198544A true JPS62198544A (en) 1987-09-02

Family

ID=12497164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3742586A Pending JPS62198544A (en) 1986-02-24 1986-02-24 Wiring logical notation for aggregated wiring system

Country Status (1)

Country Link
JP (1) JPS62198544A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993004896A1 (en) * 1991-09-03 1993-03-18 Nippondenso Co., Ltd. Control module assembly unit for mounting on vehicle

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414416A (en) * 1901-09-03 1995-05-09 Nippondenso Co., Ltd. Temperature dependent control module cluster unit for motor vehicle
WO1993004896A1 (en) * 1991-09-03 1993-03-18 Nippondenso Co., Ltd. Control module assembly unit for mounting on vehicle

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