JPS62233931A - Parallel serial converter - Google Patents

Abstract

PURPOSE:To realize the parallel/serial converting function and the serial/parallel function by providing a shift register, a latch circuit and a switching means so as to use a shift register. CONSTITUTION:The shift register 1, the latch circuit 2 latching the data set to each bit of the shift register and the switching circuit 3 switching whether the data latched in the latch circuit 2 is outputted as a parallel signal or each bit of the inputted parallel signal is set to each bit of the shift register, are provided. A serial signal is fed to an input stage of the shift register 1 and the data latched in the latch circuit 2 is outputted by operating the switching circuit 3 so as to realize the serial/parallel conversion function. Further, the parallel/serial function is realized by operating the switching circuit 3 so that each bit of the inputted parallel signal is set to each hit of the shift register 1.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a parallel-to-serial converter having two functions: converting a serial input into a parallel output and converting a parallel input into a serial output.

[Conventional technology]

Serial/parallel converters that convert serial input to parallel output or parallel/serial converters that convert parallel input to serial output are used in many digital devices. Incidentally, although these converters are generally integrated circuits, there has been no one equipped with both m functions.

[Problem that the invention seeks to solve]

As described above, in the past, one IC had only one of the functions of converting parallel input to serial output or converting serial input to parallel output, which caused the following problems.

In other words, when manufacturing digital equipment that requires converting parallel input to serial output and converting serial input to parallel output, two types of ICs must be prepared, which makes inventory management difficult. There is a problem that it becomes troublesome, and there is also a problem that if one of the ICs becomes insufficient, the production of the A device must be stopped.

The present invention solves the above-mentioned problems, and its purpose is to provide a single converter with the functions of converting parallel inputs into serial outputs and converting serial inputs into parallel outputs with an economical configuration. There is a particular thing.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention includes: (1) a shift register, (2) a latch circuit that launches the data sent to each bit of the secret shift register, and (2) connects the data latched in the latch circuit to a parallel signal. A switching means is provided for switching between outputting the input parallel signal as a signal and assigning each bit of the input parallel signal to each bit of the shift register.

[Effect]

Serial/
Parallel conversion function can be realized. Further, a parallel/serial function can be realized by operating a switching circuit so as to set each bit of an input parallel signal to each bit of a shift register.

〔Example〕

FIG. 1 is a block diagram of an embodiment of the present invention, and ■ is a block diagram of an embodiment of the present invention.
Shift register with bit configuration, 2 is launch circuit with 8-bit configuration, 3 is switching circuit, 11 to 18 are shift registers l
21 to 28 are D flip-flops that make up the latch circuit 2, 31 to 38 are tri-state buffers that make up the switching circuit 3, 41 is a serial input terminal to which a serial signal is manually input, and 42 is a clock. A clock terminal to which a signal is input, 43 a serial output terminal to which a serial signal is output, 44-1 to 44-8 a parallel input/output terminal to which parallel signals are input or output, 45 a switching signal input terminal, 46 is a strobe terminal to which a strobe signal is input.

When the circuit shown in the figure is operated as a parallel/serial converter, the switching signal applied to the switching signal input terminal 45 is set to "1", and when operated as a serial/parallel converter, the switching signal is set to "0". The operation in each case is as follows. (11 When operating as a parallel/serial converter, by setting the switching signal applied to the switching signal input terminal 45 to "L", the b sides of the tri-state buffers 31 to 38 forming the switching circuit 3 are turned on, so By adding each bit of the parallel signal to the parallel input/output terminals 44-1 to 44-8, each bit of the parallel signal is shifted i.
・D flip-flops 11 to 18 forming register 1
, shifted in synchronization with the clock signal applied to the clock terminal 42, and output one bit at a time from the serial output terminal 43.

(2) When operating as a serial/parallel converter By setting the switching signal applied to the switching signal input terminal 45 to "0", the a sides of the tri-state buffers 31 to 38 forming the switching circuit 3 are turned on.

When a serial signal is applied to the serial input terminal 41 in this state, each bit of the serial signal is sequentially shifted by a clock signal synchronized with the serial signal. By setting the strobe signal applied to the strobe terminal 46 to "1" at the timing when the first bit of the serial signal is sectored to the D flip-flop 18 constituting the shift register 1, the serial signal set in the shift register 1 is set to "1". Each bit of the signal is set in the D flip-flops 21 to 28 that constitute the latch circuit 2, and the Q terminal output is sent to the parallel input/output terminals 44-1 to 44-8 via the a side of the tristate buffers 31 to 38. Output.

FIG. 2 is a block diagram of another embodiment of the present invention, 51
52 is an 8-bit launch circuit, and 53 and 54 are switch circuits. When one is in the on state, the other is in the off state. Further, 55 is a serial output terminal that outputs a serial signal;
56 is a clock terminal, 57 is a serial input terminal to which a serial signal is applied, 58 is a switching signal input terminal, 59 is a strobe terminal, 60 is a parallel output terminal, and 61 is a parallel input terminal.

When the circuit shown in the figure is operated as a parallel/serial converter, the switching signal applied to the switching signal input terminal 58 is set to "1", and when operated as a serial/parallel converter, the switching signal is set to "0". The operation in each case is as follows.

When operating as a +11 parallel/serial converter, the switch circuit 54 is turned on by setting the switching signal to "1", so by adding the two parallel signals to the parallel input terminal 61, each bit of the parallel signal is transferred to the shift register 51. is set in each bit and shifted in synchronization with a clock signal applied to the clock terminal 56,
The serial output terminal 55 outputs l bits at a time.

(2) When operating as a serial/parallel converter By setting the switching signal to "O", the switch circuit 53 is turned on. In this state, serial input terminal 5
When a serial signal is added to 7, each bit of the serial signal is sequentially shifted by a clock signal synchronized with the serial signal. By setting the strobe signal applied to the strobe terminal 59 to "1" at the time when the first bit of the serial signal reaches the output stage of the shift register 51, the shift signal set in each bit of the shift register 51 is Each bit is latched by the latch circuit 52 and output to the parallel output terminal 60 via the switch circuit 53.

〔Effect of the invention〕

As explained above, according to the present invention, parallel/serial conversion and serial/parallel conversion can be performed with one converter. It is now possible to manufacture digital equipment, which was previously not possible, by simply preparing one type of converter, which has the advantage of simplifying inventory management. Furthermore, since the present invention realizes the parallel/serial conversion function and the serial/parallel function using one shift register, there is an advantage that the converter can be constructed economically. Therefore, if the converter of the present invention is integrated into an IC, it will be very effective.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the invention, and FIG. 2 is a block diagram of another embodiment of the invention. In the figure, 1.51...shift register, 2.52
...Latch circuit, 3...Switching circuit, 11-18.2
1-28...D flip-flop, 31-38...
Tri-state buffer, 53.54... switch circuit.

Claims (1)

[Claims] A shift register, a latch circuit that latches data set in each bit of the shift register, and outputs the data latched to the latch circuit as a parallel signal, or outputs each input parallel signal as a parallel signal. 1. A parallel-to-serial converter comprising: switching means for switching whether a bit is set in each bit of the shift register.