JPS62192793A - Display control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a one-display control technique and a technique that is particularly effective when applied to the display of horizontally reversed characters.

For example, the present invention relates to a technique that is effective when used in a liquid crystal controller driver that drives a dot matrix type liquid crystal display device.

[Prior Art] A liquid crystal display controller driver (hereinafter referred to as a liquid crystal controller) implemented as an LSI (large scale integrated circuit) for controlling and driving a dot matrix type liquid crystal display device.
For example, a display data RAM (random access memory) that internally stores display data as a code, and a character generator RO that forms a display pattern based on the code read from the display data RAM.
M (read-only memory), and the parallel data read from this character generator ROM was converted into serial data and sent to the liquid crystal drive circuit to be displayed on the display panel of the liquid crystal display device. There is something (published by Hitachi, Ltd. in March 1982)
Hitachi MO3LSI Data Book L CD Driver LS
IJ, pages 52-85).

[Problems to be solved by the invention] In the above liquid crystal controller, when it is necessary to display horizontally reversed characters, 1.
Separately from the SI (Large-Scale Integrated Circuit), for example, an LSI (Character Generator) for displaying horizontally reversed characters
Requires.

The above and other objects and novel features of the present invention will become clear from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

In other words, an address counter that counts to increase or decrease the address for reading the character code stored in the display data RAM and a character pattern data stored in the character generator memory are taken in parallel and the data is processed. Receives a control signal that controls whether to transmit from the forward or reverse direction,
A bidirectional shift register is provided that outputs serial data capable of displaying normal characters or serial data capable of displaying horizontally inverted characters.

[Operation] According to the above-mentioned means, parallel data for one raster of a normal character pattern read from the character generator memory and taken into the bidirectional shift register is sequentially arranged so that the data arrangement is exactly opposite. , can be sent from a bidirectional shift register, thereby achieving the above object of being able to display normal display characters and horizontally inverted characters with one character generator LSI.

[Embodiment] FIG. 1 shows an embodiment in which the present invention is applied to a liquid crystal controller LSI.

Although not particularly limited, each circuit block surrounded by a two-dot chain line A in the figure is formed on one semiconductor chip such as a single crystal silicon substrate.

In FIG. 1, one circuit cylinder No. 1 indicates display data R that can be read and written at any time and stores display data displayed on a display panel of a liquid crystal display device (not shown).
It is AM. This display data RAM is designed to have a capacity capable of storing, for example, 80 characters indicated by an 8-bit code.

This display data RAM 1 is configured to have data written from the terminal Din. What is shown in the 6-circuit tube number 2 is data corresponding to a character code read from the display data RAM 1, for example.

(5×7) This is a read-only character generator ROM in which character patterns such as those displayed as dots are stored. This character generator ROM
is supplied with a raster address designation signal LA for designating a raster address.

Although not particularly limited, in this embodiment, in addition to the character generator ROM 2, a character generator RAM is provided in which the user can specify an arbitrary pattern and register the pattern, and data can be written from the terminal Din. It is done.

The circuit designated by reference numeral 4 is an address counter for setting addresses when writing and reading data. This address counter is operated by a count operation instruction signal φ supplied from the control circuit 10.

Further, this address counter 4 is configured such that the address is set to 1 by the counter control signal C1 supplied from the control circuit 10.
It is operated to increase (up count) or decrease (down count) one by one. Although not particularly limited,
The address counter 4 is configured to count down when the counter control signal C1 is at a high level, and to count up when it is at a low level. Also, there are no particular restrictions.

When the counter control signal C1 is set to high level and the address counter 4 is in a down-counting operation, the character string displayed on the dot matrix liquid crystal display panel 20 is read from the character generator ROM 2 or the character generator RAM 3. They are arranged in order from right to left. As a result, A appears on the display screen.

B, C...'' are displayed in the regular order.

- The circuit designated by numeral 5 is a bidirectional shift register. This bidirectional shift register.

Timing signal φ2 for giving timing to take in parallel data read from character generator ROM2 or character generator RAM3
is supplied. Further, a shift signal φ for sequentially shifting the captured data and a shift direction control signal C2 for instructing the shift direction in the shift register 5 are supplied from the control circuit 10.

Although not particularly limited, in this embodiment, the shift direction control signal C2 is set to a low level when displaying horizontally inverted characters, and is set to a high level when displaying normal characters.

The circuit designated by 6 selects whether the serial data of the bidirectional shift register 5 is sent out via path (a) or path (b). That is, it is a multiplexer circuit for selecting whether to send right shift data or left shift data.

This multiplexer circuit 6 is controlled by a shift direction control signal C2 sent from a control circuit 10.

The circuit number 7 is, for example, a shift register composed of 80 bits. This shift register 7 is configured to drive the segment driver 8 with the serial data sent out from the multiplexer circuit 6 when, for example, 80 bits are taken in. Then, each dot is displayed on the dot matrix liquid crystal display panel using the selected segment signal and common signal.

Now, if you knock it down, you should reverse the arrangement of the characters "rABCDE..." (for example, in the case of the characters r13J, the third
As shown in Figure (b)), the character arrangement may be exactly the opposite ([...EDCBAJ order.

However, if it is desired that each character be left and right reversed, such display control is performed as follows. First, the count operation instruction signal φ1 is supplied from the control circuit 10 to the counter circuit 4, and the counter control signal C1 is set to a low level.

This starts an up-run I- in which the addresses are incremented by one, as shown in FIG. 2CB>. Then, the character codes cco, cc, . . . in the display data RAM 1 corresponding to addresses 0, 1, 2°, .
cc, . . . -CC7g are read. Next, a character pattern to be displayed on the display panel corresponding to this character code is read out from the character generator ROM2. For example, in the case of the character code CC, ., the character pattern "B" as shown in FIG. 3(a) is read out from the character generator ROM2. Then, one raster worth of data (8 bits) of the read character pattern rBJ is sent to the timing signal φ sent from the control circuit 10.
2 is taken into the bidirectional shift register 5. Next, in order to display horizontally inverted characters, the shift direction control signal C2 sent from the control circuit 10 is set to a low level. Further, the control circuit 10 sends out a shift signal φ.

In this embodiment, the bidirectional shift register 5 is provided with 3 bits for spacing the displayed characters, and consists of 8 bits in total. Therefore, Fig. 2 (f
), eight shift signals φ3 are sent out from the control circuit 10 for one character pattern. As a result, one raster's worth of pattern data is passed from the bidirectional shift register 5 through the path (b) to the multiplexer circuit 6.
The signal is taken into the shift register 7 via the . After this operation is repeated and 80 bits (10 characters) of the first raster data are loaded into the shift register 7, the data is synchronized with the segment driver data loading control signal φ sent from the control circuit 10. The data is then latched by a latch circuit in a segment driver (not shown), and the segment driver is driven by the latched data.

As a result, the first raster for 10 characters is displayed on the dot matrix liquid crystal display panel using the selected segment signal and common signal. By performing this operation up to the seventh raster based on the raster address instruction signal LA sent out from the address counter 4.

The arrangement is reversed, and the left and right of each character is reversed.
. . . are displayed on the dot matrix liquid crystal display panel 20 in a reverse order to the normal order, such as EDCBAJ.

Furthermore, in this embodiment, when the counter control signal C1 sent from the control circuit 10 is set to low level and the address counter 4 is in an up-counting operation,
By setting the bidirectional shift register control signal C2 to a high level and performing a left shift operation, each character can be horizontally inverted and displayed without changing the order of the character patterns read from the character generator ROM2 or character generator RAM3.

In the above, a bidirectional shift register that shifts parallel data read from a character generator memory in the forward or reverse direction and sequentially outputs it serially,
By providing a control circuit that outputs a control signal to control this, the arrangement of the parallel data of each character read from the character generator memory can be reversed, allowing normal display with one character generator. The effect of displaying characters and characters obtained by horizontally reversing normal display characters can be obtained.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above Examples, and the gist thereof can be changed in various ways without departing from the gist. Needless to say. For example, in the above embodiment, when reversing the arrangement of character strings, the operation of the address counter 4 was switched from down-counting to up-counting. It is also possible to configure the shift register 7 as a bidirectional shift register and use this to reverse the direction in which character data is output, thereby reversing the order of displayed character strings.

In the above explanation, the invention made by the present inventor was mainly applied to a liquid crystal controller driver that drives a dot matrix type liquid crystal display device, which is the field of application in which the invention was made, but the invention is not limited to this. For example, the present invention can be used in a display control device that controls a raster type display device such as a CRT display device.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, normal display characters and their horizontally reversed characters can be displayed on a dot matrix liquid crystal display panel using pattern data from one character generator.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention applied to a liquid crystal controller LSI, FIG. 2 is a timing chart of the block diagram shown in FIG. 1, and FIG. 3(a) is a display FIG. 3(b) is an explanatory diagram showing a normal character pattern displayed on the panel. FIG. 3(b) is an explanatory diagram showing a horizontally reversed character pattern of FIG. 1...Display data RAM, 2...Character generator ROM, 3...Character generator RAM, 4...Address counter, 5...Bidirectional shift register, 6... multiplexer circuit, 7
Shift register, 8 Segment driver, 9 Common electrode drive circuit, 10 Control circuit, 20 Dot matrix liquid crystal display panel,
C... Counter control signal, C2... Shift direction control signal, φ□... Count operation instruction signal, φ2
...Timing signal, φ, ...Shift signal, φ
,...Segment driver data acquisition signal, LA・
...Rask address instruction signal. (a-) ■■shi diagram

Claims (1)

[Scope of Claims] A display control system including a display control device that outputs a display data signal to be supplied to a one- and two-dimensional display device, wherein the display control device outputs a display data signal to be supplied to a two-dimensional display device. a display data memory for storing display data to be displayed in the form of a code; an address counter forming address data for such display data memory; and a corresponding display data memory based on the code read from said display data memory. Character generator that generates display patterns
It consists of a memory and a shift register that takes in the character pattern read from the character generator memory and outputs it sequentially.The shift register is a bidirectional type that can sequentially output from the forward or reverse direction depending on the control signal. A display control system comprising a shift register. 2. Claims characterized in that the address counter is capable of a counting operation such that the address for reading the display data/memory is sequentially increased or decreased in accordance with the shift direction in the shift register. The display control system according to item 1.