JPS62192670U - - Google Patents

Info

Publication number
JPS62192670U
JPS62192670U JP8053186U JP8053186U JPS62192670U JP S62192670 U JPS62192670 U JP S62192670U JP 8053186 U JP8053186 U JP 8053186U JP 8053186 U JP8053186 U JP 8053186U JP S62192670 U JPS62192670 U JP S62192670U
Authority
JP
Japan
Prior art keywords
pattern
element electrode
soldered
board
wired
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8053186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8053186U priority Critical patent/JPS62192670U/ja
Publication of JPS62192670U publication Critical patent/JPS62192670U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案実施例の配線基板パターン図。 1はチツプ部品、2はチツプ部品電極端子、3
は基板はんだ付パターン、4は配線ライン。 第2図は従来例の基板パターン図。第3図は本
考案の実施例配線パターン図。5はチツプ部品の
下に設けられる配線ラインである。第4図は従来
例のはんだ付パターンの改善図。
FIG. 1 is a wiring board pattern diagram of an embodiment of the present invention. 1 is a chip component, 2 is a chip component electrode terminal, 3
is the board soldering pattern, and 4 is the wiring line. FIG. 2 is a diagram of a conventional board pattern. FIG. 3 is a wiring pattern diagram of an embodiment of the present invention. 5 is a wiring line provided under the chip component. Fig. 4 is an improved view of the conventional soldering pattern.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 素子電極2を基板パターン3上に重ねて装着し
、上記素子電極2と、パターン3をはんだ付して
配線されるようにされた基板において、素子電極
形状2に比べて上記はんだ付されるパターン3の
面積が小さくされたことを特徴とする配線基板。
In a board in which the element electrode 2 is mounted over the substrate pattern 3 and the element electrode 2 and the pattern 3 are soldered and wired, the pattern to be soldered is compared to the element electrode shape 2. A wiring board characterized in that the area of item 3 is reduced.
JP8053186U 1986-05-28 1986-05-28 Pending JPS62192670U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8053186U JPS62192670U (en) 1986-05-28 1986-05-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8053186U JPS62192670U (en) 1986-05-28 1986-05-28

Publications (1)

Publication Number Publication Date
JPS62192670U true JPS62192670U (en) 1987-12-08

Family

ID=30931419

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8053186U Pending JPS62192670U (en) 1986-05-28 1986-05-28

Country Status (1)

Country Link
JP (1) JPS62192670U (en)

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