JPS62190537A - Program execution monitor method - Google Patents

Program execution monitor method

Info

Publication number
JPS62190537A
JPS62190537A JP61033280A JP3328086A JPS62190537A JP S62190537 A JPS62190537 A JP S62190537A JP 61033280 A JP61033280 A JP 61033280A JP 3328086 A JP3328086 A JP 3328086A JP S62190537 A JPS62190537 A JP S62190537A
Authority
JP
Japan
Prior art keywords
execution
address
micro instruction
instruction code
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61033280A
Other languages
Japanese (ja)
Inventor
Kazuhito Furukawa
古川　和仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61033280A priority Critical patent/JPS62190537A/en
Publication of JPS62190537A publication Critical patent/JPS62190537A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To easily check an executed micro instruction code and an execution address by setting plural conditions for micro instruction execution monitor. CONSTITUTION:The execution address and the execution condition of a micro instruction are set to an address register 10 and a status register 11. In case a microprogram is executed in an MPU12, the execution micro instruction code is compared with the set address by a comparing circuit 13. A comparing circuit 14 compares the set condition of the register 11 with the execution micro instruction code outputted from the CPU12 and additional information. The execution address and the execution micro instruction code outputted by circuits 13 and 14 are outputted in accordance with a monitor enable signal SE. If set conditions of registers 10, and 11 are satisfied together, an FF15 is set. Output information of the FF15 is outputted as an interrupt signal INT to the MPU12 to stop the MPU12, and the execution address and the micro instruction code at the execution time are checked.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、プログラム実行監視方法、特に、マイクロプ
ログラムの実行処理における実行時のマイクロ命令実行
を監視するプログラム実行監視方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a program execution monitoring method, and particularly to a program execution monitoring method for monitoring the execution of microinstructions during execution of a microprogram.

〔従来の技術〕[Conventional technology]

従来のプログラム実行監視方法は、マイクロプログラム
のルーチンに実行処理検出用のルーチンを組み込んでプ
ログラムが処理されたかどうか検査を行っていた。In conventional program execution monitoring methods, a routine for detecting execution processing is incorporated into a microprogram routine to check whether the program has been processed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、このような上述した従来のプログラム実
行監視方法は、検出用のルーチンを組込んで、特定アド
レスを参照し、実行きれたかどうか検査しなけｎばなら
なりという欠点があった。However, the above-mentioned conventional program execution monitoring method has the drawback that it requires a detection routine to be incorporated, refer to a specific address, and check whether the program has been executed successfully.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のプログラム実行監視方法は、マイクロ命令が実
行されるときの実行先あるいは実行先のアドレスになる
ための複合条件をあらかじめ設定することにより処理プ
ログラムを実行させたときセットされたルーチンが実行
されたかどうか監視するように構成さｎる。In the program execution monitoring method of the present invention, a set routine is executed when a processing program is executed by setting in advance a complex condition that becomes an execution destination or an execution destination address when a microinstruction is executed. configured to monitor whether the

〔実施例〕〔Example〕

次に、本発明の実施例について、図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.

第１図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

第１図に示すプログラム実行監視方法において、アドレ
スレジスタ１０にはマイクロ命令の実行アドレスをセッ
トし、ステータスレジスタ１１にはマイクロ命令の実行
条件、（例えば複合ＪＭＰ命令の実行条件値）をそれぞ
れセットしておく。In the program execution monitoring method shown in FIG. 1, the execution address of a microinstruction is set in the address register 10, and the execution condition of the microinstruction (for example, the execution condition value of a compound JMP instruction) is set in the status register 11. I'll keep it.

ｉｔを介して比較回路１３に出力され設定したアドレス
と比較される。比較回路１４ではステータスレジスタ１
１に設定された条件（例えばフラグ状態）とＭＰＵ１２
からデータバス１２−２に出力さｎる実行マイクロ命令
コードと付加情報を比較し、一致した場合実行マイクロ
命令コードが出力される。It is output to the comparison circuit 13 via it and compared with the set address. In the comparison circuit 14, status register 1
Conditions set to 1 (for example, flag state) and MPU 12
The execution microinstruction code outputted from n to the data bus 12-2 is compared with the additional information, and if they match, the execution microinstruction code is output.

比較回路１３および比較回路１４で出力さｎた実行アド
レスおよび実行マイクロ命令コードは、監視イネーブル
信号ＳＥに従って出力される。このとき、アドレスレジ
スタ１０の設定条件とステータスレジスタ１１の設定条
件とがともに満たされた場合、フリップ７０ツブ１５が
セットされる。The execution address and execution microinstruction code output by comparison circuit 13 and comparison circuit 14 are output in accordance with monitor enable signal SE. At this time, if both the setting conditions of the address register 10 and the setting conditions of the status register 11 are satisfied, the flip 70 knob 15 is set.

７リツプフロツプ１５からの出力情報は割込信号ＩＮＴ
としてＭＰＵ１２に出力さＡＭＰＵ１２の停止を行い実
行時の実行アドレスとマイクロ命令コードを検査するこ
とができる。The output information from the 7-lip flop 15 is the interrupt signal INT.
It is possible to stop the AMPU 12 and inspect the execution address and microinstruction code at the time of execution.

また、リセット信号Ｒ８の入力により、７リツグ７０ツ
ブ１５がリセットされＭＰＵ１２の割込が解除されて再
度前記の処理が繰り返される。Furthermore, by inputting the reset signal R8, the 7 rigs 70 tubs 15 are reset, the interrupt of the MPU 12 is canceled, and the above-mentioned processing is repeated again.

〔発明の効果〕〔Effect of the invention〕

本発明のプログラム実行監視方法は、マイクロ命令実行
監視用の条件を複数個設定しておくことにより、設定条
件に従って実行されたマイクロ命令コードと実行アドレ
スとを容易に検査できるという効果がある。The program execution monitoring method of the present invention has the advantage that by setting a plurality of conditions for microinstruction execution monitoring, the microinstruction code and execution address executed according to the set conditions can be easily inspected.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の一実施例を示すブロック図である。 １０・・・・・・アドレスレジスタ、１１・・・・・・
ステー　１’スレジスタ、１２・・・・・・ＭＰＵ、１
３．１４・・・・・・比較回路、１５・・・・・・７リ
ツプフロツプ、１２−ｔ・・・・・・アドレスバス、１
２−２・・・・・・データバス、ＳＥ・・・・・・監視
イネーブル信号、Ｒ８・・・・・・リセット信号、ＩＮ
Ｔ・・・・・・割込信号。 万１図FIG. 1 is a block diagram showing one embodiment of the present invention. 10...Address register, 11...
Status 1'Status register, 12...MPU, 1
3.14...Comparison circuit, 15...7 lip-flop, 12-t...Address bus, 1
2-2...Data bus, SE...Monitoring enable signal, R8...Reset signal, IN
T...Interrupt signal. 10,000 figures

Claims (1)

【特許請求の範囲】[Claims] 監視用レジスタを設け、監視用レジスタにマイクロ命令
実行の複合条件をセットし、プログラム実行時に設定条
件に従って割込信号を出力してプログラム実行を停止し
、実行アドレスを検査することを特徴とするプログラム
実行監視方法。A program characterized in that a monitoring register is provided, a complex condition for microinstruction execution is set in the monitoring register, and when the program is executed, an interrupt signal is output according to the set conditions to stop program execution and an execution address is inspected. Execution monitoring method.
JP61033280A 1986-02-17 1986-02-17 Program execution monitor method Pending JPS62190537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61033280A JPS62190537A (en) 1986-02-17 1986-02-17 Program execution monitor method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61033280A JPS62190537A (en) 1986-02-17 1986-02-17 Program execution monitor method

Publications (1)

Publication Number Publication Date
JPS62190537A true JPS62190537A (en) 1987-08-20

Family

ID=12382113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61033280A Pending JPS62190537A (en) 1986-02-17 1986-02-17 Program execution monitor method

Country Status (1)

Country Link
JP (1) JPS62190537A (en)

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