JPS6218848A - Data transmitter - Google Patents

Abstract

PURPOSE:To constitution an interface between devices which have a computer internally to be connected and to reduce the cost of a transmitter by connecting respective input/output means with the same functions of the devices by the same buses. CONSTITUTION:A device 1 which has a computer internally is provided with an input port 2a and an output port 26 for a /REQ signal (data transmission request signal), an input port 3a and an output port 3b for an RDY signal (data reception preparation signal), an input port 4a and an output port 4b for a /STB signal (data transmission signal), and an input port 5a and an output port 5b for an ACK signal (data reception acknowledge signal). The corresponding input/output parts of this device 1 and a device 5 having the same functions are connected mutually by buses 16-23. The device 15 makes the RDY signal into inactive w1 to read final data and then makes the ACK signal into active y1. The device 15, on the other hand, reads said data and then judges whether there is an error in transmission or not.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transmission device for transmitting data between devices equipped with computers.

[Prior art]

Conventionally, the standard digital bus IEEE-488 has been used to transmit data between devices equipped with computers.

However, the above-mentioned bus is a general-purpose bus for measuring instruments, and requires a large number of types of control signals, such as eight types, resulting in a complex logical configuration. For this reason, it has disadvantages such as increasing the cost of devices using the above-mentioned bus.

[Purpose of the invention]

The present invention has been made in consideration of the above conventional problems, and by simplifying the logical configuration, it is possible to easily configure an interface between connected devices and to promote cost reduction. A further object of the present invention is to provide a data transmission device that can perform highly reliable data transmission.

[Structure of the invention]

The data transmission device of the present invention includes input/output means for sending a data sending request signal to a plurality of devices having internal computers to request exclusive use of a bus, and input/output means for sending a data acceptance preparation signal to notify completion of data acceptance preparation. , an input/output means for a data transmission signal that notifies data transmission, and an input/output means for a data reception recognition signal that notifies data reception and whose voltage changes depending on whether the data transmission is correct or incorrect, and which has the same function as that of the plurality of devices described above. The invention is characterized in that the respective input/output means having the above are connected to each other through the same bus, so that reliability in data transmission can be improved and costs can be reduced.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

The device 1 with a built-in computer has a /REQ signal (
data transmission request signal) input port 2a and output port 2
b. Input port 3a and output port 1-3b for RDY signal (data acceptance preparation signal), input port 4a and output port 4b for /STB signal (data sending signal), and input port for ACK signal (data reception acknowledgment signal) -) 5a and an output port 5b. Each of the input ports for the four types of control signals has an impark buffer configured by an inverter 6, and each output port has an open collector output by a transistor 7. The connection between the input terminal of the inverter 6 of the input port 2a and the collector of the transistor 7 of the output port 2b is a /REQ input/output input/output section 8, and similarly, the RD
Y input/output unit 9, /STB input/output input/output and 10CK input/output unit 11 are provided. Also, data D0 is stored in device 1.
・Dl・D2 ・D3 input port 12..., output port 13... and each input port 12 and output port 1
A data input/output unit 14 . The device 1 described above has a device 15 having the same function as the device 1, and the corresponding human output units are connected to each other by buses 16 to 23.

The above-mentioned buses 16 to 23 are connected to a composite resistor 24, and the voltage is pulled up to 5cm by this composite resistor 24. Therefore, the voltage of the buses 16 to 23 is usually H.
4gh level, and when the control signal of any one of the devices 1 and 15 becomes Low level, the voltage of that bus becomes Low level.

In the above configuration, the /REQ signal is transmitted from the bus 20 to 23 from the device that sends data (device 1 here).
This is a request signal requesting exclusive use of the active L
It is OW. The RDY signal is a ready signal indicating completion of data acceptance from a data receiving device (device 15 here), and is active H4gh. /ST
The B signal is a strobe signal that indicates that data has been sent from the device 1 to the buses 20 to 23, and is active Low. The ACK signal is sent to the bus 20 by the device 15.
This is an acknowledge signal indicating that data has been accepted from 23, and is active High.

The data transmission process from the device 1 to the device 15 is performed in a second manner.
To explain with a diagram, when data is sent from the device 1 to the buses 20 to 23, the /REQ signal in the device 1 is inactive C and the /STB signal is inactive b 61! The /REQ signal is made active. When the device 15 detects that the /REQ signal becomes active e, the ACK signal becomes inactive g. Further, in the device 15, when data acceptance 'J=ON is completed, the RDY signal is made active r. In the device 1, when the RDY signal is active f and the ACK signal is inactive h, data transmission is started.
The /STB signal is made active (these operations are considered response operations). The device 15 confirms that the /STB signal is active, sets the RDY signal to inactive i, reads the data D0 to D3, and sets the ACK signal to active β. Here, if other devices similar to the device 15 that receive data other than the device 15 are connected to the buses 16 to 23, all the devices that receive the data have completed reading the data. However, only when the ACK signal is set to active p, the ACK signal on the bus 19 becomes active l. That is, the data transmission from the device 1 is asynchronous and is performed reliably regardless of the processing speed of the device receiving the data. When the device 15 completes reading the data and is ready to read the next data, the RDY signal becomes active q. In the above device 1, after confirming that the ACK signal is active m, the /STB signal is made inactive n. In the device 15, after confirming that the /STB signal is inactive O, the ACK signal is made inactive P, thereby completing the sending and reading of one unit of data between the devices 1 and 15. Furthermore, if there is data to be sent from the device 1, the /REQ signal is kept active r, and the operations after the response operation ① are repeated. On the other hand, when data transmission from the device 1 is terminated, the /STB signal of the last transmitted data is made active t, and at the same time the /REQ signal is made inactive S1. When the device 15 detects that the /STB signal is active (1) and the /REQ signal is inactive (U), it determines that data transmission has ended. As a result, in the device 15, the RDY signal is made inactive W1, the last data is read, and then the ACK signal is made active yI. In the device 15, after reading the data, it is determined whether the data transmission is correct or not, and the following operations are performed depending on the result. That is, when the data is positive, the ACK signal is maintained at active y, as shown in ■.
The RDY signal is made active Z. On the other hand, if the data is incorrect, as shown in (3), the RDY signal is made active z2, and at the same time, the ACK signal is made inactive y3. That is, if even one of the transmitted data is erroneous, the ACK signal is made inactive y3, and the apparatus 1 is notified of the erroneous data transmission. In the device 1, the correctness of data transmission is confirmed by reading the ACK signal when the RDY signal sent from the device 2 is activated z2. In the device 1, when the reading of the ACK signal is finished, /STB
The signal is made inactive*. When the device 15 confirms that the /STB signal of the device 1 is made inactive*, the ACK signal is made active #,
The response operation between the devices 1 and 2 is completed.

In this embodiment, the data bus consisting of buses 20 to 23 uses a 3-state output port and a TTL level input port, which further simplifies the circuit. Further, in the above embodiment, connection between two devices each having a computer inside was shown, but even if the number of the above devices increases, they can be connected to each bus as in the above embodiment. It is possible to transmit data to the device and respond to the transmitted data.

〔Effect of the invention〕

As described above, the data transmission device of the present invention controls data transmission using four types of control signals: a data transmission request signal, a data acceptance signal, a data transmission signal, and a data reception acknowledgment signal. The configuration is such that a reception recognition signal notifies the correctness or incorrectness of data transmission. This simplifies the logical configuration for controlling data transmission between a plurality of devices each having an internal computer. For this reason, the number of buses for transmitting the control signals is also four, which can be achieved by a small number of buses and can promote cost reduction. Further, it is possible to easily configure an interface between devices equipped with the computer, and even if the number of devices connected to the data transmission device increases, the interface can be handled without changing the interface. , a highly reliable device is provided with a function to determine whether the transmitted data is correct or incorrect.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2(a)
and (b) are time charts of each control signal during data transmission in the data transmission device shown in Figure 1 and when the transmitted data is positive, and each of the above controls when the transmitted data is incorrect. This is the signal time chart 1. 1 and 15 are devices, 2a, 3a, 4a, 5a, and 12 are input ports, and 2b, 3b, 4b, 5b, and 13 are output ports,
6 is an inverter, 7 is a transistor, 16 to 23 are buses, and 24 is a composite resistor.

Claims (1)

[Scope of Claims] 1. Input/output means for sending a data transmission request signal requesting exclusive use of a bus to a plurality of devices each having a computer therein, and input/output means for sending a data acceptance preparation signal to inform a plurality of devices that the preparation for accepting data is completed. , comprising an input/output means for a data sending signal that notifies the sending of data, and an input/output means for a data reception recognition signal that notifies the reception of data and whose voltage changes depending on whether the data transmission is correct or incorrect, and has the same function as the plurality of devices described above. 1. A data transmission device, characterized in that input/output means each having a plurality of input/output means are connected to each other by the same bus. 2. The data transmission device according to claim 1, wherein the bus is pulled up to a predetermined voltage.