CN115658585A

CN115658585A - Master-slave alternative SPI communication method, master device, slave device and system

Info

Publication number: CN115658585A
Application number: CN202211375626.1A
Authority: CN
Inventors: 闫鸣生; 王冠; 安刚; 任昭晶
Original assignee: BEIJING JN TASS TECHNOLOGY CO LTD
Current assignee: BEIJING JN TASS TECHNOLOGY CO LTD
Priority date: 2022-11-04
Filing date: 2022-11-04
Publication date: 2023-01-31

Abstract

The invention provides a master-slave alternative SPI communication method, master equipment, slave equipment and a system, wherein the SPI mode of the master equipment is set as a master mode, the SPI mode of the slave equipment is set as a slave mode, and the master equipment sends commands/data to the slave equipment when the SPI mode of the master equipment is the master mode and the SPI mode of the slave equipment is the slave mode; the slave equipment receives and executes the command/data sent by the master equipment to generate response/data; and setting the SPI mode of the slave equipment as a master mode, setting the SPI mode of the master equipment as a slave mode, and actively sending response/data to the master equipment by the slave equipment when the SPI mode of the slave equipment is the master mode and the SPI mode of the master equipment is the slave mode. The invention greatly reduces the waiting time of the master device and improves the data transmission efficiency between the master device and the slave device.

Description

Master-slave alternative SPI communication method, master device, slave device and system

Technical Field

The present application relates to the field of information communication, and in particular, to a master-slave alternative SPI communication method, master device, slave device, and system.

Background

The SPI is a 4-wire peripheral interface commonly used by a microcomputer (single chip microcomputer), and the main form of the SPI is divided into a master mode and a slave mode, wherein the master mode is a master mode, and the slave mode is a passive mode. For standard SPI, as shown in fig. 1, a master device and a slave device are connected through 4 SPI signal lines to implement data transmission and exchange, and the main functions are shown in table 1:

TABLE 1

Signal line	Signal name	Master device	Slave device	Description of the invention
					1	SPI_SS	Output the output	Input the method	Transmitting useful signals
2	SPI_CLK	Output the output	Input the method	Transmission clock
					3	SPI_MOSI	Output of	Input the method	Master data output
4	SPI_MISO	Input the method	Output of	Master data input

Chip selection (SS): the master side (main side) outputs to indicate that the SPI is effective and the low level is effective; the passive side (slave side) starts and ends working according to the chip selection signal;

clock (CLK): the master (master) outputs a clock; the passive side (slave side) receives or sends data according to the clock;

data line MOSI (master-slave-in): master (master) data output; passive side (slave) data entry; data valid is aligned with a Clock (CLK);

data line MISO (master in slave out): master (master) data entry; passive (slave) data output; the data is effectively aligned with the Clock (CLK).

Features of the standard SPI include:

(1) The SPI is divided into a master and a slave, the master device is a master, and the master device is an active initiating end whether reading/writing/reading while writing. The slave device is a passive side, and the read/write/read-while-write can be completed only by initiating access by the master device.

(2) In the structure of command-response and return result, especially in the case of uncertain command execution time and large time difference, as shown in fig. 2, the structure has a great disadvantage:

the first step is as follows: the master equipment initiates a command, and the slave equipment receives the command;

the second step is that: the master device waits for the slave device to execute the command until the command of the slave device is completed;

the third step: the master device initiates a read result, and the slave device outputs a command execution result.

In the above-described command-response and return-to-result architecture, the second step requires the master to wait for the slave to execute the command, but generally waits for the maximum execution time due to uncertainty in execution time. When the waiting time is up, the result can be sent to the third step. If the latency is not sufficient, the command has not been processed to completion, resulting in an erroneous result.

In contrast to the above-mentioned structure of command-response and result return, another way is to continuously initiate the query SPI command during the waiting period, and simultaneously to complete the query SPI command, and once the query result is complete, initiate the third step, as shown in fig. 3. The advantage is that it does not wait for the longest time, and the disadvantage is that the query itself will also affect the command execution of the slave device, resulting in a prolonged command execution time.

Disclosure of Invention

In order to solve one of the above technical problems, the present invention provides a master-slave alternate SPI communication method, a master device, a slave device, and a system.

The first aspect of the embodiments of the present invention provides a master-slave alternate SPI communication method, which is applied to a master device, and the method includes:

setting the SPI mode of the master device as a master mode, and sending commands/data to slave devices by the master device in the master mode;

the SPI mode of the master device is set to a slave mode, and the response/data actively sent by the slave device is received in the slave mode.

Preferably, the method further comprises:

the SPI mode of the master device is set to the slave mode when no command/data is transmitted to the slave device and when no response/data transmitted from the slave device is received.

A second aspect of the embodiments of the present invention provides a master-slave alternating SPI communication method, which is applied to a slave device, and includes:

setting the SPI mode of the slave device to be a slave mode, and receiving commands/data sent by a master device by the slave device in the slave mode;

the slave equipment receives and executes the command/data sent by the master equipment to generate response/data;

and setting the SPI mode of the slave equipment as a master mode, and actively sending response/data to the master equipment in the master mode.

Preferably, the method further comprises:

the SPI mode of the slave device is set to slave mode when the slave device does not receive commands/data sent by the master device and does not actively send responses/data to the master device.

A third aspect of the embodiments of the present invention provides a master-slave alternating SPI communication method, including:

setting the SPI mode of the master device as a master mode, setting the SPI mode of the slave device as a slave mode, and sending commands/data to the slave device by the master device when the SPI mode of the master device is the master mode and the SPI mode of the slave device is the slave mode;

and setting the SPI mode of the slave equipment as a master mode, setting the SPI mode of the master equipment as a slave mode, and actively sending response/data to the master equipment by the slave equipment when the SPI mode of the slave equipment is the master mode and the SPI mode of the master equipment is the slave mode.

Preferably, the method further comprises:

when the master device does not send commands/data to the slave device and does not receive responses/data sent by the slave device, the SPI mode of the master device is set to the slave mode;

the slave device sets the SPI mode of the slave device to the slave mode when it is not receiving commands/data sent by the master device and when it is not actively sending responses/data to the master device.

A fourth aspect of the present embodiments provides a master device, where the master device includes a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK, and at least one data signal terminal MOSI, and the processor is configured with operating instructions executable by the processor to perform the master-slave alternating SPI communication method according to the first aspect of the present embodiments.

A fifth aspect of the embodiments of the present invention provides a slave device, where the slave device includes a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK, and at least one data signal terminal MOSI, and the processor is configured with operating instructions executable by the processor to perform the master-slave alternative SPI communication method according to the second aspect of the embodiments of the present invention.

A sixth aspect of the present invention provides a master-slave alternating SPI communication system, which includes a master device and a slave device, where the master device and the slave device each include a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK, and at least one data signal terminal MOSI, the transmission indication signal terminal SS of the master device is connected to the transmission indication signal terminal SS of the slave device, the transmission clock signal terminal CLK of the master device is connected to the transmission clock signal terminal CLK of the slave device, and the data signal terminal MOSI of the master device is connected to the data signal terminal MOSI of the slave device, and the processor is configured with operating instructions executable by the processor to perform the master-slave alternating SPI communication method according to the third aspect of the present invention.

Preferably, the SPI is 8-bit SPI, 16-bit SPI, 32-bit SPI, or 64-bit SPI.

The invention has the following beneficial effects: according to the master-slave alternative SPI communication method, after the slave device executes the command/data sent by the master device, the slave device can immediately and actively start to transmit the response/data to the master device, and the process that the master device waits for invalidity or continuously inquires by the master device is eliminated, so that the waiting time of the master device is greatly shortened, and the data transmission efficiency between the master device and the slave device is improved. Meanwhile, the communication method can reduce the traditional MISO data line connection, reduce the traditional four lines into the three lines of the invention, and simplify the connection mode.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

FIG. 1 is a schematic diagram of a conventional SPI connection;

FIG. 2 is a schematic diagram of the timing relationship between the conventional SPI command-response and the return result;

FIG. 3 is a schematic diagram of a timing relationship of a conventional SPI initiated query SPI command;

fig. 4 is a flowchart of a master-slave alternative SPI communication method according to embodiment 1 of the present invention;

fig. 5 is a flowchart of a master-slave alternative SPI communication method according to embodiment 2 of the present invention;

fig. 6 is a flowchart of a master-slave alternative SPI communication method according to embodiment 3 of the present invention;

fig. 7 is a flowchart of the operation status according to embodiment 3 of the present invention;

fig. 8 is a schematic diagram of a master-slave alternative SPI communication system according to embodiment 6 of the present invention.

Detailed Description

In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following further detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings makes it clear that the described embodiments are only a part of the embodiments of the present application, and are not exhaustive of all embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

Example 1

As shown in fig. 4, this embodiment proposes a master-slave alternating SPI communication method, which is applied to a master device, and specifically includes:

s101, setting the SPI mode of the master device as a master mode, and sending commands/data to slave devices by the master device in the master mode;

s102, setting the SPI mode of the master device to be a slave mode, and receiving response/data actively sent by the slave device in the slave mode.

Specifically, when the SPI mode of the master device is the master mode, the master device may transmit commands/data to the slave device. The command may be read/write/operation/measurement, and the data may be written data, command parameters, and the like. In this case, the SPI mode of the corresponding slave device is the slave mode, and thus can receive the command/data transmitted from the master device. The slave device, upon receiving the command/data sent by the master device, may execute the command/data and generate a corresponding response/data. After the slave device generates the response/data, the slave device may actively send the response/data to the master device. At this time, the SPI mode of the master device is the slave mode, and receives a response/data actively transmitted from the slave device in the slave mode. The process does not need the master device to actively acquire data from the slave device, can remove the invalid waiting time of the master device or the process of continuous inquiry of the master device, greatly reduces the waiting time of the master device, and improves the data transmission efficiency between the master device and the slave device.

Further, in this embodiment, when the master device does not send a command/data to the slave device and does not receive a response/data sent by the slave device, the SPI of the master device is actually in a non-data transmission state, and the SPI mode of the master device may be set to the slave mode, so as to avoid device damage caused by the collision of the master and slave modes due to the docking of the two output terminals.

Example 2

As shown in fig. 5, the present embodiment provides a master-slave alternative SPI communication method, which is applied to a slave device, and specifically includes:

s201, setting the SPI mode of the slave device to be a slave mode, and receiving a command/data sent by a master device by the slave device in the slave mode;

s202, the slave device receives and executes the command/data sent by the master device, and generates response/data;

s203, setting the SPI mode of the slave equipment as a master mode, and actively sending response/data to the master equipment in the master mode.

Specifically, when the SPI mode of the slave device is the slave mode, the command and data transmitted from the master device can be received. After receiving the command/data sent by the master device, the slave device may execute the command/data and generate a corresponding response/data. After the slave device generates the response/data, the slave device may actively send the response/data to the master device. At this time, the SPI mode of the slave device is the master mode, the SPI mode of the corresponding master device is the slave mode, and the slave device actively transmits a response/data to the master device in the master mode. The process does not need the master device to actively acquire data from the slave device, can remove the invalid waiting time of the master device or the process of continuous inquiry of the master device, greatly reduces the waiting time of the master device, and improves the data transmission efficiency between the master device and the slave device.

Further, in this embodiment, when the slave device does not receive the command/data sent by the master device and does not actively send the response/data to the master device, the SPI of the slave device is actually in a non-data transmission state, and the SPI mode of the slave device may be set to the slave mode, so as to avoid device damage caused by the collision between the two output terminals due to the master-slave mode collision.

Example 3

As shown in fig. 6, the present embodiment provides a master-slave alternative SPI communication method, including:

s301, setting the SPI mode of the master device as a master mode, setting the SPI mode of the slave device as a slave mode, and sending commands/data to the slave device by the master device when the SPI mode of the master device is the master mode and the SPI mode of the slave device is the slave mode;

s302, the slave device receives and executes the command/data sent by the master device, and generates response/data;

s303, setting the SPI mode of the slave device as a master mode, setting the SPI mode of the master device as a slave mode, and transmitting a response/data from the slave device to the master device in a master mode when the SPI mode of the slave device is the master mode and the SPI mode of the master device is the slave mode.

Specifically, when the SPI mode of the master device is the master mode, the master device may transmit commands/data to the slave device. The command may be read/write/operation/measurement, and the data may be written data, command parameters, and the like. At this time, the SPI mode of the corresponding slave device is the slave mode, and thus, the command and data transmitted from the master device can be received. The slave device, upon receiving the command/data sent by the master device, may execute the command/data and generate a corresponding response/data. After the slave device generates the response/data, the slave device may actively send the response/data to the master device. At this time, the SPI mode of the slave device is the master mode, the SPI mode of the corresponding master device is the slave mode, and the slave device actively transmits a response/data to the master device in the master mode.

More specifically, the master-slave alternating SPI communication method provided in this embodiment mainly includes four operating states, as shown in fig. 7. The SPI modes of the master device and the slave device are also related to the four operating states, which specifically include:

(1) The initial state: the SPI modes of the master device and the slave device are both in a non-data transmission state and can also be called an idle state, and at the moment, the SPI modes of the master device and the slave device are both in a slave mode;

(2) Master access state: the master device sends commands/data and the slave device receives commands/data. At this time, the SPIs of the master device and the slave device are both in a data transmission state, wherein the SPI mode of the master device is a master mode, and the SPI mode of the slave device is a slave mode;

(3) And the command execution state: the slave device receives and executes the command/data sent by the master device and generates corresponding response/data. At this time, the SPIs of the master device and the slave device are both in a non-data transmission state, wherein the SPI modes of the master device and the slave device are both in a slave mode;

(4) Slave device response state: the slave device actively sends a response/data, which the master device receives. At this time, the SPIs of the master device and the slave device are both in a data transmission state, where the SPI mode of the master device is the slave mode and the SPI mode of the slave device is the master mode.

Example 4

Corresponding to embodiment 1, this embodiment proposes a master device, where the master device includes a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK, and at least one data signal terminal MOSI, and the processor is configured with operating instructions executable by the processor to perform the following operating instructions:

The working principle of the master device provided in this embodiment may refer to the content described in embodiment 1, and this embodiment is not described again.

Example 5

Corresponding to embodiment 2, this embodiment proposes a slave device, which includes a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK and at least one data signal terminal MOSI, where the processor is configured with operating instructions executable by the processor to perform the following operating instructions:

setting the SPI mode of the slave equipment to a slave mode, and receiving commands/data sent by master equipment by the slave equipment in the slave mode;

The working principle of the slave device proposed in this embodiment may refer to the content described in embodiment 2, and this embodiment is not described again.

Example 6

Corresponding to embodiment 3, this embodiment proposes a master-slave alternating SPI communication system, which includes a master device and a slave device, as shown in fig. 8. The master device and the slave device respectively comprise a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK and at least one data signal terminal MOSI, wherein the transmission indication signal terminal SS of the master device is connected with the transmission indication signal terminal SS of the slave device, the transmission clock signal terminal CLK of the master device is connected with the transmission clock signal terminal CLK of the slave device, the data signal terminal MOSI of the master device is connected with the data signal terminal MOSI of the slave device, and the processor is configured with operation instructions executable by the processor to execute the following operation instructions:

In the master-slave alternative SPI communication system proposed in this embodiment, the SPI is 8-bit SPI, 16-bit SPI, 32-bit SPI, or 64-bit SPI. The working principle can refer to the content described in embodiment 3, and this embodiment is not described again.

Further, when the master-slave alternative SPI communication system provided in this embodiment is actually applied, if the "question-and-answer" mode is completed, only three signal lines are needed, that is: the transmission indicator signal line SS, the transmission clock signal line CLK, the data signal line MOSI, and the fourth signal line MISO are no longer required because the data transmission of two actual data transmission states is:

master access state: the master equipment MOSI is output, and the slave equipment MOSI is input;

slave device response state: the slave equipment MOSI outputs and the master equipment MOSI inputs;

namely: both transmission states use the MOSI signal line for data transmission, and the MIOS signal line has no data transmission, so that the use of three lines (SS, CLK, MOSI) can satisfy the complete communication process of the master access + slave response state (i.e., question-and-answer) mode.

Specifically, the definition of the three signal lines in this embodiment is shown in table 2:

TABLE 2

Signal line	Signal name	Master device	Slave device	Description of the invention
					1	SPI_SS	Input/output	Input/output	Transmission effective signal line
2	SPI_CLK	Input/output	Input/output	Transmission clock signal line
					3	SPI_MOSI	Input/output	Input/output	Data signal line

The three-wire master-slave alternate SPI communication process is specifically as follows:

(1) The initial state: namely, the initial state:

a. the master SPI mode is a slave mode;

b. the slave equipment SPI mode is a slave mode;

c. there is no data transmission.

(2) The master SPI starts to transmit command data and enters a "master access state":

a. the SPI mode of the master device is a master mode and sends commands/data;

b. the slave SPI mode is a slave mode, and receives commands/data;

c. the data format is:

command word

Subsequent data length

Data of

The command word is 2 bytes and represents the content of the command, so that the slave device performs corresponding operations according to the content of the command: such as reading data, writing data, encrypting data, decrypting data, and the like;

the length of the subsequent data is 2 bytes, which represents the byte length of the subsequent data, so that the slave device checks whether the number of data receptions is complete;

data: data to be processed by the slave device.

(3) And the command execution state: after the command/data transmission is finished, entering a command execution state;

a. the SPI mode of the main equipment is a slave mode and waits for receiving response/data of data processing;

b. and the slave equipment processes the received data according to the received command content, and enters a slave equipment response state after the processing is finished.

(4) Slave device response state: the slave device sends a response/data to the master device;

a. the SPI mode of the main equipment is slave equipment and receives response/data;

b. the slave equipment SPI mode is the master equipment and sends response/data;

c. the data format is:

return value

Subsequent data length

Data of

Wherein, the return value is 2 bytes, which represents the execution result of the command, 0 represents the completion of the execution, and other values represent error codes; the length of the subsequent data is 2 bytes, which represents the byte length of the subsequent data, so that the master device checks whether the received number of the data is complete; the data is the data content of the command/data processing completion.

In this state, the slave device SPI is in the master mode, and after the transmission is completed, the initial state is entered. The master device SPI is in a slave mode, and enters an initial state after receiving is finished.

This embodiment can accomplish traditional four-wire SPI transmission through three-wire SPI. The working modes of the master device SPI and the slave device SPI are not fixed any more, but alternate conversion of the master mode and the slave mode is carried out along with different working states. The slave device can enter an execution state after receiving the command/data, and the slave device can not be interfered by the state inquiry of the master device in the process. After the execution of the slave equipment is finished, the slave equipment can immediately enter a response/data transmission state without waiting, and the data transmission efficiency is improved.

In this embodiment, the master device access may be completed by one-time transmission or may be completed multiple times, and after all the accesses are completed, the master device enters a command execution state and completes master-slave mode interchange.

Similarly, the data transmission in the slave device response state may be completed by one transmission or multiple transmissions, and after all the response transmissions are completed, the slave device enters the initial state.

It should be noted that the completion of the transmission means that no subsequent data needs to be transmitted, and the two parties perform state transition respectively according to the completion of the transmission.

Furthermore, the master-slave alternating SPI communication method provided by the application is also suitable for the double data lines DSPI and the four data lines QSPI so as to further improve the transmission rate. Wherein:

DSPI is four signal lines, except SS and CLK, the other two data signal lines are defined as MOSI0 and MOSI1, so that the transmission speed is doubled under the condition of the same clock;

QSPI is 6 signal lines, except SS and CLK, other four data signal lines are defined as MOSI0, MOSI1, MOSI2 and MOSI3, and the four data lines are transmitted in parallel, so that the transmission speed is improved by four times under the condition of the same clock.

Specifically, QSPI is an SPI mode with 4 data lines, including a transmission indication signal SS, a clock signal CLK, and 4 data lines MOSI0 to MOSI3, for a total of 6 signal lines, as shown in table 3 below:

TABLE 3

Different from a traditional QPSI (quick Path termination) master-slave mode fixing method, the master-slave alternate SPI communication method has the following specific steps that according to SPI interfaces of master equipment and slave equipment in different states, the master-slave mode alternate change and interchange are carried out:

(1) The initial state: namely, the initial state:

a. the SPI of the master device is in a slave mode;

b. the slave device SPI is in slave mode;

c. without data transmission

a. the SPI of the master device is in a master mode and sends commands/data;

b. the slave device SPI is in slave mode and receives commands/data;

c. the data format is:

command word

Subsequent data length

Data of

Wherein:

data: data to be processed from the device.

(3) And in a command execution state, after the command/data transmission is finished, entering a command execution state:

a. the SPI of the main equipment is converted into a slave mode to wait for receiving response/data of data processing;

b. the slave device processes the received data according to the received command content; and after the processing is finished, entering a slave equipment response state.

(4) In response mode, the slave device sends a response/data to the master device

a. The master equipment SPI is in a slave mode and receives response/data;

b. the slave equipment SPI is a master mode and sends response/data;

c. the data format is:

In this state, the slave device SPI is in the master mode, and after the transmission is completed, the initial state is entered. And the SPI of the master equipment is in a slave mode, and the master equipment enters an initial state after receiving.

As can be seen from the above, the transmission process of QSPI is almost the same as that of 3-wire SPI, and the characteristics are as follows: the method has the advantages of keeping 4 times of transmission rate of QSPI, improving the transmission rate, having the advantages of a three-wire SPI master-slave alternating method, avoiding waiting for state alternation, and improving the transmission and execution efficiency.

Claims

1. A master-slave alternate SPI communication method, wherein said method is applied in a master device, said method comprising:

2. The method of claim 1, further comprising:

3. A master-slave alternative SPI communication method, characterized in that, said method is used in slave devices, said method comprises:

4. The method of claim 3, further comprising:

5. A method of master-slave alternating SPI communication, the method comprising:

6. The method of claim 5, further comprising:

when the master device does not send commands/data to the slave device and does not receive responses/data sent by the slave device, the SPI mode of the master device is set to be a slave mode;

7. A master device, characterized in that the master device comprises a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK and at least one data signal terminal MOSI, the processor being configured with processor-executable operating instructions to perform the master-slave alternating SPI communication method according to claim 1 or 2.

8. A slave device, characterized in that it comprises a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK and at least one data signal terminal MOSI, said processor being configured with processor-executable operating instructions to perform the master-slave alternating SPI communication method according to claim 3 or 4.

9. A master-slave alternating SPI communication system, characterized in that the system comprises a master device and a slave device, the master device and the slave device each comprising a processor, a transmission indication signal terminal SS, a transmission clock signal terminal CLK and at least one data signal terminal MOSI, the transmission indication signal terminal SS of the master device being connected to the transmission indication signal terminal SS of the slave device, the transmission clock signal terminal CLK of the master device being connected to the transmission clock signal terminal CLK of the slave device, the data signal terminal MOSI of the master device being connected to the data signal terminal MOSI of the slave device, the processor being configured with processor-executable operating instructions to perform the master-slave alternating SPI communication method according to claim 5 or 6.

10. The system of claim 9, wherein the SPI is 8-bit SPI, 16-bit SPI, 32-bit SPI, or 64-bit SPI.