JPS62185464A - Picture processor - Google Patents

Abstract

PURPOSE:To prevent the deterioration in picture quality by using a periodic pattern signal having three stages of periods from coarse to fine periods so as to apply screen processing to an input picture signal thereby reproducing an original including any kind of picture with high quality. CONSTITUTION:A PWM switching circuit 50 detects a picture gradation changing point from a SELECT signal 3a to output a PWM selection signal 51 corresponding to a picture data. Further, frequency division circuits 53, 54 generate new screen clocks 53a, 54a having periods twice and thrice of that of a screen clock 52a to form pattern signals 55a, 56a, 56a. then an output 60a of comparator 60, 61, 62 is suitable for an edge, an output 61a is suitable for screen formation of each change point for edge and intermediate parts and an output 62a copes sufficiently with a picture or a halftone picture with constant density. Thus, the PWM selection signal 51 allows a selector 63 to select binary-coding outputs (pulse width modulation outputs) 60a, 61a, 62a. Thus, the rapid change in the picture signal on screen at the changeover of screen clock is mitigated in this way.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that binarizes an input image signal while recognizing its tone.

[Prior Art] Conventionally, as a method of binarizing an image including halftones, for example, a dither method and a density pattern method using a threshold matrix are well known. However, when halftone dot images are binarized using these methods, moiré fringes occur due to beats in the periodic structure of halftone dots and threshold matrices, resulting in a significant deterioration of image quality. Furthermore, not only dot drawings but also line drawings such as characters have the disadvantage that the edges become step-like and jagged.

To improve the above drawbacks, halftone images and halftone images,
This application focuses on the difference in image tone (characteristics or properties of image signals) from line drawings, detects changes in image tone, and changes the binarization cycle according to the change in image tone. This is done by a person (Japanese Patent Application No. 6O-189943).

FIG. 2 is a circuit block diagram according to such a previously proposed technique. To explain its configuration, input image signal 1a
For example, the image tone is recognized by detecting whether or not it corresponds to an edge part of the image, and changes depending on the identification result5.
Identification circuit 3 that outputs ELECT signal 3a and its 5E
A timing signal generation circuit 4 that generates a screen clock 12 with a period corresponding to the value of the LECT signal 3a, and a pattern signal generator that generates a pattern signal 9a that has the same period as the screen clock 12 and has a predetermined pattern (for example, a triangular wave). A circuit 9, and a binarization processing unit (D/A converter 8,
comparator 10, etc.).

Changes in the 5ELECT signal 3a, which is the output of the identification circuit 3, correspond to changes in the image tone of the input image signal. The period of the screen clock 12 changes according to this change. Therefore, the period of the pattern signal 9a (screen) also changes, and the period corresponds to the image tone identified by the identification circuit 3. Therefore, when the image tone of the input image requires fine screening (e.g. edge parts), the pattern signal 9a has a short period, and when coarse screening is sufficient (for example, when the density change is gradual), the pattern signal 9a has a long period. Screen processing is performed by screening the pattern signal 9a. FIG. 3 is a timing chart based on the proposed technique of FIG. 2.

[Problems to be Solved by the Invention] However, in the previously proposed technique as shown in FIG. 2, the cycle of the binarization process is uniformly changed if there is a change in image tone. For example, in the example that includes a halftone image and a line drawing image, the halftone image portion is screened with a coarse period, and the edge portion between the halftone image and the line drawing is screened with a dense period. be. In such screen processing,
Before the image tone changes (halftone image area) and after the image change (
Although it is possible to improve the image quality of the reproduced image (other than the peripheral area of the edge area), the reproduced image of the peripheral area of the edge area, that is, the pixels corresponding to the actual change in image tone, will deteriorate. . This is due to the following reason.

First, noise is likely to occur at a point where the image tone changes because the screening cycle changes suddenly. Second, while image tone recognition is always determined from an image signal of an image area having a predetermined width, the actual change in image tone is always performed in units of one pixel.

Therefore, the image area required for image tone determination is always larger than the actual image tone change. Thirdly, when the density change of the image signal is gradual, screening is performed by lengthening the cycle, but if there is a sudden density change in this case, the width of the change is included in the screen cycle. It's going to happen. Second. For the third reason, even if the screening cycle is changed for each image level, pixel information near the actual image level change point will be lost. Deterioration of reproduced images is thought to occur for the above three reasons.

This kind of deterioration is noticeable in that the image tone changes rapidly.
That is, there is a change from binarization by long-cycle screening to binarization by short-cycle screening, for example, an edge portion of a line image, a change from a line image to a halftone image, or vice versa. In the configuration example of FIG. 2, as shown in the timing chart of FIG.
Partial image information is lost from the PWM output 11, and specifically, this appears as a sudden change in the cycle of the PWM output 11 from ■ to ■. This problem is the same near the end of the edge portion (■ and 0 portion in FIG. 3). Furthermore, this problem occurs not only with line drawings but also with images including halftone dot drawings.

The present invention eliminates the above-mentioned drawbacks, and reproduces any document containing any image with high image quality. By switching the screen processing cycle,
The purpose of this paper is to propose an image processing device that prevents deterioration of image quality.

[Means for Solving the Problem] As a means for solving this problem, for example, the image information processing apparatus of the embodiment shown in FIG. Sexual pattern signal (101a
, 102a, 103a), and a pattern signal generator (101, 102° 103) that generates a multivalued image signal ioo as a periodic pattern signal (Iota, 102a, 103a).
Each of the binary signals (104a, 1
05a, 106a), a selector 107 that selects one of the binary signals (104a, 105a, 106a), and a screen processing means for outputting the multivalued image signal. It also includes a tone recognition section 110 that recognizes tone and tone change points.

[Operation] With the above configuration, for example, the period of the pattern signal 102a is set to the period of the intermediate value of the pattern signals 101a and 103a. Further, the selector 107 is connected to the image tone recognition section 1.
10, the image signal portion I before the change in image tone contains a signal 104a that is binarized with the pattern signal 101a.
is selected, and a signal 105a binarized with the pattern signal 102a is selected as the image signal portion II corresponding to the image tone change portion.

Then, the pattern signal 1 is applied to the image signal part after the image tone change.
The signal 106a binarized in step 03a is selected.

In this way, the periodic changes for screen processing become step-like, and smooth screening processing can be achieved.
No noise is generated and information about image tone change points is not lost. Furthermore, by setting the minimum period that the pattern signals 102a and 103a can take as the period of the pattern signal 102a, the screening process can follow even when the edge change point changes suddenly, and the information on the image tone change point is also not lost. High image quality can be achieved without any problems.

[Examples] Examples according to the present invention will be described in more detail below with reference to the accompanying drawings.

<Configuration of the example> FIG. 4 is a block diagram of an image processing apparatus according to an embodiment.

Components having substantially the same functions as those in the example of FIG. 2 described above are given the same numbers. In the figure, 1 is a video data output unit, which stores A/D converted image data from a CCD sensor or video camera (not shown), and predetermined bits (in this example, 6 bit) digital image data 1a is output. This digital image data 1a may be temporarily stored in a memory (not shown), or may be input from an external device through communication or the like. The image data 1a from the digital data output unit 1 is 6-bit image data as shown in the figure, and is input to the buffer memory 2 at the next stage. The buffer memory 2 stores image data la for the identification circuit 3 to perform image tone identification.
It is used to extract a desired pixel inside. The configuration of the buffer memory 2 is shown in FIG. The identification circuit 3 identifies the image tone (characteristics or properties of an image) and outputs a 5ELECT signal 3a corresponding to the image tone. An example of the identification circuit is shown in FIGS. 11(a) and 11(b). 5ELECT
The signal 3a is input to the PWM switching circuit 50. The PWM switching circuit 50 detects an image tone change point from the 5ELECT signal 3a, and forms timings corresponding to the image data before the image tone change, the image data at the image tone change point, and the image data after the image tone change, respectively. , outputs a PWM selection signal 51. The configuration of the PWM switching circuit 50 is shown in FIG.

On the other hand, the pixel clock generation circuit 52 generates a screen clock 52a and a pixel clock 52b having a cycle having the same length as one pixel width. The screen clocks 52a are input to frequency dividing circuits 53 and 54, respectively, and the screen clocks 52a
New screen clocks 53a and 54a have a period twice that of a, and a period three times that of a. These screen clocks 52a, 53a, and 54a are input to pattern signal generation circuits (55, 56, 5), respectively, and generate pattern signals (55a, 56) each having a predetermined pattern (a triangular wave in this example).
a, 57a). These pattern signals (55a,
56a, 57a) have the same period of their respective manual screen clocks (see FIG. 5). These three pattern signals (55a, 56a, 57a) become control signals for pulse width modulation in the comparator (60°61.62). Note that the pixel clock generation circuit 52 of this example is the 12th pixel clock generation circuit 52.
As shown in the figure, the master clock 6a is divided into 1/n.
It can be configured with a 1/1 frequency divider circuit.

On the other hand, after the image data 2b is read from the buffer memory 2, it is delayed by the 9M delay circuit 7 by the time required for identification by the identification circuit 3, and is converted by the D/A converter 8 into analog image data 8a. Analog image data 8a is input to comparators (60, 61, 62) and pulse width modulated using the pattern signals (55a, 56a, 57a). That is, the outputs of the comparators 60 to 62 are obtained by screening the same image data using different screening cycles. Output 60a has the shortest screen period and is therefore suitable for screening edge portions, output 61a is suitable for screening transition points between edge portions and halftone portions, and output 62a has a rough period but is suitable for screening images with constant density or intermediate It can also be used with tonal images. Therefore, the PWM selection signal 51 generated by the PWM switching circuit 50 causes the selector 63 to select the binarized output (pulse width modulation output) (60a, 61a, 62a) according to the input timing of the image data. do. In this way, a sudden change in the pulse width of the screened image signal, that is, the PWM signal 64 at the time of screen clock switching is suppressed, and the switching can be performed smoothly.

(Image tone recognition) Image tone recognition is performed by the buffer memory 2 and the identification circuit 3. The buffer memory 2 is composed of four line memories 71a to 71d as shown in FIG. selects one line by the selector 70a and writes to the selected line memory.Meanwhile,
Image signals that have already been written are read out by the selector Ob from the line memories to which writing has not been performed, and are output as image signals 2a, 2b, and 2c. Also, writing to the line memory is performed by 71a and 71b.

71c and 71d, and finally the output image signal 2a
~2C outputs three consecutive lines of image data. Also, by preparing four line memories, writing and reading can be performed simultaneously.

The 9 output signals from such a line meso are shown in FIG. 11(a),
It enters the next stage identification circuit 3 shown in (b).

Here, symbol 2 means a delay circuit. The function of this identification circuit 3 is as shown in FIG.
This is image tone recognition that detects an filter edge. This L
The hardware circuit of the aplacian filter is the 11th
Shown in Figure (b). That is, the image signals 2a, 2b of each line
, 2c are output from five taps 74a to 74e through delay circuits 73a to 73d corresponding to one pixel clock. 7
5.76 is an adder.

The subtractor F8 is a multiplier. The Laplaclan output cuff 6a is an amount that represents the amount of edges in the image, that is, the "degree" of the edges, and this edge amount is determined by the comparator 7.
Compared with standard data (k) 80 from 9th, 5ELEC
Obtain T signal 3a. At this time, the output of the identification circuit 3 is 5
ELECT signal 3a: When image edge amount>k
When the edge amount of the output “1” image ≦k, the output °“
A binary output of 0° is obtained. However, the parameter at this time can be adjusted as appropriate based on the reference data 80. In this way, the identification circuit 3 recognizes the image tone of the area constituted by the eight image data surrounding the image data of the tap 74c, and outputs the recognition result as the 5ELECT signal 3a. Of course, if the image tone recognition stage is made finer, for example, if the parameter "°" is set to a plurality of values, the output 5ELECT signal 3a can also be made several bits long, allowing for even more detailed image tone recognition.

<Screening processing by pulse width modulation> Figure 5 shows the 4th
FIG. 3 is a diagram for explaining signal waveforms of each part of the device shown in the figure.

Explaining according to FIG. 5, the master clock 6a is the output of the oscillator 6, the horizontal synchronizing signal 5a is for synchronizing horizontal scanning in the screen processing of image data, and the H,5YNC generating circuit Generated by 5. If the image processing device is applied to a laser beam printer, the horizontal synchronization signal is the so-called beam detect (BD
) is a signal. The pixel clock 52b is obtained by counting down the master clock 6a of the oscillator 6 by the pixel clock generation circuit 52, as shown in FIG. The pattern signal 55a and analog image data 8a are input to the comparator 60, and the pattern signal 55a is input to the comparator 61.
The pattern signal 57a and the analog image data 8a are respectively input to the comparator 62, and are compared and subjected to pulse width modulation. As shown in the figure, it is assumed that the higher the analog level goes, the higher the density becomes.

In this way, the binarization process used in this embodiment enables almost continuous pulse width modulation by comparing with a pattern signal of a predetermined period, and allows for high gradation for image data with gradual density changes. An image output can be obtained. In addition, the horizontal synchronization signal is generated using the master clock 6a having a frequency higher than the frequency of the synchronization signal (in the case of this embodiment, the frequency is 12 times that of the triangular wave) for generating the pattern signal C (triangular wave in this embodiment). Since a screen clock synchronized with 5a is formed, the pattern signal generation circuit (55, 56,
pattern signals (55a, 56a, 5
In this embodiment, the "fluctuation" (for example, the difference between the pattern signals of the first line and the second line) in 7a) is 1/12 of the pattern signal period. Therefore, since the gradation information is pulse-width modulated almost steplessly using a pattern signal with less "fluctuation," a high-quality reproduced image can be obtained. Furthermore, even for image data whose image tone changes, screen processing can be performed in accordance with the change in image tone.

Furthermore, as described below, appropriate screen processing can be performed even at the point of change in image tone itself.

(Picture-tone change point extraction) PWM switching circuit 50 performs the extraction of picture-tone change points to perform stepwise or detailed screening of the picture-tone change points, which is the central issue of this embodiment. An example of the circuit configuration is shown in Fig. 6. When the identification circuit 3 recognizes a change in image tone, the 5ELECT signal 3a changes from "0" to "1" as described above.The 5ELECT signal 3a detects the edge part of the image. As long as it is detected, it is 1".This 5ELE
When the CT signal 3a is input to the D-type flip-flop 90, the flip-flop 90 receives the next pixel clock 52.
Set by b. In FIG. 6, if the 5ELECT signal 3a is So and the output of the flip-flop is SI, then the signal So.

Sl is determined as shown in FIG. 8 depending on how its value is taken. Therefore, if So and S are the selection inputs of the selector 63 in FIG. 4, as shown in the timing chart of FIG.
In response to changes in image tone, a PWM signal with a frequency divided by 1/3 (62
PWM signal synchronized one-to-one with the pixel clock from a) (
60a), a signal (61a) that selects the PWM signal (61a) synchronized with the 1/2 frequency screen clock 53a for one pixel clock from the rising edge of the 5ELECT signal 3a without directly changing the signal ( so=l
, SL = O), and then switches to a PWM signal synchronized with the pixel clock. Further, in the case of this reverse switching, the operation is opposite to that described above due to the fall of the 5ELECT signal 3a.

<Effects of Example> As explained above, the pulse widths of ■ to ■ in the PWM output 11 in FIG. 3 are the same as those of the PWM output 64 in FIG.
■' pulse width, which softens the sudden change when switching the PWM signal and prevents the generation of noise.In addition, the image data information near the change point is not lost when switching the screen clock. This has the effect of improving image quality deterioration.

Next, when the image data is a halftone original, the 5ELECT signal 3a becomes "1", so it is output with a dense screen line count, and the above-mentioned beat (moiré) peculiar to the halftone original is generated.
The phenomenon disappears. The reason for this is that moiré occurs at the difference frequency (number of lines) between the halftone dot period and the screen period, but because the screen period is dense, the number of output lines increases, and the difference frequency becomes large and becomes less noticeable. be.

Note that the screen clock in the above embodiment is a pixel clock for fine images, and a pixel clock of 173 for coarse images.
Although it was configured with a frequency-divided clock, this is just an example; if you select a screen clock with a difference between the two, and select several types of screen clocks in stages when selecting that screen clock, you can achieve the original purpose. Fulfill. Furthermore, if the pattern signal corresponding to the image tone change point is set to the minimum cycle that the pattern signal generator can take, it is possible to follow sudden changes in image tone. Furthermore, the pattern signal is not limited to a triangular wave, but may be a sine wave, a sawtooth wave, or the like.

[Effects of the Invention] As explained above, according to the present invention, any document containing any image can be reproduced with high image quality, and furthermore, the image quality can be reproduced not only before and after the point of change in image tone, but also at the point of change in image tone itself. However, by switching the screening cycle, deterioration in image quality can be prevented.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of the embodiment, FIGS. 2 and 3 are diagrams of circuit examples and their operation timing charts in the applicant's prior proposed technology, and FIGS. 4 and 5 are respectively A circuit block diagram and its timing chart of an embodiment according to the invention, FIG. 6 is a circuit configuration diagram of the PWM switching circuit 50, FIG. 7 is a timing chart explaining the operation when switching the pulse width modulation period, and FIG. Figure 9 is a diagram showing the configuration of the buffer memory; Figure 10 is a diagram showing the matrix configuration of a Laplacian filter for image tone recognition; Figures 11 (a) and (b) is a block circuit diagram configuring the identification circuit, and FIG. 12 is an internal diagram of the pixel clock generation circuit. In the figure, 1...Video data output unit, 2...Buffer memory, 3...Identification circuit, 3a...5ELECT signal, 6a...Master clock, 7a...Digital image data, 8a...・Analog image data, 50...
PWM switching circuit, 51...-PWM selection signal, 52...
・Pixel clock generation circuit, 52a, 53a, 54a...
・Screen clock, 52b... Pixel clock, 5
3.54.91--divider circuit, 55,56.57...
・Pattern signal generation circuit, 55a, 56a, 57a, I
ota, 102a, 103a...pattern signal, 60
．． 61, 62, 104, 105, 106... comparator, 60a, 61a, 62a, 104a, 105a,
106a...PWM signal, 63.70a, 70b...
- Selector, 64...Selected PWM signal, 71a
~71d... Line memory, 90... Flip-flop, 100... Input image signal, 101, 102, 1
03... Pattern signal generation section, 110... Image tone recognition section. Figure 8 Figure 9 Figure 1--
-JFigure 11Figure 11(b)

Claims (6)

[Claims] (1) A pattern signal generating means for generating a periodic pattern signal having a predetermined pattern and a variable period, an image tone recognition means for recognizing the image tone and changes in image tone of the input image signal, and selecting the period of the pattern signal. The cycle selection means selects a first cycle corresponding to the image tone recognition for the image signal portion before the change in image tone, based on the recognition by the image tone recognition means, and corresponds to the image tone change portion. a period selecting means for selecting a second period for the image signal portion to be changed and a third period for the image signal portion after the image tone change according to the image tone recognition; and screen processing means for performing screen processing on the input image signal while sequentially changing the period from the first period to the third period. (2) The image processing apparatus according to claim 1, wherein the second period is a period having an intermediate value between the first and third periods. (3) The image processing device according to claim 1, wherein the second cycle is the shorter of the first and third cycles. (4) The screen processing means performs the processing by pulse width modulation that compares the periodic pattern signal and the input image signal and binarizes the same. image processing device. (5) Claim 1, wherein the periodic pattern signal includes at least a portion of a gradually increasing portion and a gradually decreasing portion.
The image processing device according to any one of items 1 to 4. (6) The image processing device according to claim 5, wherein the periodic pattern signal is a triangular wave, a sawtooth wave, or a sine wave.