JPS62185341A - Resin sealed type semiconductor device - Google Patents
Resin sealed type semiconductor deviceInfo
- Publication number
- JPS62185341A JPS62185341A JP61026167A JP2616786A JPS62185341A JP S62185341 A JPS62185341 A JP S62185341A JP 61026167 A JP61026167 A JP 61026167A JP 2616786 A JP2616786 A JP 2616786A JP S62185341 A JPS62185341 A JP S62185341A
- Authority
- JP
- Japan
- Prior art keywords
- film
- bonding pad
- passivation film
- resin
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 31
- 229920005989 resin Polymers 0.000 title claims 2
- 239000011347 resin Substances 0.000 title claims 2
- 238000002161 passivation Methods 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims description 7
- 229920001187 thermosetting polymer Polymers 0.000 claims description 7
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical group [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 2
- 239000009719 polyimide resin Substances 0.000 claims description 2
- 229920002050 silicone resin Polymers 0.000 claims description 2
- 238000007789 sealing Methods 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 3
- 238000000576 coating method Methods 0.000 abstract 3
- 239000011342 resin composition Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000000805 composite resin Substances 0.000 description 1
- 230000008595 infiltration Effects 0.000 description 1
- 238000001764 infiltration Methods 0.000 description 1
- 230000015654 memory Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000002285 radioactive effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3192—Multilayer coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、樹脂封止型半導体装置に関し、特に半導体
基板上のパッシベーション膜とバッファコート膜の重な
り形状の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a resin-sealed semiconductor device, and particularly to an improvement in the overlapping shape of a passivation film and a buffer coat film on a semiconductor substrate.
第3図は、従来の樹脂封止型半導体装置のボンディング
パッド部の一例の断面図である。FIG. 3 is a cross-sectional view of an example of a bonding pad portion of a conventional resin-sealed semiconductor device.
この樹脂封止型半導体装置の構成について説明すると、
半導体基板口1上にボンディング+21を設け、このボ
ンディングパッド(2)全被覆するパッシベーション膜
ts+ ヲ設+f 、このパッシベーション膜+31に
開孔(41を設け、更にパッシベーション膜131 ヲ
m Wするバフ7アコーfulfilを設け、このバッ
ファコート膜(6)に開孔(41を設け、ボンディング
パラ1″(21ニリートワイヤ+61を接続し、さらに
ボンディングパッド+2+ 、 パッシベーション膜t
31.バッファコート膜(5:、リードワイヤ(6)を
熱硬化性樹脂組成物(7)で覆い、半導体素子が乍られ
る。The structure of this resin-sealed semiconductor device will be explained as follows.
A bonding pad 21 is provided on the semiconductor substrate opening 1, a passivation film ts+ is provided to completely cover this bonding pad (2), an opening 41 is provided in this passivation film 31, and a buff 7 is provided to cover the passivation film 131. fulfil is provided, an opening (41) is provided in this buffer coat film (6), a bonding pad 1" (21 nitride wire + 61 is connected), and a bonding pad +2+ and a passivation film t are formed.
31. A buffer coat film (5:), a lead wire (6) is covered with a thermosetting resin composition (7), and a semiconductor element is attached thereto.
ここで、バッフアコ−)+51ij、元来、熱硬化性樹
脂組成物(7)の中に含有される微量の放射性元素から
放出されるα粒子によって発生する大容量メモリのソフ
トエラーを防止することを目的としたものであるため、
主に半導体素子の能動領域を被覆し、パッシベーション
膜(31におけるボンディングパッド(2)の電極端近
傍の最薄部等を被覆しないように設けられるのが普通で
あった。Here, Buffer Acco+51ij is originally intended to prevent soft errors in large-capacity memories caused by α particles released from trace amounts of radioactive elements contained in the thermosetting resin composition (7). Because it is intended for
It has been common practice to mainly cover the active region of the semiconductor element, but not to cover the thinnest part of the passivation film (31) near the electrode end of the bonding pad (2).
従来の樹脂封止型半導体装置は熱硬化性樹脂組成物(7
)にてモールドする時、熱、応力等の外部要因にヨリ、
パッシベーション膜(31のボンディングパッド(2)
の電極端近傍の最薄部にクランク(8)が生じることが
あった。このため、外部より熱硬化性樹脂組成物(7)
とクラック(8)を経由して浸入してきた水がボンディ
ングパッド(2)の下方半導体基板+1.1の最上層に
あるpsa膜(図示せず)中に含まれるリン成分と接触
し、リン酸が生成し、その結果ボンディングパッド(2
)が腐食さね、半導体素子の信頼性が犬きく低下する。Conventional resin-sealed semiconductor devices are manufactured using thermosetting resin compositions (7
), due to external factors such as heat and stress,
Passivation film (31 bonding pads (2)
A crank (8) was sometimes formed at the thinnest part near the electrode end. Therefore, the thermosetting resin composition (7)
The water that has entered through the crack (8) contacts the phosphorus component contained in the PSA film (not shown) on the top layer of the semiconductor substrate +1.1 below the bonding pad (2), and the phosphoric acid is generated, resulting in a bonding pad (2
) will corrode, and the reliability of semiconductor devices will be significantly reduced.
従来の樹脂封止型半導体装#けパッシベーション膜(3
1にクランク(81が入った場合、バッファコート(6
1はクラック(8)を被覆していないため、ボンディン
グパッド(2)が上記クラック(8)を通じてきた水分
により贋食し、樹脂封止型半導体装置の信頼性が著しく
低下するという問題点があった。Conventional resin-sealed semiconductor device # passivation film (3
If crank (81) is entered in 1, buffer coat (6
1 did not cover the crack (8), so there was a problem that the bonding pad (2) was damaged by the moisture that came through the crack (8), and the reliability of the resin-sealed semiconductor device was significantly reduced. .
この発明は上記のような問題点を解消するためになされ
たもので、パッシベーション膜の一部にクラックが生じ
ても、耐湿性が低下しない高信頼変の樹脂封止型半導体
装置を提供することを目的とする。This invention was made to solve the above-mentioned problems, and it is an object of the present invention to provide a highly reliable resin-sealed semiconductor device whose moisture resistance does not deteriorate even if cracks occur in a part of the passivation film. With the goal.
この発明に係る樹脂封止型半導体装置はパッシベーショ
ン膜よりも弾性係数が高いバッファコート膜が、パッシ
ベーション膜のボンディングパラ)″端近傍の最薄部を
被覆したものである。In the resin-sealed semiconductor device according to the present invention, a buffer coat film having a higher elastic modulus than the passivation film covers the thinnest portion of the passivation film near the end of the bonding plate.
この発明においては、樹脂封止型半導体装置におけるバ
ッファコート膜が、パッシベーション膜にかけるポンデ
ィングパラr端近傍の最薄部を被覆しているため、たと
え該最薄部にクラックが入ったとしても、外囲からの半
導体基板表面への水分の浸入を防止することができる。In this invention, since the buffer coat film in the resin-sealed semiconductor device covers the thinnest part near the end of the bonding layer applied to the passivation film, even if a crack occurs in the thinnest part, , it is possible to prevent moisture from entering the surface of the semiconductor substrate from the outer enclosure.
以下、この発明の実権例を図について説明する。 Hereinafter, practical examples of the present invention will be explained with reference to the drawings.
なか、この実施例の説明において、従来の技術の説明々
重複する部分については説明を省略する。In the description of this embodiment, the description of parts that overlap with the description of the conventional technology will be omitted.
第1図はこの発明の一実施例である樹脂封止型半導体装
置のボンディングパッド部の断面図である。図に示すよ
うに、バッファコート膜(51はパッシベーション膜(
31におけるポンディングバット(21の電蜂喘近傍の
最薄部を被覆するように設けられる。FIG. 1 is a sectional view of a bonding pad portion of a resin-sealed semiconductor device according to an embodiment of the present invention. As shown in the figure, a buffer coat film (51 is a passivation film)
31 (provided so as to cover the thinnest part near the electric batt 21).
このように、バッファコート膜(5)が、パッシベーシ
ョン膜131におけるボンディングパラ)−’ +21
の電極端近傍の最薄部を被覆するように形成し、バッフ
ァコート膜としてポリイミド樹脂またはシリコン樹脂を
選択すると、半導体素子を熱硬化性樹脂組酸物にてモー
ルFする時の熱、応力等の外部要因により、たとえパッ
シベーション膜におけるボンディングパッド(2)の電
極端近傍の最薄部にクラック(8)が生じても、バッフ
ァコートI1.!:してパッシベーション膜よりも弾性
係数の高い上記材料を選択した場合にVi該ツクランク
バッファコート膜(6)に生じず、水分の浸入が避けら
れ、信頼性を向上させることができる。In this way, the buffer coat film (5) is bonded to the passivation film 131 by bonding para)-' +21
If polyimide resin or silicone resin is selected as the buffer coat film, heat, stress, etc. will be reduced when the semiconductor element is molded with a thermosetting resin composite oxide. Even if a crack (8) occurs in the thinnest part of the passivation film near the electrode end of the bonding pad (2) due to an external factor, the buffer coat I1. ! : When the above-mentioned material having a higher elastic modulus than the passivation film is selected, Vi does not form in the crank buffer coat film (6), moisture infiltration can be avoided, and reliability can be improved.
バッファフート膜の形状は次の変形が可能である。第2
図は、この発明の樹脂封止型半導体装置のバッファコー
ト膜の形状の変形例を示t M y ティングパッド部
の断面因である。図に示すようにバッファコート膜(5
)はパッシベーショ7 m (31’Fr: 完全に覆
い、ボンディングパラ)′+2+上まで達するよう形徴
される。この場合にも上記実権例と同様の効果を奏する
。The shape of the buffer foot film can be modified as follows. Second
The figure shows a modified example of the shape of the buffer coat film of the resin-sealed semiconductor device of the present invention, and is a cross-sectional view of the ting pad portion. As shown in the figure, buffer coat film (5
) is characterized by a passivation extending up to 7 m (31'Fr: completely covered, bonding para)'+2+. In this case as well, the same effect as in the above-mentioned example of real power is achieved.
以上のようにこの発明によれば、パッシベーション膜よ
りも弾性係数が高いバッファコート膜が、パッシベーシ
ョン膜のボンディングパラ)’ 端近傍の最薄部を被覆
したので、耐湿性に優ねた信頼性の高い樹脂封止型半導
体装置を得ることができる。As described above, according to the present invention, the buffer coat film, which has a higher elastic modulus than the passivation film, coats the thinnest part of the passivation film near the bonding edge. A high quality resin-sealed semiconductor device can be obtained.
第1図はこの発明の一実施例である樹脂封止型半導体装
置のボンディングパッド部の断面図である。第2図はこ
の発明の仙の実施例である樹脂封止型半導体装置のバッ
ファコート膜の形状の変形例を示すボンディングパッド
部の断面図でアル。
第3図は従来の樹脂封止型半導体装置のボンディングパ
ッド部の一例の断面図である。
図において、illは半導体基板、(21はボンディン
グパット、+31)’;jパッシベーション膜、141
は開孔、fi+!”jバッファコート膜、(6)はリー
ドワイヤ、+71 H熱硬化性樹脂組成物、(8)はク
ラックである。
なお、各図中、同一符号は同一または相当部分を示す。FIG. 1 is a sectional view of a bonding pad portion of a resin-sealed semiconductor device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view of a bonding pad portion showing a modification of the shape of the buffer coat film of a resin-sealed semiconductor device according to the third embodiment of the present invention. FIG. 3 is a cross-sectional view of an example of a bonding pad portion of a conventional resin-sealed semiconductor device. In the figure, ill is a semiconductor substrate, (21 is a bonding pad, +31)'; j is a passivation film, 141
is open hole, fi+! "j buffer coat film, (6) is a lead wire, +71H thermosetting resin composition, (8) is a crack. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (2)
たボンディングパッドと、該ボンディングパッドを被覆
するパッシベーション膜と、このパッシベーション膜に
設けられ該ボンディングパッドに通ずる開孔と、更に前
記パッシベーション膜を被覆すると共に、このパッシベ
ーション膜よりも弾性係数の高いバッファコート膜と、
このバッファコート膜に設けられ該ボンディングパッド
に通じる開孔と、該開孔を通つて前記ボンディングパッ
ドに接続されたリードワイヤとを具備する半導体素子と
、該半導体素子を封止する熱硬化性樹脂組成物を含む樹
脂封止型半導体装置において、前記バッファコート膜が
、前記パッシベーション膜の前記ボンディングパッド端
近傍の最薄部を被覆することを特徴とする樹脂封止型半
導体装置。(1) A semiconductor substrate, a bonding pad provided on the surface of the semiconductor substrate, a passivation film covering the bonding pad, an opening provided in the passivation film leading to the bonding pad, and further including the passivation film. a buffer coat film having a higher elastic modulus than the passivation film;
A semiconductor element comprising an opening provided in the buffer coat film and communicating with the bonding pad, and a lead wire connected to the bonding pad through the opening, and a thermosetting resin sealing the semiconductor element. A resin-sealed semiconductor device comprising the composition, wherein the buffer coat film covers the thinnest portion of the passivation film near the end of the bonding pad.
シリコン樹脂からなる特許請求の範囲第1項記載の樹脂
封止型半導体装置。(2) The resin-sealed semiconductor device according to claim 1, wherein the buffer coat film is made of polyimide resin or silicone resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61026167A JPS62185341A (en) | 1986-02-08 | 1986-02-08 | Resin sealed type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61026167A JPS62185341A (en) | 1986-02-08 | 1986-02-08 | Resin sealed type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62185341A true JPS62185341A (en) | 1987-08-13 |
Family
ID=12185986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61026167A Pending JPS62185341A (en) | 1986-02-08 | 1986-02-08 | Resin sealed type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62185341A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5532221A (en) * | 1978-08-24 | 1980-03-06 | Toshiba Corp | Saturation level detector |
JPS5558555A (en) * | 1978-10-25 | 1980-05-01 | Hitachi Ltd | Electronic device and its manufacture |
JPS55166942A (en) * | 1979-06-15 | 1980-12-26 | Hitachi Ltd | Semiconductor device |
-
1986
- 1986-02-08 JP JP61026167A patent/JPS62185341A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5532221A (en) * | 1978-08-24 | 1980-03-06 | Toshiba Corp | Saturation level detector |
JPS5558555A (en) * | 1978-10-25 | 1980-05-01 | Hitachi Ltd | Electronic device and its manufacture |
JPS55166942A (en) * | 1979-06-15 | 1980-12-26 | Hitachi Ltd | Semiconductor device |
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