JPS6218034A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent crystal defects from generating in the surface of a semiconductor substrate by a method wherein a resin film and metal film are subjected to etch-back by plasma until the resist pattern is exposed equipped with a flattened surface before it is removed for the formation of a wiring. CONSTITUTION:After the formation of an insulating film 2 of SiO2 or the like on the surface of a semiconductor substrate 1, a resist pattern 3 of a 1.5mu-thick PMIPK provided with an opening 3a is formed on the insulating film 2. Next, a 1mum-thick wiring Al alloy film 4 is deposited on the resist pattern 3 and in the opening 3a. Further, a resin film 5 (polyimide) is laid by application by using a spinner or the like, with the surface virtually flattened. The resin film 5 and metal film 4 are subjected to plasma etching by using a chlorine- based gas. The etching continues until the surface of the resist pattern is exposed flat. Finally, the resist pattern 3 is immersed in a resist-swelling liquid for removal from the insulating film 2, whereafter only the metal film filling the opening 3a is retained to serve as a wiring 4a.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a novel method for forming fine Submicron wiring without causing crystal defects in a semiconductor substrate. The present invention relates to a wiring forming method.

[Technical Background of the Invention] Conventionally, various methods have been proposed as a method for forming wiring of semiconductor devices, but the method shown in FIGS. 2 and 3 is one of the methods used as mass production technology. There are things that are.

In the method shown in FIG. 2, after forming a metal film 4 for wiring on a semiconductor substrate 1, a resist pattern 6 approximately equal in width to the wiring is formed on the metal film 4, and then the resist pattern 6 is In this method, the wiring 4b or 4C is formed by selectively etching the metal film 4 as a mask. When the metal film 4 is isotropically etched using this method, a wiring 4b thinner than the resist pattern 6 is formed as shown in FIGS. 2(C) and 2(d).
On the other hand, when the metal film 4 is anisotropically etched, FIG.
C') and FIG. 2(d'), a wiring 4C having approximately the same width as the resist 1-pattern 6 is formed.

The method shown in FIG. 3 is based on the so-called lift-off method, and in this method, a resist pattern 7 having a trapezoidal cross-section (inverted tapered) open lower a is formed on the semiconductor substrate 1 as shown in FIG. 3(a). After the formation, a metal film 4 for wiring is deposited on the resist pattern 7 and in the open lower a, as shown in FIG. 3(b). Then, the resist pattern 7 is removed together with the metal film 4 on the resist pattern by processing with a resist swelling liquid or 02 gas plasma assher, and the deposition stage i in the intermediate lower a is removed as shown in FIG. 3(C). The film is left as a wiring 4d.

In addition, due to the need for fine resist patterns such as submicron, the above-mentioned photoresists are made of polymethyl isopropenyl ketone PMTPK and polymethyl methacrylate PMM.
A is increasingly being used.

[Problems with the Background Art] Among the methods shown in FIG. 2, the metal film 4 is etched using isotropic etching such as a mixture of phosphoric acid, acetic acid, nitric acid, and water as shown in FIG. 2(C). In this case, side etching occurs, so that the width of the wiring 4b becomes narrower than that of the resist pattern 6, and it is difficult to control the wiring width.

On the other hand, when etching the metal film 4 by anisotropic etching using chlorine-based gas (Si CI4, B'CI3, CI2, etc.) as shown in FIG. 2 (C'), the metal film has the same dimensions as the resist pattern. Wiring 4C can be etched
It is possible to precisely control the width of PM I.
There is a problem in that there are limitations in the selectivity with resists such as PK and PMMA and with the semiconductor substrate.

Furthermore, as is well known, depending on plasma etching, crystal defects may occur on the surface of the semiconductor substrate 1, and if the metal film 4 is made of an A1 alloy (for example, Al-8i or AI-8i-CI), Problems such as corrosion of wiring and reduced product reliability are also likely to occur due to Si and Cu residues generated during etching.

On the other hand, in the method shown in FIG. 3, a very high level of technology is required to form a downwardly expanding open lower a in the resist pattern 7 as shown in FIG. 3(a) due to the necessity of mask transfer technology. In addition, shape defects such as drips may occur on the surface of the resist pattern, resulting in a problem of lack of stability in the birth line.

In addition, in this method, the metal film for wiring has a 1.5 to 2.0
Although a resist film twice as thick as this is required, such a thick resist film cannot provide high resolution and is therefore disadvantageous for forming fine wiring.

Further, in the methods shown in FIGS. 2 and 3, even if hillocks are formed on the wiring surface, they are left as they are, so there is a problem that flat wiring without defects can not be obtained in a multilayer semiconductor device.

[Object of the Invention] An object of the present invention is to provide a novel method for manufacturing a semiconductor device that does not have the above-mentioned problems that occur in conventional wiring forming methods when forming submicron wiring.

[Summary of the Invention] The method according to the present invention involves depositing a metal film for wiring on a resist pattern, depositing a resin film on the metal film so as to be almost flat, and then removing the resin film and the resin film by plasma etching. Etch back the metal film and etch the entire surface until the resist pattern is exposed as a flat surface.
After that, the resist pattern is removed to form wiring. In the method of this invention, the semiconductor substrate surface is not damaged by ion bombardment because the resist spacer is used during plasma etching, and when the resist film is removed, the semiconductor substrate surface is not damaged by ion bombardment. It also has the advantage that there is no risk of wiring corrosion as it removes residual CLI, Si, etc.
Since this method does not use a resist film as an etching mask, there is no need to consider the plasma etching resistance of the resist film. Therefore, a high resolution resist such as PMIPK or PMMA can be used as the a-layer, and as a result, it is possible to It is possible to form finer interconnections than with mask transfer technology.

[Embodiment 1 of the Invention An embodiment of the present invention will be described below with reference to FIG. 1.

In the method of the present invention, first, an insulating film 2 such as a 5in2 film is formed on the surface of a semiconductor substrate 1 as shown in FIG.
A resist pattern 3 having a film thickness of 1.5 μm is formed.

Next, as shown in FIG. 1(b), a 1-μm-thick wiring He-1 alloy (A
A metal film 4 made of I-8i-CtJ) is laminated by UL,
Furthermore, a resin film 5 (
Polyimide resin) is applied using a spinner or the like so that the surface is almost flat.

Next, the entire surface of the resin film 5 and metal film 4 is etched by plasma etching using chlorine gas (SiCl 4), so that the surface of the resist pattern 3 is exposed flatly as shown in FIG. 1(d). .

In this case, etching conditions are selected and set so that the etching speed of the polyimide resin film 5 and the A1 alloy metal film 4 are the same.

Finally, the resist pattern 3 is immersed in the resist 1~swelling liquid and removed from above the insulation III 2.
As a result, as shown in FIG. 1(e), only the portion of the metal film filled in the opening 3a of the resist pattern 3 is left as the wiring 4a.

[Effects of the Invention] As explained above, according to the method of the present invention, the problems existing in the conventional method can be solved, and the following effects can be achieved.

(i> Since the surface of the semiconductor substrate is protected by a resist pattern when plasma etching is performed, there is no risk of crystal defects occurring on the surface of the semiconductor substrate. Therefore, it is possible to miniaturize elements and improve the yield of semiconductor devices. This improves the electrical characteristics and eliminates the possibility of deterioration of electrical characteristics or reduction in reliability.

(11) Since the resist pattern is not used as an etching mask but only as a spacer,
There is no fear that the resist pattern will be damaged during etching, and as a result, it is possible to form interconnects with finer and more accurate shapes than with mask transfer technology.

(iii) When plasma etching a metal film, the method of the present invention protects the surface of the semiconductor substrate, so there is no risk of 3i or Cu in the metal film adhering to the surface of the semiconductor substrate, and therefore there is no risk of corrosion of wiring. disappears.

(1) In the method of the present invention, since the metal film is etched over the entire surface, hillocks on the wiring can be removed at the same time, so a flat wiring surface can be realized.
Suitable for forming multilayer wiring.

(V) Since it is not necessary to use advanced technology for mask 1 to transfer, it is technically stable and can be put to practical use on a mass production line.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor showing the main steps of the method of the present invention, and FIGS. 2 and 3 are cross-sectional views schematically showing a conventional manufacturing method. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Insulating film, 3... Resist pattern, 4... Metal film, 4a, 4b, 4
c4d...Wiring, 5...Resin film, 6,7...
resist pattern. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1. A step of forming a resist pattern above the semiconductor substrate, a step of depositing a metal film for wiring on the resist pattern, and a step of forming a resin film on the metal film.
A semiconductor device comprising the steps of: removing part of the resin film and the metal film by plasma etching the entire surface until the resist pattern is exposed, leaving a wiring pattern of the metal film; and removing the resist pattern. Production method.