JPH0313744B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a novel pattern using a dry etching method. Photoprocessing, which patterns the surface of a substrate when manufacturing semiconductor devices, is a basic technology that is rapidly expanding with each passing day.Wet etching, which previously used chemical tools for etching, is also becoming more and more advanced. As accuracy has reached its limit, recently, dry etching has been used to form highly accurate patterns. On the other hand, in order to improve the characteristics of integrated circuits such as faster response speeds, studies have not been completed in the direction of higher integration, and along with the formation of fine patterns, it has become necessary to form multilayer structures such as wiring layers on the substrate. come. However, in a multilayer structure, as the number of layers increases (three or four layers), the difference in level becomes larger, and the thickness of the conductive layer or insulating film is not uniform at the step part, and the conductive layer becomes extremely thin at the step part. If the insulating film is formed thinly, disconnection is likely to occur, and if the insulating film is formed extremely thin at the step portion, short circuits may occur. 1st
As an example, the figure shows a cross-sectional view of such a two-layer conductive layer, in which 1 and 3 are insulating films, 2 and 4 are conductive layers, 5 is a part that is likely to cause disconnection, and 6 is a part that is likely to cause a short circuit. As shown, this is caused by a type of anisotropic etching in which the etching side surface is vertical due to the dry etching method when patterning the conductive layer 2. By the way, the conventional wet etching method is disadvantageous in that it has poor accuracy, and as shown in Figure 2, the side surface is over-etched, resulting in side etching, and the etched side surface tends to have a tapered shape with an inclination. However, in the dry etching method, as shown in FIG. 3, side etching hardly occurs, so the above-mentioned problem occurs, and this is an important problem to be solved. Note that 7 in FIGS. 2 and 3 indicates an etching protection mask. The present invention eliminates the above-mentioned problems and provides an etching method that performs patterning using a dry etching method suitable for fine patterns and that does not cause disconnection or short-circuit accidents even in a multilayer structure. . According to the present invention, this purpose is achieved by performing isotropic etching halfway through and then anisotropic etching in the same apparatus using a parallel plate plasma etching apparatus or a reactive sputtering apparatus, thereby etching a semiconductor substrate. Alternatively, the purpose can be sufficiently achieved by forming a pattern with tapered side surfaces on the film on the substrate. The present invention will be explained in detail below. FIG. 4 shows a parallel plate type plasma etching apparatus,
Figure 5 is a schematic diagram of the reactive sputtering device.
In both cases, the semiconductor substrate 10 is held on the electrode A, and high frequency power with a frequency of 13.56 MHz is applied between the opposing electrode B, and a reaction gas is flowed in through the gas inlet C, which is turned into plasma and placed on the substrate 10. A process of etching is performed. FIGS. 6 to 8 show cross-sectional views of steps in an embodiment in which polycrystalline silicon is etched using such an apparatus. In the figure, reference numeral 11 denotes a polycrystalline silicon film with a thickness of 5000 Å. A positive resist is coated on the upper surface of the film and exposed and developed to form a pattern of a resist film 12, which has the cross-sectional shape shown in FIG. Then, using the resist film 12 as a mask, isotropic etching is performed to a thickness of 2500 Å on the upper side of the polycrystalline silicon film 11 using the above-mentioned apparatus.
The etching conditions are, for example, high frequency output 1KW,
The reaction gas was _CF4 gas mixed with 5% _O2 , and the pressure
Process at 1Torr for 2.5 minutes. Then, side etching is performed by isotropic etching, and the shape of the topmost polycrystalline silicon is changed as shown in Figure 7.
W ₂ is larger than the opening W ₁ of the resist film 12 mask. In addition, CF ₄ gas mixed with C ₂ F ₄ Cl was used instead of 5% O ₂ as the reaction gas, and the pressure was increased.
At 2 Torr, the same high frequency output can be used to isotropically etch the same 2500 Å film thickness in just 20 seconds. Next, in the same apparatus, anisotropic etching is performed on the lower portion of the polycrystalline silicon film 11 to a thickness of 2500 Å.
The etching conditions are, for example, high frequency output 1KW,
CCl ₄ gas was used as the reaction gas, and the pressure was 0.2 Torr.
Process for 30 seconds. Then, by anisotropic etching, a vertical etched side surface having the same shape as the shape _W1 of the resist film mask is obtained. The conditions for such anisotropic etching are as follows: In addition to the above, if a mixed gas of CF ₄ and C ₂ FCl is used at a pressure of 1 Torr, a film thickness of 2500 mm can be obtained in 20 seconds.
Å can be etched and also pressure
CF ₄ gas at a pressure of 0.1 Torr can be etched in 5 minutes, and PCl ₃ gas at a pressure of 0.2 Torr can be etched in 40 seconds by applying a high frequency output of 1 KW to a film thickness of 2500 Å.
can be removed by etching. In this way, by performing isotropic etching and then anisotropic etching in the same device, a fine pattern with tapered side surfaces as shown in FIG. 8 is formed. . After removing the mask of the resist film 12 with an organic solvent, if an insulating film 13 made of, for example, SiO ₂ is deposited on its upper surface, the thickness of the insulating film 13 becomes thinner as shown in FIG. It will no longer be formed. The above description has been made using an example in which the material to be etched is polycrystalline silicon, but thermally oxidized silicon films, vapor phase grown silicon oxide films, etc.
Tapered shapes can be similarly formed on phosphosilicate glass (PSG) films and single-crystal silicon by simply changing the processing time.

Furthermore, by selecting etching conditions such as reactive gases for other materials to be etched, it is possible to perform isotropic etching and anisotropic etching in the same apparatus. As described above, the present invention is a dry etching method that can form a tapered pattern in a fine pattern, and is a clever forming method that prevents disconnections and short circuits in highly integrated semiconductor devices. This is highly effective in improving the reliability of semiconductor devices such as integrated circuits.

[Brief explanation of the drawing]

Figures 1 to 3 are sectional views for explaining conventional problems, Figure 4 is a schematic diagram of a parallel plate type plasma etching apparatus, Figure 5 is a schematic diagram of an example of a reactive sputtering apparatus, and Figure 6 is a schematic diagram of an example of a reactive sputtering apparatus. 8 through 8 are cross-sectional views in the order of steps of the present invention, and FIG. 9 is a cross-sectional view for explaining the effects of the present invention. In the figure, 11 is a polycrystalline silicon film, 12 is a resist film, and 13 is an insulating film.

Claims (1)

[Scope of Claims] 1. A step of forming a mask layer on a layer of material to be etched and then opening a predetermined region of the mask layer to expose the layer of material to be etched; and a step of using a parallel plate plasma etching apparatus or a reactive spa. isotropically etching the layer of the material to be etched halfway using a vine device, and subsequently etching the material to be etched using the same mask layer used in the isotropic etching as a mask in the same device; forming a pattern of the material layer to be etched with a tapered upper side and a substantially vertical lower side by anisotropically etching the remaining portion of the layer; and after removing the mask layer; A method for manufacturing a semiconductor device, comprising the steps of: forming a predetermined film on the layer of material to be etched.