JPS62179224A - Digital/analog converter - Google Patents

Digital/analog converter

Info

Publication number
JPS62179224A
JPS62179224A JP1978586A JP1978586A JPS62179224A JP S62179224 A JPS62179224 A JP S62179224A JP 1978586 A JP1978586 A JP 1978586A JP 1978586 A JP1978586 A JP 1978586A JP S62179224 A JPS62179224 A JP S62179224A
Authority
JP
Japan
Prior art keywords
conversion
mantissa
digital data
bit
exponent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1978586A
Other languages
Japanese (ja)
Inventor
Takahiko Hattori
崇彦 服部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP1978586A priority Critical patent/JPS62179224A/en
Publication of JPS62179224A publication Critical patent/JPS62179224A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To convert a digital data having a large bit length into an analog data with a low cost by combining a D/A conversion circuit having the K-bit of processing capability and the D/A conversion circuit of an L-bit of processing capability so as to apply D/A conversion to a digital data having a (K+L)-bit length. CONSTITUTION:A digital data represented by the floating point form desired to be subjected to D/A conversion is fed to a D/A converter 1 to obtain an analog data Y comprising a product Ym.Ye between a mantissa part D/A conversion output Ym and an exponential part D/A conversion output Ye by giving the mantissa part D/A conversion output Ym as a reference power supply Vref to an exponential part D/A conversion circuit 3. Thus, the digital data having a (K+L)-bit length is D/A-converted by the combination of two D/A conversion circuits 2 and 3 having the processing capability of K and L bits respectively. Then the digital data having a large bit length is converted into an analog data with a low cost.

Description

【発明の詳細な説明】 [産業上の利用分野コ この発明は、浮動少数点形式のディジタルデータを、複
数のDA変換回路を用いてDA変換するDA変換器に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a DA converter that converts digital data in floating point format from DA to digital using a plurality of DA converters.

[従来の技術] コンピュータにて処理されるデータの形式は、符号なし
の整数や符号付きの整数あるいは精度の高い数値を表す
のに用いられる実数などがあり、実数型のデータは、仮
数部と指数部からなる浮動少数点形式と呼ばれ、固定少
数点形成と呼ばれる符号付きの整数と区別される。浮動
少数点形式では、ある数値データYを、仮数M、指数E
、底すをもちいて、Y=M−bF−とじて表す。2進数
の場合、bは2である。
[Prior Art] The format of data processed by computers includes unsigned integers, signed integers, and real numbers used to represent high-precision numbers. Real number type data has a mantissa and a mantissa. It is called a floating point format consisting of an exponent, and is distinguished from a signed integer format called a fixed point format. In floating point format, certain numerical data Y is divided into a mantissa M and an exponent E.
, using the base, it is expressed as Y=M-bF-. For binary numbers, b is 2.

一般に、仮数部と指数部の構成ビット数及び各部のデー
タ表現形式は、コンピュータの種類により異なるが、マ
イクロコンピュータの分野では、I EEEで審議され
た形式が標準形式として採用されつつあり、ビット長が
32ビツトの単精度の場合、23ビツトの仮数部と8ビ
ツトの指数部および符号ビットが、浮動少数点形式の標
準形式となる。
In general, the number of bits constituting the mantissa and exponent parts and the data representation format of each part differ depending on the type of computer, but in the field of microcomputers, the format discussed by IEEE is being adopted as the standard format, and the bit length If is 32-bit single precision, the standard floating-point format is a 23-bit mantissa and 8-bit exponent and sign bit.

ところで、浮動少数点形式のディジタルデータY を、
Kビットの仮数部ベクトル成分y MとLビットの指数
部ベクトル成分yEに分けて表現すると、 yM=[aに−1,λに−2,aK−33690,ao
]yE=[bL−1・bL−2・bl−3・・・・・b
O]Tで表される。ただし、Tは、転置記号である。
By the way, digital data Y in floating point format is
When expressed separately into K-bit mantissa vector component yM and L-bit exponent vector component yE, yM=[-1 for a, -2 for λ, aK-33690, ao
]yE=[bL-1・bL-2・bl-3...b
O]T. However, T is a transposition symbol.

そして、上記ディジタルデータYをアナログデータに変
換して表現すれば、 −(K−1) Y = (ax−12’+ a  2−1+ 、 、 
、 +a02  1 )と表すことができ、アナログデ
ータYが仮数部変換項Ymと指数部変換項Yeの積で表
されることが判る。 ただし、 である。
Then, if the above digital data Y is converted into analog data and expressed, -(K-1) Y = (ax-12'+ a 2-1+ , ,
, +a02 1 ), and it can be seen that the analog data Y is represented by the product of the mantissa conversion term Ym and the exponent conversion term Ye. However, .

ところで、ディジタルデータYをアナログデータYに変
換するのに用いられるDA変換器としては、ディジタル
データのビット長に十りで決まる処理能力が必要なこと
は、いうまでもなく、従来は、K+Lビットのディジタ
ルデータを変換するについては、単純にに+Lビットの
処理能力をもつDA変換器が用いられていた。
By the way, it goes without saying that the DA converter used to convert digital data Y into analog data Y requires a processing capacity that is determined by the bit length of the digital data. To convert digital data, a DA converter with a processing capacity of +L bits was simply used.

[発明が解決しようとする問題点] 上記従来のDA変換器は、Kビットの仮数部ベクトル成
分yMとLビットの指数部ベクトル成分yEからなる浮
動小数点形式のディジタルデータYをDA変換するうえ
で、最低に+Lビットのものが必要であり、前述のマイ
クロコンピュータの場合には、31ビツトの処理能力が
要求されるため、DA変換器の構成が複雑化し、しかも
製造コストが高くつく等の問題点があった。
[Problems to be Solved by the Invention] The conventional DA converter described above has the following problems when performing DA conversion on digital data Y in floating point format consisting of a K-bit mantissa vector component yM and an L-bit exponent vector component yE. , a minimum of +L bits is required, and in the case of the microcomputer mentioned above, a 31-bit processing capacity is required, resulting in problems such as the complexity of the DA converter configuration and high manufacturing costs. There was a point.

[問題点を解決するための手段] この発明は、上記問題点を解決したものであり、Kビッ
トの仮数部とLビットの指数部からなる浮動小数点形式
のディジタルデータについて、仮数部をDA変換する仮
数部DA変換回路と、指数部をDA変換する指数11D
A変換回路とを有し、これら仮数部DA変換回路と指数
部DA変換回路は、いずれか一方が他方のアナログ出力
を基準電源とする直列接続関係にある構成としたことを
を特徴とするものである。
[Means for Solving the Problems] This invention solves the above-mentioned problems, and converts the mantissa part into DA for digital data in floating point format consisting of a K-bit mantissa part and an L-bit exponent part. and an exponent 11D that converts the exponent part to DA.
A conversion circuit, and the mantissa part DA conversion circuit and the exponent part DA conversion circuit are configured in a series connection relationship in which one of the mantissa part DA conversion circuits uses the analog output of the other as a reference power supply. It is.

[作用] この発明は、浮動小数点形式で表されたディジタルデー
タについて、仮数部DA変換出力と指数部DA変換出力
の積からなるアナログデータを、いずれか一方のDA変
換出力を他方のDA変換出力を基準電源とするり、A変
換に供することにより得る。
[Operation] With respect to digital data expressed in floating point format, the present invention converts analog data consisting of the product of a mantissa part DA conversion output and an exponent part DA conversion output, by converting the DA conversion output of one of them to the DA conversion output of the other. can be obtained by using it as a reference power supply or by subjecting it to A conversion.

[実施例] 以下、この発明の・実施例について、第1図を参照して
一説明する。第1図は、この発明のDA変換器の一実施
例を示す回路構成図である。
[Example] Hereinafter, an example of the present invention will be described with reference to FIG. 1. FIG. 1 is a circuit diagram showing an embodiment of the DA converter of the present invention.

第1図中、DA変換器lは、Kビットの仮数部とLビッ
トの指数部からなる浮動小数点形式のディジタルデータ
Y について、仮数部をDA変換する仮数部DA変換回
路2と、指数部をDA変換する指数部DA変換回路3と
を有する。これら仮数部DA変換回路2と指数部DA変
換回路3は、この実施例の場合、指数14DA変換回路
3が仮数部DA変換回路2のアナログ出力を基準電源V
 rerとする直列接続関係にある。
In FIG. 1, the DA converter l includes a mantissa DA conversion circuit 2 that converts the mantissa into DA, and a mantissa DA conversion circuit 2 that converts the mantissa into DA, and a mantissa DA converter circuit 2 that converts the mantissa into DA, regarding digital data Y in floating point format consisting of a K-bit mantissa and an L-bit exponent. The exponent part DA conversion circuit 3 performs DA conversion. In this embodiment, the mantissa part DA conversion circuit 2 and the exponent part DA conversion circuit 3 convert the analog output of the mantissa part DA conversion circuit 2 into the reference power supply V.
It is in a series connection relationship with rer.

すなわち、前述の算式から明らかなように、アナログデ
ータYは、仮数部変換項Ymと指数部変換項Yeの積Y
m−Yeで表され、仮数部と指数部が、ゲインの重み付
けを相互に行っている。
That is, as is clear from the above formula, the analog data Y is the product Y of the mantissa conversion term Ym and the exponent conversion term Ye.
It is expressed as m-Ye, and the mantissa part and the exponent part mutually weight the gain.

従って、第1図に示したように、仮数部DA変換回路2
を、指数部DA変換回路3の基準電源端子に接続したこ
とにより、仮数部DA変換出力として指数部DA変換回
路3に印加されたアナログデータYmが、指数部変換項
の各項に係数として乗算され、アナログデータYが得ら
れる。
Therefore, as shown in FIG.
is connected to the reference power supply terminal of the exponent part DA conversion circuit 3, so that the analog data Ym applied to the exponent part DA conversion circuit 3 as the mantissa part DA conversion output is multiplied by each term of the exponent part conversion term as a coefficient. and analog data Y is obtained.

このように、上記DA変換器1は、DA変換しようとす
る浮動小数点形式で表されたディジタルデータについて
、仮数部DA変換出力Ymと指数部DA変換出力Yeの
積Ym−YeからなるアナログデータYを、仮数部DA
変換出力Ymを指数部DA変換出力Yaの基準電源V 
rerとするDA変換に供することにより、得る構成と
したから、全体としてに+Lビットのビット長をもつデ
ィジタルデータを、Kビットの処理能力をもつDA変換
回路2とLビットのDA変換回路3の、ともに低次の2
個のDA変換回路2.3の組み合わせでDA変換するこ
とができ、これによりビット長が大であるディジタルデ
ータを、低コストでアナログデータに変換することがで
きる。
In this way, the DA converter 1 converts digital data expressed in floating point format to be DA-converted into analog data Y consisting of the product Ym-Ye of the mantissa part DA conversion output Ym and the exponent part DA conversion output Ye. , the mantissa part DA
The conversion output Ym is the reference power supply V of the exponential part DA conversion output Ya.
Since the configuration is such that digital data having a bit length of +L bits as a whole is obtained by subjecting it to DA conversion with a processing capacity of K bits and DA conversion circuit 3 of L bits, , both of lower order 2
DA conversion can be performed by a combination of the DA conversion circuits 2.3, and thereby digital data having a large bit length can be converted to analog data at low cost.

なお、第2図に示すDA変換器11のように、Kビット
の仮数部とLビットの指数部からなる浮動少数点彩式の
ディジタルデータYについて、接続態様が前記実施例と
は全く逆の仮数部DA変換回路I2と指数部DA変換回
路I3によりDA変換することも可能であり、この場合
、指数部DA変換出力Yeが、仮数部DA変換出力Ym
を基準電源とするDA変換により重み付けに供される。
It should be noted that, as in the DA converter 11 shown in FIG. 2, for the floating point color digital data Y consisting of a K-bit mantissa part and an L-bit exponent part, the connection mode is completely opposite to that of the above embodiment. It is also possible to perform DA conversion using the mantissa part DA conversion circuit I2 and the exponent part DA conversion circuit I3. In this case, the exponent part DA conversion output Ye becomes the mantissa part DA conversion output Ym.
Weighting is performed by DA conversion using the reference power source.

[発明の効果コ 以上説明したように、この発明は、浮動小数点形式で表
されたディジタルデータについて、仮数部DA変換出力
と指数部DA変換出力の積からなるアナログデータを、
いずれか一方のDA変換出力を他方DA変換出力を基準
電源とするDA変換に供することにより得る構成とした
から、全体としてに+Lビットのビット長をもつディジ
タルデータを、Kビットの処理能力をもつDA変換回路
とLビットのDA変換回路の、2個のともに低次のDA
変換回路の組み合わせでDA変換することができ、これ
によりビット長が大であるディジタルデータを、低コス
トでアナログデータに変換することができる等の優れた
効果を奏する。
[Effects of the Invention] As explained above, the present invention converts analog data consisting of the product of the mantissa part DA conversion output and the exponent part DA conversion output with respect to digital data expressed in floating point format.
Since the configuration is such that the DA conversion output of either one is obtained by applying the DA conversion output of the other to DA conversion using the other DA conversion output as a reference power supply, digital data having a total bit length of +L bits can be processed with K bits of processing capacity. Two low-order DA converters, a DA converter circuit and an L-bit DA converter circuit.
DA conversion can be performed using a combination of conversion circuits, and this provides excellent effects such as converting digital data with a large bit length into analog data at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、この発明のDA変換器の一実施例を示す回路
構成図、第2図は、この発明のDA変換器の他の実施例
を示す回路構成図である。 1.11.、、DA変換器、2.+2.、、仮数部DA
変換回路、3.13...指数部DA変換回路。
FIG. 1 is a circuit diagram showing one embodiment of the DA converter of the present invention, and FIG. 2 is a circuit diagram showing another embodiment of the DA converter of the present invention. 1.11. ,,DA converter,2. +2. ,,mantissa DA
Conversion circuit, 3.13. .. .. Exponential part DA conversion circuit.

Claims (1)

【特許請求の範囲】[Claims] Kビットの仮数部とLビットの指数部からなる浮動少数
点形式のディジタルデータについて、仮数部をDA変換
する仮数部DA変換回路と、指数部をDA変換する指数
部DA変換回路とを有し、これら仮数部DA変換回路と
指数部DA変換回路は、いずれか一方が他方のアナログ
出力を基準電源とする直列接続関係にあるDA変換器。
Regarding digital data in floating point format consisting of a K-bit mantissa part and an L-bit exponent part, it has a mantissa part DA conversion circuit that converts the mantissa part from DA to DA, and an exponent part DA conversion circuit that converts the exponent part from DA to DA. , these mantissa part DA converter circuit and exponent part DA converter circuit are DA converters in which either one uses the analog output of the other as a reference power supply and is connected in series.
JP1978586A 1986-01-31 1986-01-31 Digital/analog converter Pending JPS62179224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1978586A JPS62179224A (en) 1986-01-31 1986-01-31 Digital/analog converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1978586A JPS62179224A (en) 1986-01-31 1986-01-31 Digital/analog converter

Publications (1)

Publication Number Publication Date
JPS62179224A true JPS62179224A (en) 1987-08-06

Family

ID=12008984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1978586A Pending JPS62179224A (en) 1986-01-31 1986-01-31 Digital/analog converter

Country Status (1)

Country Link
JP (1) JPS62179224A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06132828A (en) * 1992-10-14 1994-05-13 Mitsubishi Electric Corp D/a converter

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5148960A (en) * 1974-10-24 1976-04-27 Nippon Musical Instruments Mfg
JPS5933929A (en) * 1982-08-19 1984-02-24 Matsushita Electric Ind Co Ltd Digital/analog converting circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5148960A (en) * 1974-10-24 1976-04-27 Nippon Musical Instruments Mfg
JPS5933929A (en) * 1982-08-19 1984-02-24 Matsushita Electric Ind Co Ltd Digital/analog converting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06132828A (en) * 1992-10-14 1994-05-13 Mitsubishi Electric Corp D/a converter

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