JPS62168660U - - Google Patents
Info
- Publication number
- JPS62168660U JPS62168660U JP5621486U JP5621486U JPS62168660U JP S62168660 U JPS62168660 U JP S62168660U JP 5621486 U JP5621486 U JP 5621486U JP 5621486 U JP5621486 U JP 5621486U JP S62168660 U JPS62168660 U JP S62168660U
- Authority
- JP
- Japan
- Prior art keywords
- region
- island region
- integrated circuit
- semiconductor integrated
- output transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 claims 2
- 230000003071 parasitic effect Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Bipolar Transistors (AREA)
Description
第１図及び第２図は本考案を説明するための断
面図及び等価回路図、第３図及び第４図は従来例
を説明するための断面図及び等価回路図である。
１はＰ型半導体基板、５ａ，５ｂ，５ｃは島領
域、６はＰ型ベース領域、８はＮ型コレクタ低抵
抗領域、９はＰ型抵抗領域、１２……１８は電極
である。
1 and 2 are a sectional view and an equivalent circuit diagram for explaining the present invention, and FIGS. 3 and 4 are a sectional view and an equivalent circuit diagram for explaining a conventional example. 1 is a P-type semiconductor substrate, 5a, 5b, 5c are island regions, 6 is a P-type base region, 8 is an N-type collector low resistance region, 9 is a P-type resistance region, 12...18 are electrodes.
Claims (1)
ープンコレクタ型の出力トランジスタと他の前記
島領域に形成した抵抗領域とを具備し、前記出力
トランジスタのコレクタに印加される負パルスに
よつて前記出力トランジスタと前記抵抗領域とで
寄生サイリスタ効果を生ずる半導体集積回路にお
いて、前記１つの島領域と前記抵抗領域との間の
前記他の島領域表面にシヨツトキーダイオードを
設け、且つ前記他の島領域に印加される電位と等
しい電位を印加することにより前記寄生サイリス
タ効果を防止したことを特徴とする半導体集積回
路。 It comprises an open collector type output transistor formed in one electrically isolated island region and a resistance region formed in the other island region, and the In a semiconductor integrated circuit in which a parasitic thyristor effect is produced between an output transistor and the resistance region, a Schottky diode is provided on the surface of the other island region between the one island region and the resistance region, and A semiconductor integrated circuit characterized in that the parasitic thyristor effect is prevented by applying a potential equal to the potential applied to the region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5621486U JPS62168660U (en) | 1986-04-15 | 1986-04-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5621486U JPS62168660U (en) | 1986-04-15 | 1986-04-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62168660U true JPS62168660U (en) | 1987-10-26 |
Family
ID=30884824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5621486U Pending JPS62168660U (en) | 1986-04-15 | 1986-04-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62168660U (en) |
-
1986
- 1986-04-15 JP JP5621486U patent/JPS62168660U/ja active Pending
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