JPS63131150U - - Google Patents

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Publication number
JPS63131150U
JPS63131150U JP2300787U JP2300787U JPS63131150U JP S63131150 U JPS63131150 U JP S63131150U JP 2300787 U JP2300787 U JP 2300787U JP 2300787 U JP2300787 U JP 2300787U JP S63131150 U JPS63131150 U JP S63131150U
Authority
JP
Japan
Prior art keywords
region
conductivity type
emitter
carrier injection
injection blocking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2300787U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2300787U priority Critical patent/JPS63131150U/ja
Publication of JPS63131150U publication Critical patent/JPS63131150U/ja
Pending legal-status Critical Current

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  • Bipolar Transistors (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は夫々本考案を説明するため
の断面図及び平面図、第3図及び第4図は夫々従
来例を説明するための断面図及び平面図である。 21はP型半導体基板、25は島領域、26は
エミツタ領域、27はコレクタ領域、28はベー
スコンタクト領域、31はエミツタ電極、34は
キヤリア注入阻止領域である。
1 and 2 are a sectional view and a plan view, respectively, for explaining the present invention, and FIGS. 3 and 4 are a sectional view and a plan view, respectively, for explaining a conventional example. 21 is a P-type semiconductor substrate, 25 is an island region, 26 is an emitter region, 27 is a collector region, 28 is a base contact region, 31 is an emitter electrode, and 34 is a carrier injection blocking region.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ベースとなる島領域の表面に結成した一導電型
のエミツタ領域と、このエミツタ領域の表面に形
成した逆導電型のキヤリア注入阻止領域と、前記
エミツタ領域を囲むように前記島領域表面に形成
した一導電型のコレクタ領域と、前記島領域表面
を覆う絶縁膜と、該絶縁膜を開孔したコンタクト
ホールを介して前記エミツタ領域と前記キヤリア
注入阻止領域の両者にオーミツクコンタクトする
エミツタ電極と、前記コレクタ領域にオーミツク
コンタクトするコレクタ電極とを具備することを
特徴とするラテラルトランジスタ。
an emitter region of one conductivity type formed on the surface of the island region serving as a base; a carrier injection blocking region of the opposite conductivity type formed on the surface of the emitter region; and a carrier injection blocking region of the opposite conductivity type formed on the surface of the island region so as to surround the emitter region. a collector region of one conductivity type, an insulating film covering the surface of the island region, and an emitter electrode in ohmic contact with both the emitter region and the carrier injection blocking region through a contact hole formed in the insulating film; A lateral transistor comprising a collector electrode in ohmic contact with the collector region.
JP2300787U 1987-02-19 1987-02-19 Pending JPS63131150U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2300787U JPS63131150U (en) 1987-02-19 1987-02-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2300787U JPS63131150U (en) 1987-02-19 1987-02-19

Publications (1)

Publication Number Publication Date
JPS63131150U true JPS63131150U (en) 1988-08-26

Family

ID=30820929

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2300787U Pending JPS63131150U (en) 1987-02-19 1987-02-19

Country Status (1)

Country Link
JP (1) JPS63131150U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6116569A (en) * 1984-07-03 1986-01-24 Matsushita Electronics Corp Semiconductor integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6116569A (en) * 1984-07-03 1986-01-24 Matsushita Electronics Corp Semiconductor integrated circuit device

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