JPS6116569A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To improve the current amplification factor of a lateral type transistor and increase the speed of operation thereof by forming a region having a conduction type reverse to an emitter into an emitter region and shaping ohmic contact electrodes to each of a base region, a collector region and the emitter region. CONSTITUTION:When a section between a base and an emitter is biassed in the forward direction, emitter currents do not pass through an N type region 8, and flow into the peripheral section A of the emitter from a ohmic contact section in the periphery of the emitter. The currents are divided into a component which is injected into a base region 3 from A and collected to collectors 6 and a component which flows into an emitter section B just under the region 8 and is injected into the base region 3 from B. Since an emitter region 5 is shaped by a diffusion from the surface, impurity concentration in a B section is lowered, and resistivity is increased. Consequently, sheet resistance existing in the section B interrupts the injection of holes from B. That is, holes are injected mostly from the emitter 5 by A.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an element used in a bipolar semiconductor integrated circuit, and provides an element that improves the disadvantages in electrical characteristics of lateral transistors.

Conventional configuration and its problems Bipolar semiconductor integrated circuits include NPN transistors,
It is well known that circuit elements such as PNP transistors, diodes, and resistors are formed on a semiconductor chip, and these elements are interconnected to perform a desired circuit operation.

By the way, there is a so-called lateral type PNP (PNP) transistor that is often used here.
This will be explained using figures.

That is, Fig. 1 shows a lateral type P used in a semiconductor integrated circuit.
NP) is a diagram showing the structure of a transistor, in which an N-type epitaxial layer 3 is grown on a P-type substrate 1 into which an N-type buried region 2 is diffused, and is separated from other elements by a P-type isolation diffusion region 4. . In the epitaxial layer 3, a P-type emitter region 5 and a P-type collector region 6 are formed in a positional relationship surrounding the P-type emitter region 5. The N-type region 7 is a diffusion region from which the base electrode is taken out, and a lateral type PNP transistor is constructed by attaching ohmic electrodes 51, 61, and 71 to the regions 5, 6, and 7, respectively.

The operation of this transistor will be briefly explained. When the emitter region 5 and the base region 3 are biased in the forward direction, holes injected from the emitter are collected through the base width portion WB into the collector region 6 which is biased in the reverse direction.
A transistor operates, and at this time holes run horizontally as shown by solid arrows in the figure. This is why it is called a lateral form.

Actually, holes injected from the emitter are injected not only from the side surface of the emitter but also from the bottom surface as shown by the dotted line arrow in the figure. However, holes injected from the bottom are a disadvantageous component for the following two reasons. One of them is that holes injected from the side have a long distance to reach the collector, so most of them recombine with electrons in the base region, and the resulting current becomes the base current, so the transistor The purpose of this is to reduce the current amplification factor. Another reason is that the component passing through the base width portion takes a longer time to reach the collector, which hinders high-speed operation of the transistor.

OBJECTS OF THE INVENTION The present invention provides a semiconductor integrated circuit device that improves the disadvantages in electrical characteristics of lateral transistors used in semiconductor integrated circuits, namely, low current amplification factor and unsuitability for high-speed operation. This will be explained below with reference to FIG.

Structure of the Invention The present invention provides a buried region of an opposite conductivity type selectively formed on a semiconductor substrate of one conductivity type, an epitaxial layer of an opposite conductivity type grown under the substrate covering the buried region, A base region formed of the epitaxial layer and a buried region separated by a separation diffusion region reaching the substrate from the surface of the epitaxial layer, an emitter region formed in the base region, and a base region formed in the base region. a collector region formed in a positional relationship surrounding the emitter region with a part of the region separated; and a region in the emitter region having a conductivity type opposite to that of the emitter; This is a semiconductor integrated circuit device formed with an ohmic contact electrode, thereby achieving the above-mentioned object.

DESCRIPTION OF EMBODIMENTS FIG. 2 is a cross-sectional view of a lateral type PNP transistor according to an embodiment of the present invention, in which an N-type epitaxial layer 3 is grown on a P-type substrate 1 in which an N-type buried region 2 is diffused. , P
It is separated from other elements by a type isolation diffusion region 4. A P-type emitter region 6 and a P-type collector region 6 are formed in the epitaxial layer 3 in a positional relationship surrounding the P-type emitter region 6.

Next, in the collector region 3 and emitter region 5,
N-type region 7 and N-type region 8 are diffused, respectively.

The N-type region 7 is a contact diffusion region from which the base electrode is taken out. The lateral PNP transistor according to the present invention is constructed by providing electrodes 51, 61, and 71 in regions 5°6.7, respectively. Compared to the conventional example of FIG. 1, the region 8 created within the emitter is the main component of the present invention, which will be explained in more detail in the following examples.

The emitter portion of the lateral type PNP transistor shown in FIG. 2 can be divided into a peripheral portion A of the emitter and a portion B immediately below the region 8.

When the base and emitter are biased in the forward direction, the emitter current does not pass through the N-type region 8, but instead flows from the ohmic contact part around the emitter to the peripheral part A of the emitter, but this current is injected from A into the base region 3. , a component that is collected in the collector, and a component that flows into the emitter portion B directly below the region 8 and is injected from B into the base region 3. By the way, since region 5 is formed by diffusion from the surface, the impurity concentration in the B portion is low, and therefore the resistivity is high. By the way, N type region 8 is formed in the same chip.
When formed by the emitter diffusion layer of a PN) transistor,
The sheet resistance of B is approximately Ω/unit. The sheet resistance present in portion B prevents hole injection from B. That is, most of the holes are injected from the emitter 5 by A, and the disadvantages of the characteristics of the lateral type PNP transistor caused by the holes injected from the bottom of the emitter, which were explained using FIG. 1, are improved.

Effects of the Invention As described above, the present invention overcomes the disadvantages of electrical characteristics of conventional lateral transistors due to injection from the bottom of the emitter, that is, the current amplification rate is low; It is possible to provide an element that is improved in its unsuitability for high-speed operation using a simple implementation method.

[Brief explanation of the drawing]

FIG. 1 is a structural diagram of a lateral type PNP transistor conventionally used in semiconductor integrated circuits, and FIG. 2 is a structural diagram of a lateral type PNP transistor according to an embodiment of the present invention. 1...P-type substrate, 2...N-type buried region, 3...N-type epitaxial layer, 4...
・P-type isolation diffusion region, 6...P-type emitter region, 6...P-type collector region, 7...N
Type base contact diffusion region, 8...N type region, 61...Emitter electrode, 61...Collector electrode, 71...Base electrode.

Claims (2)

[Claims] (1) A buried region of an opposite conductivity type selectively formed on a semiconductor substrate of one conductivity type, an epitaxial layer of an opposite conductivity type grown on the substrate covering the buried region, and a surface of the epitaxial layer. a base region consisting of the epitaxial layer and the buried region separated by an isolation diffusion region reaching the substrate; an emitter region formed in the base region; a part of the base region in the base region; A collector region is formed in a positional relationship surrounding the emitter region with the emitter region separated from the collector region, and the emitter region includes a region having a conductivity type opposite to that of the emitter, and is in ohmic contact with each of the base region, the collector region, and the emitter region. A semiconductor integrated circuit device formed with electrodes. (2) Claim 1 in which the emitter electrode is in contact with an emitter region and a region of opposite conductivity type in the emitter region.
The semiconductor integrated circuit device described in Section 1.