JPS62168234A - Microprogram controller using sequencer - Google Patents

Abstract

PURPOSE:To shorten the program processing time by attaining the input of signals to a mapping register from hardware as well. CONSTITUTION:Both the data of an instruction converting ROM 3 to be supplied to a switch circuit 7 and the hardware generating signal are supplied to a multiplexer 71. Then the data of the ROM 3 is outputted while the idle state signal of a sequencer 4 is inputted. While the hardware generating signal is outputted when no idle state signal is supplied. A mapping register 72 receives the output data of the multiplexer 71 and sends the input data to the sequencer 4 by the enable signal given from the sequencer 4 after the idle state signal or the hardware generating state signal is received. The sequencer 4 selects the address of a microprogram memory 5 and stores it in a data register 6.

Description

[Detailed Description of the Invention] [Summary] This is a microprogram control device in which signals from hardware can also be input to a mapping register that provides instructions from a microprocessor to a sequencer 4, and program processing is performed by utilizing the mapping register. Reduce time.

[Industrial application field]

The present invention relates to a microprogram control device using a sequencer in which signals generated by hardware can also be input as mapping inputs of the microprogram.

In information processing systems, the system processing performance is improved by dividing and rationalizing device control using microprograms.

The sequencer, to which the microprocessor delegates part of its program execution, executes the delegated predetermined microprogram routine.

When a microprogram corresponding to an instruction from the microprocessor is activated, the manping register, which provides the sequencer with instructions entrusted by the microprocessor, is in a standby state while the instruction is being executed.

Focusing on this, the system uses the waiting period of the mapping register to analyze signals generated by the hardware and performs program processing, thereby making effective use of the mapping register.

[Conventional technology]

FIG. 4 is a block diagram of a conventional microprogram control device using a sequencer that executes a microprogram.

When the startup instruction of the execution program of the microprocessor 1 is loaded into the instruction register 2, the instruction register 2 selects the execution microprogram address from the instruction conversion ROM 3 that stores the microprogram address for executing the startup instruction, and selects the execution microprogram address from the sequencer 4. Enter.

The sequencer 4 specifies an address in the microprogram memory 5, retrieves data, and controls the execution of information processing.

[Problem that the invention seeks to solve]

In this conventional method, the microprocessor issues instructions to the sequencer 4 only after the sequencer has finished its operation.
This is only in the standby state, that is, in the idle state.

The present invention was created in view of the above points, and utilizes the mapping register by switching the signals generated by the instruction conversion ROM and the hardware and inputting them to the mapping register, and program processing using the mapping register. The purpose of this invention is to provide a microprogram control device that saves time.

[Means for solving problems]

FIG. 1 shows a principle block diagram of a microprogram control device using a sequencer according to the present invention.

An instruction register 2 is connected to the bus of the microprocessor 1, and the output of the instruction register 2 is connected to an instruction conversion ROM 3, which is connected to a switching circuit 7 that switches between the output and a hardware generated signal by an idle signal of the sequencer. The output of the switching circuit 7 is connected to the sequencer 4 via a mapping register 72.

Sequencer 4 is connected to microprogram memory 5 to access and execute microprograms.

The circuit configuration is such that a switching circuit 7 can be inserted to connect hardware generated signals without directly inputting the output of the instruction conversion ROM 3 to the manipulating register 4.

[Effect]

When the start command of the execution program from the microprogram engine is set in the instruction register 2, microprogram address data is selected from the command conversion ROM 3 using the start command as a conversion ROM address, and the switching circuit 7 selects the start command when the sequencer 4 is in an idle state. For example, the microprogram address data is sent.

Next, the address data is input to the sequencer 4, which selects an address from among several input addresses and outputs it to the microprogram memory 5.
The data stored at that address is read out and sent out from the data register 6.

If the sequencer 4 is in operation, the switching circuit 7 accepts the hardware generated signal, and the sequencer 4 receives the instruction conversion ROM.
Perform the same processing as the data from 3.

〔Example〕

Using the principle block diagram of the microprogram control device of the present invention shown in FIG. 1, the block diagram of the switching circuit 7 of one embodiment of the present invention shown in FIG. 2, and the flowcharts shown in FIGS. A microprogram control device using a sequencer according to the invention will be explained in detail.

Note that the same reference numerals indicate the same objects throughout the figures.

The data of the instruction conversion ROM 3 and the hardware generated signal input to the switching circuit 7 are input to the multiplexer 71, and when the idle state signal of the sequencer 4 is input, the data of the instruction conversion ROM 3 is output, and the idle state signal is input. When not in use, outputs a hardware-generated signal.

The manpinder register 2 receives the output data of the multiplexer 71 by inputting the input data through an idle state signal, a hardware generated state signal, and either signal via the OR circuit 73, and receives the output data from the multiplexer 71 by inputting the input data with an idle state signal, a hardware generated state signal, and one of the signals via the OR circuit 73. Send the data to the sequencer 4.

Sequencer 4 selects an address in microprogram memory 5 based on the data and stores it in data register 6.

The data is then sent as execution data to the information processing system.

More specifically, when the sequencer is idle, the switching circuit 7 inputs the signal of the instruction conversion ROM to the mapping register, and converts the instruction issued by the microprocessor 1 into, for example, instruction A (instruction code "01"), instruction B (instruction code r02J), .

The microprogram can be started using the converted microprogram address.

During sequencer operation, the switching circuit 7 inputs a hardware-generated signal to the mapping register 72. After the hardware-generated signal is set in the mapping register 72, the jump map instruction of the sequencer 4 is executed, and the signal generated by the hardware signal is set in the mapping register 72. Sequencer control is performed.

When a hardware generated signal is sent to the manping register 72, a predetermined conversion is performed, for example, a predetermined rxxJ is added to the upper part of the input data, and "xxoIJ indicates the address of the microprogram memory 5 as a microprogram address. data (rxxJ indicates the microprogram control table area, "01"
indicates a hardware-generated signal).

The microprogram memory 5 controls the sequencer 4 using hardware-generated signals by executing data A at the execution program address specified by the microprogram address.

By the way, in the past, when controlling the sequencer 4 using hardware-generated signals, branch instructions were executed multiple times, so if there were many types of instructions, the processing time required for judgment was required (Figure 5). .

However, according to the present invention, the sequencer 4 can be controlled by a nodeware generated signal with a single branch instruction.

In the conventional example, the instruction conversion ROM 3 has the function of a manping register 72.

〔Effect of the invention〕

As described above, according to the present invention, by utilizing the mapping register and inputting the hardware generated signal to the mapping register, the sequencer control using the hardware generated signal is executed with one branch instruction. This makes it possible to reduce the processing time of the system, and is extremely useful in practice.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram of the switching circuit of the embodiment, Fig. 3 is a flowchart of the embodiment, Fig. 4 is a block diagram of the conventional example, and Fig. 5 is the block diagram of the conventional example. It is a flowchart. In the figure, 1 is a microprocessor, 2 is an instruction register, 3 is an instruction conversion ROM, 4 is a sequencer, 5 is a microprogram memory, 7 is a switching circuit, 71 is a multiplexer, 4A J9 sword principle 7 Russian diagram No. 1 Figure 9! Jt45'lp C7)'frjJFfpV°Oy
7m Figure 2 Ne〃L〢Dob row 7"D/Jikro Figure 4 Hayabusa

Claims (1)

[Claims] An instruction register (2) for setting a startup instruction for a microprocessor (1), an instruction conversion ROM (3) for selecting an address of a microprogram that executes the instruction, and an instruction conversion ROM (3) for selecting an address of a microprogram that executes the instruction. ) and the hardware signal sent by the hardware.
71) and a mapping register (72) for indicating the address of the microprogram connected to the output of the multiplexer (71); (5) A sequencer-based microprogram control device comprising: (5) a sequencer (4) for instructing the address of the microprogram.