JPS6216509A - Manufacture of substrate for semiconductor device - Google Patents

Manufacture of substrate for semiconductor device

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Publication number
JPS6216509A
JPS6216509A JP15573585A JP15573585A JPS6216509A JP S6216509 A JPS6216509 A JP S6216509A JP 15573585 A JP15573585 A JP 15573585A JP 15573585 A JP15573585 A JP 15573585A JP S6216509 A JPS6216509 A JP S6216509A
Authority
JP
Japan
Prior art keywords
annealing
semiconductor film
substrate
substrate holder
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15573585A
Other languages
Japanese (ja)
Inventor
Nobuhiro Shimizu
信宏 清水
Masafumi Shinpo
新保 雅文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP15573585A priority Critical patent/JPS6216509A/en
Publication of JPS6216509A publication Critical patent/JPS6216509A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To control the temperature distribution of a semiconductor film when it is recrystallized as well as to contrive improvement in crystallizability of the titled substrate by a method wherein the projections of a substrate holder having recesses and projections on the surface are brought into contact with a semiconductor film, and the whole is annealed. CONSTITUTION:The material, having a high coefficient of thermal conductivity, which is not deformed when a semiconductor film 3 is fused by beam annealing is suitable for a substrate holder 1. When a beam annealing is to be performed, as the tight adhesiveness of the substrate holder 1 and the semiconductor film 3 is an important factor for control of temperature distribution when the annealing process is performed, it is advisable that the above-mentioned materials are fixed using a vacuum chucking, and a beam 5 is made to irradiate from the back side of a transparent insulated substrate 2 when an annealing is performed. There are a laser beam, an electron beam and the like as the beam to be used for the above-mentioned annealing, and it is necessary that said beam is passed through the transparent insulated substrate 2. Generally, as hydrogen gas is contained in the a-Si film deposited by performing a plasma CVD method, the crystallizability after recrystallization by annealing can be improved by annealing for removal of said gas. It is generally known that hydrogen gas is removed by performing the annealing at the approximate temperature of 500 deg.C, and any annealing method which is performed at the temperature higher than said temperature can be used.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、絶縁基板上に薄膜トランジスタ(TIFT
)t−製作する際に、より結晶性の良い半導体膜が得ら
れる半導体装置用基板の製造方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] This invention provides a thin film transistor (TIFT) on an insulating substrate.
) T--Relates to a method of manufacturing a substrate for a semiconductor device, which allows a semiconductor film with better crystallinity to be obtained during manufacturing.

〔発明の′ja!!] この発明は透明絶縁基板上の半導体膜をビームアニール
する際に、状面に凹凸のある基板ホルダーを用いて、半
導体膜とホルダーの凸部とを接触させて、アニール時の
半導体膜中の温度分布を改善し、より良い結晶が得られ
るようにしたものである。
[Invention'ja! ! ] This invention uses a substrate holder with an uneven surface when beam annealing a semiconductor film on a transparent insulating substrate, and brings the semiconductor film into contact with the convex portion of the holder to reduce the amount of damage in the semiconductor film during annealing. This improves the temperature distribution and allows better crystals to be obtained.

〔従来の技術〕[Conventional technology]

従来、第2図−)のようにa数基板上に堆積した半導体
膜は、ビームアニールにより溶融再結晶する際に、第2
図(6)に示すようにビーム周辺の温度の低い部分から
結晶化するため、結晶粒が十分大きくならなかった。
Conventionally, a semiconductor film deposited on an a-number substrate as shown in Fig.
As shown in Figure (6), the crystal grains were not sufficiently large because they crystallized from the low-temperature area around the beam.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の方法では、艶禄基板上9′!!f−導体漢をビー
ムアニールしても、再結晶時の半導体膜の温度分布に問
題があり、結晶粒が十分大きくならないという欠点があ
った。
In the conventional method, 9'! ! Even if the f-conductor was beam annealed, there was a problem in the temperature distribution of the semiconductor film during recrystallization, and the crystal grains did not become sufficiently large.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は上記の問題点KM決するために1表面に凹凸の
ある基板ホルダーの凸部と半導体膜とを接触させてビー
ムアニールすることにより、第1図い、(−)に示すよ
うに、再結晶時の半導体膜中の温度分布を改善する。
In order to solve the above-mentioned problem, the present invention brings the protrusions of the substrate holder, which has an uneven surface, into contact with the semiconductor film and performs beam annealing. Improves temperature distribution in a semiconductor film during crystallization.

〔作用〕[Effect]

i11!り、(#)に示すように、基板ホルダー1の凸
部と半導体膜3との間に保護膜4をはさんで接触した時
、ビームアニール後再結晶する時の半導体膜8の温度分
布は第1図(6)のようになり、ビームの中心部から結
晶化するため、結晶性が良くなる。
i11! As shown in (#), when the protrusion of the substrate holder 1 and the semiconductor film 3 are brought into contact with the protective film 4 interposed between them, the temperature distribution of the semiconductor film 8 during recrystallization after beam annealing is as follows. As shown in FIG. 1 (6), crystallinity is improved because crystallization starts from the center of the beam.

〔実施例〕〔Example〕

以下図面によって本発明の例を説明する。第1図n)は
本発明のアニール方法を説明するための第1実施例の平
面図で第1図の)は第1図b)のムーA’線に沿った断
面図である。基板ホルダー1の材料は、熱伝導率が高く
、半導体膜3がビームアニールで溶融した時に、変形し
ないものであれば良い、例としては、シリコンや石英、
/X融点金属であるクロム、モリブデンなどがある。凸
部のパターニングはフォトリソ技術で作ることができる
。また平担なホルダーに凸部に使用したい材料を堆積し
た後、フォトリソ技術でパターニングして凹凸を設ける
とともできる。すなわちシリコン基板上にモリブデンを
スパッタ法または蒸着法によりモリブデンを0.5μm
から10 p m堆積した後、パターニングする方法で
ある。次にビームアニールする基板の作製方法について
説明する。透明絶縁基板2の例としては1石英や無アル
カリガラスやガラス謀面に杷緑物をコートしてガラスか
らの不純物の拡散を防止するものなどがある。半導体膜
8の材料には、多結晶シリコン、アモルファスシリコン
(a−Bi] 、ゲルマニウムなどがあり。
Examples of the present invention will be explained below with reference to the drawings. FIG. 1n) is a plan view of the first embodiment for explaining the annealing method of the present invention, and FIG. 1) is a sectional view taken along the line A' of FIG. 1b). The material of the substrate holder 1 may be any material as long as it has high thermal conductivity and does not deform when the semiconductor film 3 is melted by beam annealing. Examples include silicon, quartz,
/X Melting point metals such as chromium and molybdenum. The patterning of the convex portions can be made using photolithography technology. It is also possible to deposit the material desired for the convex portions on a flat holder and then pattern it using photolithography technology to provide concavities and convexities. That is, molybdenum is deposited on a silicon substrate to a thickness of 0.5 μm by sputtering or vapor deposition.
This is a method in which 10 pm of the film is deposited and then patterned. Next, a method for manufacturing a substrate to be beam annealed will be described. Examples of the transparent insulating substrate 2 include 1-quartz, alkali-free glass, and a glass surface coated with loquat to prevent impurities from diffusing from the glass. Materials for the semiconductor film 8 include polycrystalline silicon, amorphous silicon (a-Bi), germanium, and the like.

堆積方法には、スパッタ法、減圧OVD法、プラズマO
’VD法などがある。ここではα−a4−6プラズマO
VD法で堆積する方法について説明する。堆積温度は室
温から約800℃の間で行い。原料ガスはおもにシラン
(#4H番]またはジシラン(S4ml’l5)t−使
用する。膜厚は0.05μ−からIItsの間に設定す
る。次に保IJJi14について説明する。この膜は、
ビームアニールにより半導体8が溶融した際に、ホルダ
ー1と直接触れて変形したり何者したりしないように設
けるものであり、材料例としては、窒化シリコン(aj
Nz] 、酸化シリコン(840g)や高融点金属のク
ロム、モリブデンなどが考えられる。堆積方法は、蒸着
法、スパッタ法やO”lD法があり、膜厚は0.02μ
情から1μ鵠の間で設定する。またこの保護膜4は、基
板ホルダー1側にめってもより。
Deposition methods include sputtering, low pressure OVD, plasma O
'VD method etc. Here, α-a4-6 plasma O
A method of depositing by VD method will be explained. The deposition temperature was between room temperature and about 800°C. The raw material gas is mainly silane (#4H) or disilane (S4ml'l5).The film thickness is set between 0.05μ and IIts.Next, IJJi14 will be explained.This film is
It is provided so that when the semiconductor 8 is melted by beam annealing, it will not be deformed or damaged by direct contact with the holder 1. As an example of the material, silicon nitride (aj
Nz], silicon oxide (840 g), high melting point metals such as chromium and molybdenum. Deposition methods include evaporation, sputtering, and O"LD method, and the film thickness is 0.02μ.
It is set between 1 μ out of curiosity. Also, this protective film 4 is placed on the substrate holder 1 side.

次に半導体Sのビームアニール方法について説明する。Next, a beam annealing method for the semiconductor S will be explained.

ビームアニールに際して、基板ホルダー1と半導体膜8
との密着性は、アニール時の温度分布を制御する上で重
要な要素であるため、真空でチャッキングして固定した
方が良い。
During beam annealing, the substrate holder 1 and the semiconductor film 8
Since adhesion with the material is an important factor in controlling the temperature distribution during annealing, it is better to fix it by vacuum chucking.

了ニール方法は、第1図の)に示すように透明絶縁基板
2の裏面からビーム5を照射する。ビームの種類は、レ
ーザビーム、電子ビーム、UVランプなどあるが、透明
絶縁基板2を透過することが必要であり、ここでは、ア
ルゴンレーザビームを使って、1−B81’!eアニー
ルする方法について説明する。一般にプラズマOVD法
で堆積し九〇−s4は膜中に水素ガスが含まれているた
め、このガスを除去する了ニールを行うことで再結晶ア
ニール後の結晶性が良くなる。アニール方法は。
In the finishing method, a beam 5 is irradiated from the back surface of the transparent insulating substrate 2, as shown in FIG. 1). Types of beams include laser beams, electron beams, and UV lamps, but they need to be able to pass through the transparent insulating substrate 2. Here, an argon laser beam is used to generate 1-B81'! The e-annealing method will be explained. Generally, 90-S4, which is deposited by plasma OVD, contains hydrogen gas in the film, so performing annealing to remove this gas improves the crystallinity after recrystallization annealing. What is the annealing method?

水素ガスが約500℃以上で除去できることが知られて
おり、この温度以上になる了ニール方法であればどの方
法でも可能である。またこのアニールは、半導体膜8と
基板ホルダー1とを密層させる前に行なっても良い。−
例としては、真空または不活性ガス雰囲気中で、a−B
tが溶融しない程度のエネルギー密度で行う、アニール
条件の一例トしては、パワー12W、ビーム径840μ
漢。
It is known that hydrogen gas can be removed at a temperature of about 500° C. or higher, and any annealing method that reaches this temperature or higher can be used. Further, this annealing may be performed before the semiconductor film 8 and the substrate holder 1 are closely layered. −
For example, in a vacuum or inert gas atmosphere, a-B
An example of annealing conditions in which the annealing is performed at an energy density that does not melt is power 12W and beam diameter 840μ.
Han.

走査速度5 cN/ ageで行う0次に再結晶化のア
二−ル方法は、前記の水素ガス除去アニール同様真空ま
たは不活性ガス雰囲気中でアルゴンレーザを使って行う
。ここでビーム6のビーム幅は、少なくとも基板ホルダ
ー1の凸部の幅よりも大きくし、走査方向をよ第1図6
)のビーム走査方向6のように基板ホルダー1の凸部に
沿って走査させる。アニール条件の例としては、パワー
13W、ビーム径180 μtrc J走査速度50 
cm / sacがある。この結果、再結晶時の半導体
t!!X8の温度分布は第1図(イ)の各部分に対応し
て第1図りのようになり、溶融部分の中央部から結晶化
する九めe @ 2図の従来方法に比べて結晶粒が大き
くなり、結晶性が向上する。以上のような了ニール後で
きた第1図(6)に示すような基板にTPTなどのデバ
イスを製作した時に、高移動度で電気的特性のすぐれた
ものができる。、上記のような基板ホルダー1を用いた
了ニール方法で他の例も渦見られるので説明する。
The zero-order recrystallization annealing method performed at a scanning rate of 5 cN/age is performed using an argon laser in a vacuum or inert gas atmosphere, similar to the hydrogen gas removal annealing described above. Here, the beam width of the beam 6 is set to be at least larger than the width of the convex portion of the substrate holder 1, and the width of the beam 6 is set to be larger than the width of the convex portion of the substrate holder 1, and the width of the beam 6 is set to be larger than the width of the convex portion of the substrate holder 1.
) The beam is scanned along the convex portion of the substrate holder 1 in the beam scanning direction 6 shown in FIG. Examples of annealing conditions are: power 13W, beam diameter 180 μtrc, J scanning speed 50
There is cm/sac. As a result, the semiconductor t! during recrystallization. ! The temperature distribution of becomes larger and improves crystallinity. When a device such as a TPT is fabricated on a substrate as shown in FIG. 1 (6) after the above-mentioned annealing process, a device with high mobility and excellent electrical characteristics can be produced. There are other examples of the above-mentioned method of sealing using the substrate holder 1, so they will be explained.

本発明の第2実施例を示す第8図は、基板ホルダー1の
凸部の形状全三角形にしたものであり。
FIG. 8 shows a second embodiment of the present invention, in which the convex portion of the substrate holder 1 is entirely triangular in shape.

基板ホルダー1の熱伝導率が大きく、レーザのビーム幅
が小さい場合など有効な方法である。また半導体膜3と
の接触面積が小さいため、アニール後基板ホルダー1と
半導体膜8が密層してとれなくなるトラブルは減少する
This method is effective when the substrate holder 1 has a high thermal conductivity and the laser beam width is small. In addition, since the contact area with the semiconductor film 3 is small, the trouble that the substrate holder 1 and the semiconductor film 8 become closely layered and cannot be removed after annealing is reduced.

本発明の第8の実施例を示す第4図b)−(c)は。FIGS. 4b) to 4(c) show an eighth embodiment of the present invention.

半導体膜8と基板ホルダー1の凸部を同じようにパター
ニングし9両者の凸部を密層させて〔第4図(社)参照
〕その後ビームアニールを行う方法である。なお、第4
図の)は第4図上)のB−B l線断面図である。ここ
で基板ホルダー1の凸部の面積は、接触する島状半導体
膜31よりも小さくして温度分布を第1図(−)のよう
にし、アニール時に島状半導体膜31の中心部分から再
結晶化が進むようにする。この結果第4図(c)に示す
ように島状半導体膜31は結晶化される。
This is a method in which the convex portions of the semiconductor film 8 and the substrate holder 1 are patterned in the same way, the convex portions of both 9 are layered closely (see FIG. 4 (Company)), and then beam annealing is performed. In addition, the fourth
) is a sectional view taken along line B-Bl of FIG. 4 (upper). Here, the area of the convex portion of the substrate holder 1 is made smaller than that of the island-shaped semiconductor film 31 in contact, so that the temperature distribution is as shown in FIG. to promote the development of As a result, the island-shaped semiconductor film 31 is crystallized as shown in FIG. 4(c).

本発明の第4の実施例を示す第5図は、半導体膜8t−
堆積した基板がビームに対して不透明基板21である場
合に、透明基板ホルダー11ヲ用いて。
FIG. 5 showing a fourth embodiment of the present invention shows a semiconductor film 8t-
Using a transparent substrate holder 11 when the deposited substrate is an opaque substrate 21 to the beam.

ホルダー側からビーム6を照射してアニールする方法で
ある。
This is a method of annealing by irradiating the beam 6 from the holder side.

一例としては、ビーム5としてアルゴンレーザを使用し
、不透明基板21にシリコン基板上に酸化膜などの絶R
膜を0.5μ慣から8μ慣堆積したものを用いて、透明
基板ホルダー11に石英などのガラスを使用してホルダ
ー側から半導体1!X8のα−゛a 4 <了ニールす
れば、再結晶時の温度分布は第1図(−)のようになる
ため、第1図の了ニール方法と同様の結晶性の膜が得ら
れる。
As an example, an argon laser is used as the beam 5, and an oxide film or the like is formed on the opaque substrate 21 on the silicon substrate.
Using a film deposited from 0.5μ to 8μ, a transparent substrate holder 11 made of glass such as quartz, and semiconductor 1! If α-゛a 4 of X8 is annealed, the temperature distribution at the time of recrystallization becomes as shown in FIG.

〔発明の効果〕〔Effect of the invention〕

この発明は以上いくつかの例で説明したように、状面に
凹凸のある基板ホルダーを用いて、半導体膜とホルダー
の凸部とを接触させて、アニールすることにより、再結
晶時の半導体膜中の温度分Pを制御し、改善させること
で、従来よりもより結晶性を向上させられるという効果
がある。
As explained in the several examples above, this invention uses a substrate holder with an uneven surface, brings the semiconductor film into contact with the convex portion of the holder, and anneals the semiconductor film during recrystallization. By controlling and improving the temperature P inside, there is an effect that crystallinity can be improved more than before.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図に)〜(3)は本発明のアニールを行う第1実施
例の工程を示す図、第2図6)は従来のアニール方法上
説明するための断面図、第2図の)はアニール時の半導
体膜8の温度分布全説明するための特性図である。第8
図は本発明のアニールを行うための第2の実施例を示す
断面図である。第4図ら)〜G))は本発明の了ニール
に行うための第8の実施例の工程を示す図、第5図は本
発明のアニールを行うための第4の実施例を示す断面図
である。 10.基板ホルダー、2.。透明絶縁基板30.半導体
膜、  40.保護膜 50.ビーム    61.ビーム走査方向お0.結晶
化した半導体膜 以上 ↓   ↓   ↓   S\6ヒ′−ム涜2【方向ト
ー5ビーム F−5 第 7 図 1トー5 アニールと行うTζめLr>第1の *比別の工程と示す図 第1図 従来のヒーム了ニールと!所千るための図第2図 アニールと行うはめ0第2の実施例のエイ!とホ↑図第
3図 第4図
Fig. 1) to (3) are diagrams showing the steps of the first embodiment of annealing of the present invention, Fig. 2) is a cross-sectional view for explaining the conventional annealing method, and Fig. 2) is FIG. 4 is a characteristic diagram for explaining the entire temperature distribution of the semiconductor film 8 during annealing. 8th
The figure is a sectional view showing a second embodiment for performing annealing according to the present invention. 4) to G)) are diagrams showing the steps of the eighth embodiment for performing annealing of the present invention, and FIG. 5 is a sectional view showing the fourth embodiment for performing annealing of the present invention. It is. 10. board holder, 2. . Transparent insulating substrate 30. Semiconductor film, 40. Protective film 50. Beam 61. Beam scanning direction and 0. Above the crystallized semiconductor film ↓ ↓ ↓ Figure 1 Conventional Heem Ryo Neil! Figure 2: Annealing and fitting 0 of the second embodiment! Toho↑Figure 3Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)透明絶縁基板表面上の半導体膜をビームエネルギ
ーによりアニールするに際し、表面に凹凸のある基板ホ
ルダーを用い前記半導体膜と前記ホルダーの凸部とを接
触させ、前記透明基板の裏側からエネルギーを照射し、
前記半導体膜をアニールすることを特徴とする半導体装
置用基板の製造方法。
(1) When annealing a semiconductor film on the surface of a transparent insulating substrate with beam energy, a substrate holder with an uneven surface is used to bring the semiconductor film into contact with the convex portion of the holder, and energy is applied from the back side of the transparent substrate. irradiate,
A method for manufacturing a substrate for a semiconductor device, comprising annealing the semiconductor film.
(2)前記半導体膜と前記基板ホルダーとの間に前記半
導体膜よりも高融点の薄膜を挿入することを特徴とする
特許請求の範囲第1項記載の半導体装置用基板の製造方
法。
(2) The method for manufacturing a substrate for a semiconductor device according to claim 1, characterized in that a thin film having a higher melting point than the semiconductor film is inserted between the semiconductor film and the substrate holder.
(3)前記基板ホルダーの凹凸の凸部の間隔がビーム径
よりも小さいことを特徴とする特許請求の範囲第1項ま
たは第2項記載の半導体装置用基板の製造方法。
(3) The method of manufacturing a substrate for a semiconductor device according to claim 1 or 2, wherein the distance between the convex and convex portions of the unevenness of the substrate holder is smaller than the beam diameter.
JP15573585A 1985-07-15 1985-07-15 Manufacture of substrate for semiconductor device Pending JPS6216509A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15573585A JPS6216509A (en) 1985-07-15 1985-07-15 Manufacture of substrate for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15573585A JPS6216509A (en) 1985-07-15 1985-07-15 Manufacture of substrate for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6216509A true JPS6216509A (en) 1987-01-24

Family

ID=15612301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15573585A Pending JPS6216509A (en) 1985-07-15 1985-07-15 Manufacture of substrate for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6216509A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5219798A (en) * 1989-09-22 1993-06-15 Kabushiki Kaisha Toshiba Method of heating a semiconductor substrate capable of preventing defects in crystal from occurring
US5753542A (en) * 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
US6518548B2 (en) 1997-04-02 2003-02-11 Hitachi, Ltd. Substrate temperature control system and method for controlling temperature of substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5753542A (en) * 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
US5219798A (en) * 1989-09-22 1993-06-15 Kabushiki Kaisha Toshiba Method of heating a semiconductor substrate capable of preventing defects in crystal from occurring
US6518548B2 (en) 1997-04-02 2003-02-11 Hitachi, Ltd. Substrate temperature control system and method for controlling temperature of substrate

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