JPS62160551U - - Google Patents
Info
- Publication number
- JPS62160551U JPS62160551U JP4860686U JP4860686U JPS62160551U JP S62160551 U JPS62160551 U JP S62160551U JP 4860686 U JP4860686 U JP 4860686U JP 4860686 U JP4860686 U JP 4860686U JP S62160551 U JPS62160551 U JP S62160551U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- power semiconductor
- insulating substrate
- copper
- copper pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 4
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Description
第１図は本考案の一実施例を示す縦断面図、第
２図は本考案の他の実施例を示す縦断面図、第３
図は従来例を示す縦断面図である。 １はアルミナ基板（絶縁基板）、２，３は銅パ
ターンである。
２図は本考案の他の実施例を示す縦断面図、第３
図は従来例を示す縦断面図である。 １はアルミナ基板（絶縁基板）、２，３は銅パ
ターンである。
Claims (1)
- 【実用新案登録請求の範囲】 １ 絶縁基板の両面に回路をなす銅パターンが重
着して形成されて成る電力半導体装置において、
上記一方の銅パターンは、絶縁基板より大きく形
成され、かつ、その表面を露出して形成したこと
を特徴とする電力半導体装置。 ２ 上記の絶縁基板は、１つのアルミナ基板によ
つて形成されている実用新案登録請求の範囲第１
項記載の電力半導体装置。 ３ 上記の絶縁基板は、他方の銅パターンに対応
して個々に分離して形成されている実用新案登録
請求の範囲第１項記載の電力半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4860686U JPS62160551U (ja) | 1986-03-31 | 1986-03-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4860686U JPS62160551U (ja) | 1986-03-31 | 1986-03-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62160551U true JPS62160551U (ja) | 1987-10-13 |
Family
ID=30870294
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4860686U Pending JPS62160551U (ja) | 1986-03-31 | 1986-03-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62160551U (ja) |
-
1986
- 1986-03-31 JP JP4860686U patent/JPS62160551U/ja active Pending